NVC code coverage report

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.CAN_CORE_INST.NO_BUS_TRAFFIC_CTRS_GEN

File:  /__w/ctu-can-regression/ctu-can-regression/src/can_core/can_core.vhd

Sub-instances:

Instance Statement Branch Toggle Expression FSM state Functional Average

Current Instance:

Instance Statement Branch Toggle Expression FSM state Functional Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.CAN_CORE_INST.NO_BUS_TRAFFIC_CTRS_GEN 100.0 % (2/2) N.A. N.A. N.A. N.A. N.A. 100.0 % (2/2)

Details:

The limit of printed items was reached (5000). Total 261615 items are not displayed.

Uncovered statements:

Excluded statements:

Covered statements:

Signal assignment statement:

829:        tx_frame_ctr <= (others => '0')
Count: 940
Threshold: 1

Signal assignment statement:

830:        rx_frame_ctr <= (others => '0')
Count: 940
Threshold: 1

Uncovered branches:

Excluded branches:

Covered branches:

Uncovered toggles:

Excluded toggles:

Covered toggles:

Uncovered expressions:

Excluded expressions:

Covered expressions:

Uncovered FSM states:

Excluded FSM states:

Covered FSM states:

Uncovered functional coverage:

Excluded functional coverage:

Covered functional coverage: