NVC code coverage report

Instance	Statement	Branch	Toggle	Expression	FSM state	Functional	Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.CAN_CORE_INST.OPERATION_CONTROL_INST	100.0 % (28/28)	100.0 % (32/32)	100.0 % (24/24)	100.0 % (32/32)	100.0 % (8/8)	N.A.	100.0 % (124/124)

Uncovered statements:

Excluded statements:

Covered statements:

If statement:

151:    go_to_off <= '1' when (is_bus_off = '1') and (rx_trigger = '1') 
152:                     else 
153:                 '0';

Count: 20048891
Threshold: 1

Signal assignment statement:

151: go_to_off <= '1' when (is_bus_off = '1') and (rx_trigger = '1')
Count: 319372
Threshold: 1

Signal assignment statement:

153: '0';
Count: 19729519
Threshold: 1

Signal assignment statement:

161: next_state <= curr_state;
Count: 1077541
Threshold: 1

Sequential statement:

163:        case curr_state is 
164:        when s_oc_off => 
...
192:            end if; 
193:        end case;

Count: 1077541
Threshold: 1

If statement:

165:            if (set_idle = '1') then 
166:                next_state <= s_oc_idle; 
167:            end if;

Count: 643461
Threshold: 1

Signal assignment statement:

166: next_state <= s_oc_idle;
Count: 6636
Threshold: 1

If statement:

170:            if (go_to_off = '1') then 
171:                next_state <= s_oc_off; 
...
175:                next_state <= s_oc_receiver; 
176:            end if;

Count: 168836
Threshold: 1

Signal assignment statement:

171: next_state <= s_oc_off;
Count: 6767
Threshold: 1

Signal assignment statement:

173: next_state <= s_oc_transmitter;
Count: 19375
Threshold: 1

Signal assignment statement:

175: next_state <= s_oc_receiver;
Count: 30070
Threshold: 1

If statement:

179:            if (go_to_off = '1') then 
180:                next_state <= s_oc_off; 
...
184:                next_state <= s_oc_receiver; 
185:            end if;

Count: 117936
Threshold: 1

Signal assignment statement:

180: next_state <= s_oc_off;
Count: 112
Threshold: 1

Signal assignment statement:

182: next_state <= s_oc_idle;
Count: 28171
Threshold: 1

Signal assignment statement:

184: next_state <= s_oc_receiver;
Count: 1172
Threshold: 1

If statement:

188:            if (set_idle = '1') then 
189:                next_state <= s_oc_idle; 
190:            elsif (set_transmitter = '1') then 
191:                next_state <= s_oc_transmitter; 
192:            end if;

Count: 147308
Threshold: 1

Signal assignment statement:

189: next_state <= s_oc_idle;
Count: 56703
Threshold: 1

Signal assignment statement:

191: next_state <= s_oc_transmitter;
Count: 1067
Threshold: 1

Signal assignment statement:

202: is_idle <= '0';
Count: 114459
Threshold: 1

Signal assignment statement:

203: is_transmitter <= '0';
Count: 114459
Threshold: 1

Signal assignment statement:

204: is_receiver <= '0';
Count: 114459
Threshold: 1

Sequential statement:

206:        case curr_state is 
207:        when s_oc_off => 
...
213:            is_receiver <= '1'; 
214:        end case;

Count: 114459
Threshold: 1

Signal assignment statement:

209: is_idle <= '1';
Count: 55452
Threshold: 1

Signal assignment statement:

211: is_transmitter <= '1';
Count: 19892
Threshold: 1

Signal assignment statement:

213: is_receiver <= '1';
Count: 30888
Threshold: 1

If statement:

222:        if (res_n = '0') then 
223:            curr_state <= s_oc_off; 
224:        elsif (rising_edge(clk_sys)) then 
225:            curr_state <= next_state; 
226:        end if;

Count: 1055177083
Threshold: 1

Signal assignment statement:

223: curr_state <= s_oc_off;
Count: 2418499
Threshold: 1

Signal assignment statement:

225: curr_state <= next_state;
Count: 526374300
Threshold: 1

Uncovered branches:

Excluded branches:

Covered branches:

"if" / "when" / "else" condition:

151: go_to_off <= '1' when (is_bus_off = '1') and (rx_trigger = '1')

	Evaluated to	Count	Threshold
Bin	True	319372	1
Bin	False	19729519	1

"case" / "with" / "select" choice:

164: when s_oc_off =>

	Choice of	Count	Threshold
Bin	`s_oc_off`	643461	1

"if" / "when" / "else" condition:

165: if (set_idle = '1') then

	Evaluated to	Count	Threshold
Bin	True	6636	1
Bin	False	636825	1

"case" / "with" / "select" choice:

169: when s_oc_idle =>

	Choice of	Count	Threshold
Bin	`s_oc_idle`	168836	1

"if" / "when" / "else" condition:

170: if (go_to_off = '1') then

	Evaluated to	Count	Threshold
Bin	True	6767	1
Bin	False	162069	1

"if" / "when" / "else" condition:

172: elsif (set_transmitter = '1') then

	Evaluated to	Count	Threshold
Bin	True	19375	1
Bin	False	142694	1

"if" / "when" / "else" condition:

174: elsif (set_receiver = '1') then

	Evaluated to	Count	Threshold
Bin	True	30070	1
Bin	False	112624	1

"case" / "with" / "select" choice:

178: when s_oc_transmitter =>

	Choice of	Count	Threshold
Bin	`s_oc_transmitter`	117936	1

"if" / "when" / "else" condition:

179: if (go_to_off = '1') then

	Evaluated to	Count	Threshold
Bin	True	112	1
Bin	False	117824	1

"if" / "when" / "else" condition:

181: elsif (set_idle = '1') then

	Evaluated to	Count	Threshold
Bin	True	28171	1
Bin	False	89653	1

"if" / "when" / "else" condition:

183: elsif (set_receiver = '1' or arbitration_lost = '1') then

	Evaluated to	Count	Threshold
Bin	True	1172	1
Bin	False	88481	1

"case" / "with" / "select" choice:

187: when s_oc_receiver =>

	Choice of	Count	Threshold
Bin	`s_oc_receiver`	147308	1

"if" / "when" / "else" condition:

188: if (set_idle = '1') then

	Evaluated to	Count	Threshold
Bin	True	56703	1
Bin	False	90605	1

"if" / "when" / "else" condition:

190: elsif (set_transmitter = '1') then

	Evaluated to	Count	Threshold
Bin	True	1067	1
Bin	False	89538	1

"case" / "with" / "select" choice:

207: when s_oc_off =>

	Choice of	Count	Threshold
Bin	`s_oc_off`	8227	1

"case" / "with" / "select" choice:

208: when s_oc_idle =>

	Choice of	Count	Threshold
Bin	`s_oc_idle`	55452	1

"case" / "with" / "select" choice:

210: when s_oc_transmitter =>

	Choice of	Count	Threshold
Bin	`s_oc_transmitter`	19892	1

"case" / "with" / "select" choice:

212: when s_oc_receiver =>

	Choice of	Count	Threshold
Bin	`s_oc_receiver`	30888	1

"if" / "when" / "else" condition:

222: if (res_n = '0') then

	Evaluated to	Count	Threshold
Bin	True	2418499	1
Bin	False	1052758584	1

"if" / "when" / "else" condition:

224: elsif (rising_edge(clk_sys)) then

	Evaluated to	Count	Threshold
Bin	True	526374300	1
Bin	False	526384284	1

Uncovered toggles:

Excluded toggles:

Covered toggles:

Port:

CLK_SYS

	From	To	Count	Threshold
Bin	0	1	527578869	1
Bin	1	0	527580460	1

Port:

RES_N

	From	To	Count	Threshold
Bin	0	1	8082	1
Bin	1	0	8072	1

Port:

RX_TRIGGER

	From	To	Count	Threshold
Bin	0	1	10015414	1
Bin	1	0	10017014	1

Port:

IS_BUS_OFF

	From	To	Count	Threshold
Bin	0	1	8227	1
Bin	1	0	8236	1

Port:

ARBITRATION_LOST

	From	To	Count	Threshold
Bin	0	1	1172	1
Bin	1	0	2772	1

Port:

SET_TRANSMITTER

	From	To	Count	Threshold
Bin	0	1	39810	1
Bin	1	0	41410	1

Port:

SET_RECEIVER

	From	To	Count	Threshold
Bin	0	1	30469	1
Bin	1	0	32069	1

Port:

SET_IDLE

	From	To	Count	Threshold
Bin	0	1	95674	1
Bin	1	0	97274	1

Port:

IS_TRANSMITTER

	From	To	Count	Threshold
Bin	0	1	19892	1
Bin	1	0	21492	1

Port:

IS_RECEIVER

	From	To	Count	Threshold
Bin	0	1	30888	1
Bin	1	0	32482	1

Port:

IS_IDLE

	From	To	Count	Threshold
Bin	0	1	55452	1
Bin	1	0	57049	1

Signal:

GO_TO_OFF

	From	To	Count	Threshold
Bin	0	1	319372	1
Bin	1	0	320972	1

Uncovered expressions:

Excluded expressions:

Covered expressions:

"=" expression

151: go_to_off <= '1' when (is_bus_off = '1') and (rx_trigger = '1')

	Evaluated to	Count	Threshold
Bin	False	19408738	1
Bin	True	640153	1

"=" expression

151: go_to_off <= '1' when (is_bus_off = '1') and (rx_trigger = '1')

	Evaluated to	Count	Threshold
Bin	False	10026659	1
Bin	True	10022232	1

"and" expression

151:    go_to_off <= '1' when (is_bus_off = '1') and (rx_trigger = '1') 
                               <-----LHS------>       <-----RHS------>

	LHS	RHS	Count	Threshold
Bin	False	True	9702860	1
Bin	True	False	320781	1
Bin	True	True	319372	1

"=" expression

165: if (set_idle = '1') then

	Evaluated to	Count	Threshold
Bin	False	636825	1
Bin	True	6636	1

"=" expression

170: if (go_to_off = '1') then

	Evaluated to	Count	Threshold
Bin	False	162069	1
Bin	True	6767	1

"=" expression

172: elsif (set_transmitter = '1') then

	Evaluated to	Count	Threshold
Bin	False	142694	1
Bin	True	19375	1

"=" expression

174: elsif (set_receiver = '1') then

	Evaluated to	Count	Threshold
Bin	False	112624	1
Bin	True	30070	1

"=" expression

179: if (go_to_off = '1') then

	Evaluated to	Count	Threshold
Bin	False	117824	1
Bin	True	112	1

"=" expression

181: elsif (set_idle = '1') then

	Evaluated to	Count	Threshold
Bin	False	89653	1
Bin	True	28171	1

"=" expression

183: elsif (set_receiver = '1' or arbitration_lost = '1') then

	Evaluated to	Count	Threshold
Bin	False	89544	1
Bin	True	109	1

"=" expression

183: elsif (set_receiver = '1' or arbitration_lost = '1') then

	Evaluated to	Count	Threshold
Bin	False	88590	1
Bin	True	1063	1

"or" expression

183:            elsif (set_receiver = '1' or arbitration_lost = '1') then 
                       <------LHS------->    <--------RHS--------->

	LHS	RHS	Count	Threshold
Bin	False	False	88481	1
Bin	False	True	1063	1
Bin	True	False	109	1

"=" expression

188: if (set_idle = '1') then

	Evaluated to	Count	Threshold
Bin	False	90605	1
Bin	True	56703	1

"=" expression

190: elsif (set_transmitter = '1') then

	Evaluated to	Count	Threshold
Bin	False	89538	1
Bin	True	1067	1

"=" expression

222: if (res_n = '0') then

	Evaluated to	Count	Threshold
Bin	False	1052758584	1
Bin	True	2418499	1

Uncovered FSM states:

Excluded FSM states:

Covered FSM states:

"T_OPERATION_CONTROL_STATE" FSM

138: signal curr_state : t_operation_control_state;

	State	Count	Threshold
Bin	S_OC_OFF	8227	1
Bin	S_OC_IDLE	55452	1
Bin	S_OC_TRANSMITTER	19892	1
Bin	S_OC_RECEIVER	30888	1

"T_OPERATION_CONTROL_STATE" FSM

139: signal next_state : t_operation_control_state;

	State	Count	Threshold
Bin	S_OC_OFF	14864	1
Bin	S_OC_IDLE	98174	1
Bin	S_OC_TRANSMITTER	30413	1
Bin	S_OC_RECEIVER	58206	1

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.CAN_CORE_INST.OPERATION_CONTROL_INST

File: /__w/ctu-can-regression/ctu-can-regression/src/can_core/operation_control.vhd

Sub-instances:

Current Instance:

Details:

The limit of printed items was reached (5000). Total 261615 items are not displayed.

Uncovered statements:

Excluded statements:

Covered statements:

If statement:

Signal assignment statement:

Signal assignment statement:

Signal assignment statement:

Sequential statement:

If statement:

Signal assignment statement:

If statement:

Signal assignment statement:

Signal assignment statement:

Signal assignment statement:

If statement:

Signal assignment statement:

Signal assignment statement:

Signal assignment statement:

If statement:

Signal assignment statement:

Signal assignment statement:

Signal assignment statement:

Signal assignment statement:

Signal assignment statement:

Sequential statement:

Signal assignment statement:

Signal assignment statement:

Signal assignment statement:

If statement:

Signal assignment statement:

Signal assignment statement:

Uncovered branches:

Excluded branches:

Covered branches:

"if" / "when" / "else" condition:

"case" / "with" / "select" choice:

"if" / "when" / "else" condition:

"case" / "with" / "select" choice:

"if" / "when" / "else" condition:

"if" / "when" / "else" condition:

"if" / "when" / "else" condition:

"case" / "with" / "select" choice:

"if" / "when" / "else" condition:

"if" / "when" / "else" condition:

"if" / "when" / "else" condition:

"case" / "with" / "select" choice:

"if" / "when" / "else" condition:

"if" / "when" / "else" condition:

"case" / "with" / "select" choice:

"case" / "with" / "select" choice:

"case" / "with" / "select" choice:

"case" / "with" / "select" choice:

"if" / "when" / "else" condition:

"if" / "when" / "else" condition:

Uncovered toggles:

Excluded toggles:

Covered toggles:

Port:

Port:

Port:

Port:

Port:

Port:

Port:

Port:

Port:

Port:

Port:

Signal:

Uncovered expressions:

Excluded expressions:

Covered expressions:

"=" expression

"=" expression