NVC code coverage report

Hierarchy

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.MEMORY_REGISTERS_INST.MT_3_TXT_BUFFS

File:  /__w/ctu-can-regression/ctu-can-regression/src/memory_registers/memory_registers.vhd


Current Instance Statement Branch Toggle Expression FSM state Functional Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.MEMORY_REGISTERS_INST.MT_3_TXT_BUFFS 100.0 % (4/4) 100.0 % (2/2) N.A. 100.0 % (5/5) N.A. N.A. 100.0 % (11/11)

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.


Statement Branch Toggle Expression FSM state Functional

Uncovered statements:

Excluded statements:

Covered statements:

Signal assignment statement on line 636:

636:        mr_tx_priority(3)       <= mr_ctrl_out_i.tx_priority_txt4p
Count: 1645
Threshold: 1

If statement on lines 637 to 639:

637:        mr_tx_command_txbi(3)   <= mr_ctrl_out_i.tx_command_txb4 when (mr_ctrl_out_i.mode_txbbm = '0') 
638:                                                                 else 
639:                                   mr_ctrl_out_i.tx_command_txb3 or mr_ctrl_out_i.tx_command_txb4; 

Count: 2411
Threshold: 1

Signal assignment statement on line 637:

637:        mr_tx_command_txbi(3)   <= mr_ctrl_out_i.tx_command_txb4 when (mr_ctrl_out_i.mode_txbbm = '0') 
Count: 1630
Threshold: 1

Signal assignment statement on line 639:

639:                                   mr_ctrl_out_i.tx_command_txb3 or mr_ctrl_out_i.tx_command_txb4
Count: 781
Threshold: 1

Uncovered branches:

Excluded branches:

Covered branches:

"if" / "when" / "else" condition on line 637:

637:        mr_tx_command_txbi(3)   <= mr_ctrl_out_i.tx_command_txb4 when (mr_ctrl_out_i.mode_txbbm = '0'
Evaluated toCountThreshold
BinTrue16301
BinFalse7811

Uncovered toggles:

Excluded toggles:

Covered toggles:

Uncovered expressions:

Excluded expressions:

Covered expressions:

"=" expression on line 637:

 mr_ctrl_out_i.mode_txbbm = '0' 
Evaluated toCountThreshold
BinFalse7811
BinTrue16301

"or" expression on line 639:

 mr_ctrl_out_i.tx_command_txb3 or mr_ctrl_out_i.tx_command_txb4 
 <------------LHS------------>    <------------RHS------------> 

LHSRHSCountThreshold
Bin'0''0'631
Bin'0''1'81
Bin'1''0'501

Uncovered FSM states:

Excluded FSM states:

Covered FSM states:

Uncovered functional coverage:

Excluded functional coverage:

Covered functional coverage: