NVC code coverage report

File: /__w/ctu-can-regression/ctu-can-regression/src/tx_arbitrator/tx_arbitrator.vhd

Current Instance	Statement	Branch	Toggle	Expression	FSM state	Functional	Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.TX_ARBITRATOR_INST.TXTB_PRIORITY_GEN(7).TXTB_PRIORITY_ODD_GEN	100.0 % (6/6)	100.0 % (4/4)	N.A.	100.0 % (14/14)	N.A.	N.A.	100.0 % (24/24)

Current Instance

Statement

Branch

Toggle

Expression

FSM state

Functional

Average

CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.TX_ARBITRATOR_INST.TXTB_PRIORITY_GEN(7).TXTB_PRIORITY_ODD_GEN

100.0 % (6/6)

100.0 % (4/4)

N.A.

100.0 % (14/14)

N.A.

100.0 % (24/24)

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.

Statement

Branch

Toggle

Expression

FSM state

Functional

Uncovered statements:

Excluded statements:

Covered statements:

If statement on lines 428 to 430:

428:            mr_tx_priority_txbbm(i) <= mr_tx_priority(i) when (mr_mode_txbbm = '0') 
429:                                                         else 
430:                                       mr_tx_priority(i - 1);

Count: 490
Threshold: 1

Signal assignment statement on line 428:

428: mr_tx_priority_txbbm(i) <= mr_tx_priority(i) when (mr_mode_txbbm = '0')
Count: 233
Threshold: 1

Signal assignment statement on line 430:

430: mr_tx_priority(i - 1);
Count: 257
Threshold: 1

If statement on lines 432 to 435:

432:            txtb_is_bb(i / 2) <= '1' when (mr_mode_txbbm = '1' and curr_txtb_index_i = i-1 and 
433:                                           txtb_allow_bb(i - 1) = '1') 
434:                                     else 
435:                                 '0';

Count: 1699
Threshold: 1

Signal assignment statement on line 432:

432:            txtb_is_bb(i / 2) <= '1' when (mr_mode_txbbm = '1' and curr_txtb_index_i = i-1 and

Count: 7
Threshold: 1

Signal assignment statement on line 435:

435: '0';
Count: 1692
Threshold: 1

Uncovered branches:

Excluded branches:

Covered branches:

"if" / "when" / "else" condition on line 428:

428: mr_tx_priority_txbbm(i) <= mr_tx_priority(i) when (mr_mode_txbbm = '0')

	Evaluated to	Count	Threshold
Bin	True	233	1
Bin	False	257	1

"if" / "when" / "else" condition on lines 432 to 433:

432:            txtb_is_bb(i / 2) <= '1' when (mr_mode_txbbm = '1' and curr_txtb_index_i = i-1 and 
433:                                           txtb_allow_bb(i - 1) = '1')

	Evaluated to	Count	Threshold
Bin	True	7	1
Bin	False	1692	1

Uncovered toggles:

Excluded toggles:

Covered toggles:

Uncovered expressions:

Excluded expressions:

"and" expression on lines 432 to 433:

 mr_mode_txbbm = '1' and curr_txtb_index_i = i-1 and txtb_allow_bb(i - 1) = '1' 
 <---------------------LHS--------------------->     <----------RHS----------->

	LHS	RHS	Count	Threshold	Excluded due to
Bin	False	True	0	1	Unreachable

Covered expressions:

"=" expression on line 428:

mr_mode_txbbm = '0'

	Evaluated to	Count	Threshold
Bin	False	257	1
Bin	True	233	1

"and" expression on lines 432 to 433:

 mr_mode_txbbm = '1' and curr_txtb_index_i = i-1 and txtb_allow_bb(i - 1) = '1' 
 <---------------------LHS--------------------->     <----------RHS----------->

	LHS	RHS	Count	Threshold
Bin	True	False	7	1
Bin	True	True	7	1

"and" expression on line 432:

 mr_mode_txbbm = '1' and curr_txtb_index_i = i-1 
 <-------LHS------->     <---------RHS--------->

	LHS	RHS	Count	Threshold
Bin	False	True	336	1
Bin	True	False	94	1
Bin	True	True	14	1

"=" expression on line 432:

mr_mode_txbbm = '1'

	Evaluated to	Count	Threshold
Bin	False	1591	1
Bin	True	108	1

"=" expression on line 432:

curr_txtb_index_i = i-1

	Evaluated to	Count	Threshold
Bin	False	1349	1
Bin	True	350	1

"=" expression on line 433:

txtb_allow_bb(i - 1) = '1'

	Evaluated to	Count	Threshold
Bin	False	7	1
Bin	True	7	1

NVC code coverage report

Hierarchy

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.TX_ARBITRATOR_INST.TXTB_PRIORITY_GEN(7).TXTB_PRIORITY_ODD_GEN

File: /__w/ctu-can-regression/ctu-can-regression/src/tx_arbitrator/tx_arbitrator.vhd

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.

Uncovered statements:

Excluded statements:

Covered statements:

If statement on lines 428 to 430:

Signal assignment statement on line 428:

Signal assignment statement on line 430:

If statement on lines 432 to 435:

Signal assignment statement on line 432:

Signal assignment statement on line 435:

Uncovered branches:

Excluded branches:

Covered branches:

"if" / "when" / "else" condition on line 428:

"if" / "when" / "else" condition on lines 432 to 433:

Uncovered toggles:

Excluded toggles:

Covered toggles:

Uncovered expressions:

Excluded expressions:

"and" expression on lines 432 to 433:

Covered expressions:

"=" expression on line 428:

"and" expression on lines 432 to 433:

"and" expression on line 432:

"=" expression on line 432:

"=" expression on line 432:

"=" expression on line 433:

Uncovered FSM states:

Excluded FSM states:

Covered FSM states:

Uncovered functional coverage:

Excluded functional coverage:

Covered functional coverage: