NVC code coverage report

Hierarchy

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.RX_BUFFER_INST.RX_BUFFER_RAM_INST.PARITY_FALSE_GEN

File:  /__w/ctu-can-regression/ctu-can-regression/src/rx_buffer/rx_buffer_ram.vhd


Current Instance Statement Branch Toggle Expression FSM state Functional Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.RX_BUFFER_INST.RX_BUFFER_RAM_INST.PARITY_FALSE_GEN 100.0 % (5/5) N.A. N.A. N.A. N.A. N.A. 100.0 % (5/5)

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.


Statement Branch Toggle Expression FSM state Functional

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Signal assignment statement on line 270:

270:        parity_mismatch <= '0'; 
Count: 941
Threshold: 1

Signal assignment statement on line 271:

271:        parity_read_real <= '0'; 
Count: 941
Threshold: 1

Signal assignment statement on line 272:

272:        parity_read_exp <= '0'; 
Count: 941
Threshold: 1

Signal assignment statement on line 273:

273:        parity_word <= (others => '0'); 
Count: 941
Threshold: 1

Signal assignment statement on line 274:

274:        parity_write <= '0'; 
Count: 941
Threshold: 1

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