NVC code coverage report

Hierarchy

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.CAN_CORE_INST.PROTOCOL_CONTROL_INST.RX_SHIFT_REG_INST.RX_SHIFT_RES_REG_INST

File:  /__w/ctu-can-regression/ctu-can-regression/src/can_core/rx_shift_reg.vhd

Nested Instances Statement Branch Toggle Expression FSM state Functional Average
RX_SHIFT_RES_REG_INST 100.0 % (3/3) 100.0 % (4/4) 100.0 % (8/8) 100.0 % (2/2) N.A. N.A. 100.0 % (17/17)
MUX2_RES_TST_INST 100.0 % (3/3) 100.0 % (2/2) 100.0 % (8/8) N.A. N.A. N.A. 100.0 % (13/13)

Current Instance Statement Branch Toggle Expression FSM state Functional Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.CAN_CORE_INST.PROTOCOL_CONTROL_INST.RX_SHIFT_REG_INST.RX_SHIFT_RES_REG_INST N.A. N.A. 100.0 % (12/12) N.A. N.A. N.A. 100.0 % (12/12)

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.


Statement Branch Toggle Expression FSM state Functional

Uncovered statements:

Excluded statements:

Covered statements:

Uncovered branches:

Excluded branches:

Covered branches:

Uncovered toggles:

Excluded toggles:

Port:

 CLK
FromToCountThresholdExcluded due to
Bin0101Exclude file
Bin1001Exclude file

Port:

 ARST
FromToCountThresholdExcluded due to
Bin0101Exclude file
Bin1001Exclude file

Port:

 D
FromToCountThresholdExcluded due to
Bin0101Exclude file
Bin1001Exclude file

Port:

 SCAN_ENABLE
FromToCountThresholdExcluded due to
Bin0101Exclude file
Bin1001Exclude file

Covered toggles:

Port:

 Q
FromToCountThreshold
Bin01638451
Bin10638341

Signal:

 Q_I
FromToCountThreshold
Bin01638451
Bin10638341

Uncovered expressions:

Excluded expressions:

Covered expressions:

Uncovered FSM states:

Excluded FSM states:

Covered FSM states:

Uncovered functional coverage:

Excluded functional coverage:

Covered functional coverage: