NVC code coverage report

Hierarchy

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.RX_BUFFER_INST.RX_BUFFER_POINTERS_INST

File:  /__w/ctu-can-regression/ctu-can-regression/src/rx_buffer/rx_buffer.vhd


Current Instance Statement Branch Toggle Expression FSM state Functional Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.RX_BUFFER_INST.RX_BUFFER_POINTERS_INST 100.0 % (59/59) 100.0 % (60/60) 100.0 % (468/468) 100.0 % (55/55) N.A. N.A. 100.0 % (642/642)

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.


Statement Branch Toggle Expression FSM state Functional

Uncovered statements:

Excluded statements:

Covered statements:

Signal assignment statement on line 214:

214:    read_pointer        <= std_logic_vector(read_pointer_i); 
Count: 55704
Threshold: 1

Signal assignment statement on line 215:

215:    read_pointer_inc_1  <= std_logic_vector(read_pointer_inc_1_i); 
Count: 57305
Threshold: 1

Signal assignment statement on line 216:

216:    write_pointer       <= std_logic_vector(write_pointer_i); 
Count: 17729
Threshold: 1

Signal assignment statement on line 217:

217:    write_pointer_raw   <= std_logic_vector(write_pointer_raw_i); 
Count: 210673
Threshold: 1

Signal assignment statement on line 218:

218:    write_pointer_ts    <= std_logic_vector(write_pointer_ts_i); 
Count: 30801
Threshold: 1

Signal assignment statement on line 219:

219:    rx_mem_free_i       <= std_logic_vector(rx_mem_free_i_i); 
Count: 68645
Threshold: 1

If statement on lines 221 to 223:

221:    abort_applied <= '1' when (rec_abort_f = '1' or commit_overrun_abort = '1') 
222:                         else 
223:                     '0'; 
Count: 67481
Threshold: 1

Signal assignment statement on line 221:

221:    abort_applied <= '1' when (rec_abort_f = '1' or commit_overrun_abort = '1') 
Count: 31339
Threshold: 1

Signal assignment statement on line 223:

223:                     '0'; 
Count: 36142
Threshold: 1

If statement on lines 231 to 237:

231:        if (rx_buf_res_n_q_scan = '0') then 
232:            read_pointer_i <= (others => '0'); 
...
236:            end if; 
237:        end if; 
Count: 1090018917
Threshold: 1

Signal assignment statement on line 232:

232:            read_pointer_i <= (others => '0'); 
Count: 2438917
Threshold: 1

If statement on lines 234 to 236:

234:            if (read_increment = '1') then 
235:                read_pointer_i <= read_pointer_inc_1_i; 
236:            end if; 
Count: 543784839
Threshold: 1

Signal assignment statement on line 235:

235:                read_pointer_i <= read_pointer_inc_1_i; 
Count: 51685
Threshold: 1

If statement on lines 246 to 252:

246:        if (rx_buf_res_n_q_scan = '0') then 
247:            write_pointer_i <= (others => '0'); 
...
251:            end if; 
252:        end if; 
Count: 1090018917
Threshold: 1

Signal assignment statement on line 247:

247:            write_pointer_i <= (others => '0'); 
Count: 2438917
Threshold: 1

If statement on lines 249 to 251:

249:            if (commit_rx_frame = '1') then 
250:                write_pointer_i <= write_pointer_raw_i; 
251:            end if; 
Count: 543784839
Threshold: 1

Signal assignment statement on line 250:

250:                write_pointer_i <= write_pointer_raw_i; 
Count: 13358
Threshold: 1

If statement on lines 262 to 264:

262:    write_pointer_raw_d <= write_pointer_raw_i + 1 when (write_raw_OK = '1') 
263:                                                   else 
264:                                   write_pointer_i; 
Count: 451318
Threshold: 1

Signal assignment statement on line 262:

262:    write_pointer_raw_d <= write_pointer_raw_i + 1 when (write_raw_OK = '1') 
Count: 305789
Threshold: 1

Signal assignment statement on line 264:

264:                                   write_pointer_i; 
Count: 145529
Threshold: 1

If statement on lines 266 to 269:

266:    write_pointer_raw_ce <= '1' when (write_raw_OK = '1') else 
267:                            '1' when (rec_abort_f = '1') else 
268:                            '1' when (commit_overrun_abort = '1') else 
269:                            '0'; 
Count: 293167
Threshold: 1

Signal assignment statement on line 266:

266:    write_pointer_raw_ce <= '1' when (write_raw_OK = '1') else 
Count: 112847
Threshold: 1

Signal assignment statement on line 267:

267:                            '1' when (rec_abort_f = '1') else 
Count: 31306
Threshold: 1

Signal assignment statement on line 268:

268:                            '1' when (commit_overrun_abort = '1') else 
Count: 41
Threshold: 1

Signal assignment statement on line 269:

269:                            '0'; 
Count: 148973
Threshold: 1

If statement on lines 273 to 279:

273:        if (rx_buf_res_n_q_scan = '0') then 
274:           write_pointer_raw_i <= (others => '0'); 
...
278:            end if; 
279:        end if; 
Count: 1090018917
Threshold: 1

Signal assignment statement on line 274:

274:           write_pointer_raw_i <= (others => '0'); 
Count: 2438917
Threshold: 1

If statement on lines 276 to 278:

276:            if (write_pointer_raw_ce = '1') then 
277:                write_pointer_raw_i <= write_pointer_raw_d; 
278:            end if; 
Count: 543784839
Threshold: 1

Signal assignment statement on line 277:

277:                write_pointer_raw_i <= write_pointer_raw_d; 
Count: 224285
Threshold: 1

If statement on lines 286 to 288:

286:    write_pointer_ts_d <= write_pointer_raw_i when (store_ts_wr_ptr = '1') 
287:                                              else 
288:                          write_pointer_ts_i + 1; 
Count: 278412
Threshold: 1

Signal assignment statement on line 286:

286:    write_pointer_ts_d <= write_pointer_raw_i when (store_ts_wr_ptr = '1') 
Count: 52822
Threshold: 1

Signal assignment statement on line 288:

288:                          write_pointer_ts_i + 1; 
Count: 225590
Threshold: 1

If statement on lines 291 to 293:

291:    write_pointer_ts_ce <= '1' when (store_ts_wr_ptr = '1') else 
292:                           '1' when (inc_ts_wr_ptr = '1') else 
293:                           '0'; 
Count: 82148
Threshold: 1

Signal assignment statement on line 291:

291:    write_pointer_ts_ce <= '1' when (store_ts_wr_ptr = '1') else 
Count: 26411
Threshold: 1

Signal assignment statement on line 292:

292:                           '1' when (inc_ts_wr_ptr = '1') else 
Count: 13062
Threshold: 1

Signal assignment statement on line 293:

293:                           '0'; 
Count: 42675
Threshold: 1

If statement on lines 297 to 303:

297:        if (rx_buf_res_n_q_scan = '0') then 
298:            write_pointer_ts_i  <= (others => '0'); 
...
302:            end if; 
303:        end if; 
Count: 1090018917
Threshold: 1

Signal assignment statement on line 298:

298:            write_pointer_ts_i  <= (others => '0'); 
Count: 2438917
Threshold: 1

If statement on lines 300 to 302:

300:            if (write_pointer_ts_ce = '1') then 
301:                write_pointer_ts_i <= write_pointer_ts_d; 
302:            end if; 
Count: 543784839
Threshold: 1

Signal assignment statement on line 301:

301:                write_pointer_ts_i <= write_pointer_ts_d; 
Count: 39473
Threshold: 1

If statement on lines 312 to 364:

312:        if (rx_buf_res_n_q_scan = '0') then 
313:            rx_mem_free_i_i <= to_unsigned(G_RX_BUFF_SIZE, C_FREE_MEM_WIDTH); 
...
363: 
364:        end if; 
Count: 1090018917
Threshold: 1

Signal assignment statement on line 313:

313:            rx_mem_free_i_i <= to_unsigned(G_RX_BUFF_SIZE, C_FREE_MEM_WIDTH); 
Count: 2438917
Threshold: 1

Signal assignment statement on line 314:

314:            rx_mem_free_raw <= to_unsigned(G_RX_BUFF_SIZE, C_FREE_MEM_WIDTH); 
Count: 2438917
Threshold: 1

If statement on lines 321 to 346:

321:            if (read_increment = '1') then 
322: 
...
345:                end if; 
346:            end if; 
Count: 543784839
Threshold: 1

If statement on lines 325 to 334:

325:                if (abort_applied = '1') then 
326:                    rx_mem_free_raw <= rx_mem_free_i_inc_1; 
...
333:                -- rx_mem_free_raw remains unchanged. 
334:                end if; 
Count: 51685
Threshold: 1

Signal assignment statement on line 326:

326:                    rx_mem_free_raw <= rx_mem_free_i_inc_1; 
Count: 20
Threshold: 1

Signal assignment statement on line 330:

330:                    rx_mem_free_raw <= rx_mem_free_raw_inc_1; 
Count: 51604
Threshold: 1

If statement on lines 339 to 345:

339:                if (abort_applied = '1') then 
340:                    rx_mem_free_raw <= rx_mem_free_i_i; 
...
344:                    rx_mem_free_raw <= rx_mem_free_raw_dec_1; 
345:                end if; 
Count: 543733154
Threshold: 1

Signal assignment statement on line 340:

340:                    rx_mem_free_raw <= rx_mem_free_i_i; 
Count: 31319
Threshold: 1

Signal assignment statement on line 344:

344:                    rx_mem_free_raw <= rx_mem_free_raw_dec_1; 
Count: 192885
Threshold: 1

If statement on lines 353 to 362:

353:            if (read_increment = '1') then 
354:                if (commit_rx_frame = '1') then 
...
361:                rx_mem_free_i_i <= rx_mem_free_raw; 
362:            end if; 
Count: 543784839
Threshold: 1

If statement on lines 354 to 358:

354:                if (commit_rx_frame = '1') then 
355:                    rx_mem_free_i_i <= rx_mem_free_raw_inc_1; 
356:                else 
357:                    rx_mem_free_i_i <= rx_mem_free_i_inc_1; 
358:                end if; 
Count: 51685
Threshold: 1

Signal assignment statement on line 355:

355:                    rx_mem_free_i_i <= rx_mem_free_raw_inc_1; 
Count: 27
Threshold: 1

Signal assignment statement on line 357:

357:                    rx_mem_free_i_i <= rx_mem_free_i_inc_1; 
Count: 51658
Threshold: 1

Signal assignment statement on line 361:

361:                rx_mem_free_i_i <= rx_mem_free_raw; 
Count: 13331
Threshold: 1

Signal assignment statement on line 373:

373:        rx_mem_free_i_inc_1     <= rx_mem_free_i_i + 1; 
Count: 274866
Threshold: 1

Signal assignment statement on line 374:

374:        rx_mem_free_raw_inc_1   <= rx_mem_free_raw + 1; 
Count: 274866
Threshold: 1

Signal assignment statement on line 375:

375:        rx_mem_free_raw_dec_1   <= rx_mem_free_raw - 1; 
Count: 274866
Threshold: 1

Signal assignment statement on line 386:

386:        read_pointer_inc_1_i <= read_pointer_i + 1; 
Count: 55704
Threshold: 1

Uncovered branches:

Excluded branches:

Covered branches:

"if" / "when" / "else" condition on line 221:

221:    abort_applied <= '1' when (rec_abort_f = '1' or commit_overrun_abort = '1') 
Evaluated toCountThreshold
BinTrue313391
BinFalse361421

"if" / "when" / "else" condition on line 231:

231:        if (rx_buf_res_n_q_scan = '0') then 
Evaluated toCountThreshold
BinTrue24389171
BinFalse10875800001

"if" / "when" / "else" condition on line 233:

233:        elsif (rising_edge(clk_sys)) then 
Evaluated toCountThreshold
BinTrue5437848391
BinFalse5437951611

"if" / "when" / "else" condition on line 234:

234:            if (read_increment = '1') then 
Evaluated toCountThreshold
BinTrue516851
BinFalse5437331541

"if" / "when" / "else" condition on line 246:

246:        if (rx_buf_res_n_q_scan = '0') then 
Evaluated toCountThreshold
BinTrue24389171
BinFalse10875800001

"if" / "when" / "else" condition on line 248:

248:        elsif (rising_edge(clk_sys)) then 
Evaluated toCountThreshold
BinTrue5437848391
BinFalse5437951611

"if" / "when" / "else" condition on line 249:

249:            if (commit_rx_frame = '1') then 
Evaluated toCountThreshold
BinTrue133581
BinFalse5437714811

"if" / "when" / "else" condition on line 262:

262:    write_pointer_raw_d <= write_pointer_raw_i + 1 when (write_raw_OK = '1') 
Evaluated toCountThreshold
BinTrue3057891
BinFalse1455291

"if" / "when" / "else" condition on line 266:

266:    write_pointer_raw_ce <= '1' when (write_raw_OK = '1') else 
Evaluated toCountThreshold
BinTrue1128471
BinFalse1803201

"if" / "when" / "else" condition on line 267:

267:                            '1' when (rec_abort_f = '1') else 
Evaluated toCountThreshold
BinTrue313061
BinFalse1490141

"if" / "when" / "else" condition on line 268:

268:                            '1' when (commit_overrun_abort = '1') else 
Evaluated toCountThreshold
BinTrue411
BinFalse1489731

"if" / "when" / "else" condition on line 273:

273:        if (rx_buf_res_n_q_scan = '0') then 
Evaluated toCountThreshold
BinTrue24389171
BinFalse10875800001

"if" / "when" / "else" condition on line 275:

275:        elsif (rising_edge(clk_sys)) then 
Evaluated toCountThreshold
BinTrue5437848391
BinFalse5437951611

"if" / "when" / "else" condition on line 276:

276:            if (write_pointer_raw_ce = '1') then 
Evaluated toCountThreshold
BinTrue2242851
BinFalse5435605541

"if" / "when" / "else" condition on line 286:

286:    write_pointer_ts_d <= write_pointer_raw_i when (store_ts_wr_ptr = '1') 
Evaluated toCountThreshold
BinTrue528221
BinFalse2255901

"if" / "when" / "else" condition on line 291:

291:    write_pointer_ts_ce <= '1' when (store_ts_wr_ptr = '1') else 
Evaluated toCountThreshold
BinTrue264111
BinFalse557371

"if" / "when" / "else" condition on line 292:

292:                           '1' when (inc_ts_wr_ptr = '1') else 
Evaluated toCountThreshold
BinTrue130621
BinFalse426751

"if" / "when" / "else" condition on line 297:

297:        if (rx_buf_res_n_q_scan = '0') then 
Evaluated toCountThreshold
BinTrue24389171
BinFalse10875800001

"if" / "when" / "else" condition on line 299:

299:        elsif (rising_edge(clk_sys)) then 
Evaluated toCountThreshold
BinTrue5437848391
BinFalse5437951611

"if" / "when" / "else" condition on line 300:

300:            if (write_pointer_ts_ce = '1') then 
Evaluated toCountThreshold
BinTrue394731
BinFalse5437453661

"if" / "when" / "else" condition on line 312:

312:        if (rx_buf_res_n_q_scan = '0') then 
Evaluated toCountThreshold
BinTrue24389171
BinFalse10875800001

"if" / "when" / "else" condition on line 316:

316:        elsif (rising_edge(clk_sys)) then 
Evaluated toCountThreshold
BinTrue5437848391
BinFalse5437951611

"if" / "when" / "else" condition on line 321:

321:            if (read_increment = '1') then 
Evaluated toCountThreshold
BinTrue516851
BinFalse5437331541

"if" / "when" / "else" condition on line 325:

325:                if (abort_applied = '1') then 
Evaluated toCountThreshold
BinTrue201
BinFalse516651

"if" / "when" / "else" condition on line 329:

329:                elsif (write_raw_OK = '0') then 
Evaluated toCountThreshold
BinTrue516041
BinFalse611

"if" / "when" / "else" condition on line 339:

339:                if (abort_applied = '1') then 
Evaluated toCountThreshold
BinTrue313191
BinFalse5437018351

"if" / "when" / "else" condition on line 343:

343:                elsif (write_raw_OK = '1') then 
Evaluated toCountThreshold
BinTrue1928851
BinFalse5435089501

"if" / "when" / "else" condition on line 353:

353:            if (read_increment = '1') then 
Evaluated toCountThreshold
BinTrue516851
BinFalse5437331541

"if" / "when" / "else" condition on line 354:

354:                if (commit_rx_frame = '1') then 
Evaluated toCountThreshold
BinTrue271
BinFalse516581

"if" / "when" / "else" condition on line 360:

360:            elsif (commit_rx_frame = '1') then 
Evaluated toCountThreshold
BinTrue133311
BinFalse5437198231

Uncovered toggles:

Excluded toggles:

Port:

 CLK_SYS
FromToCountThresholdExcluded due to
Bin0101Exclude file
Bin1001Exclude file

Port:

 RX_BUF_RES_N_Q_SCAN
FromToCountThresholdExcluded due to
Bin0101Exclude file
Bin1001Exclude file

Port:

 REC_ABORT_F
FromToCountThresholdExcluded due to
Bin0101Exclude file
Bin1001Exclude file

Port:

 COMMIT_RX_FRAME
FromToCountThresholdExcluded due to
Bin0101Exclude file
Bin1001Exclude file

Port:

 WRITE_RAW_OK
FromToCountThresholdExcluded due to
Bin0101Exclude file
Bin1001Exclude file

Port:

 COMMIT_OVERRUN_ABORT
FromToCountThresholdExcluded due to
Bin0101Exclude file
Bin1001Exclude file

Port:

 STORE_TS_WR_PTR
FromToCountThresholdExcluded due to
Bin0101Exclude file
Bin1001Exclude file

Port:

 INC_TS_WR_PTR
FromToCountThresholdExcluded due to
Bin0101Exclude file
Bin1001Exclude file

Port:

 READ_INCREMENT
FromToCountThresholdExcluded due to
Bin0101Exclude file
Bin1001Exclude file

Covered toggles:

Port:

 READ_POINTER
ElementFromToCountThreshold
Bin(11)0121
Bin(11)101671
Bin(10)0151
Bin(10)101701
Bin(9)01111
Bin(9)101761
Bin(8)01211
Bin(8)101861
Bin(7)01411
Bin(7)102061
Bin(6)012051
Bin(6)108651
Bin(5)014431
Bin(5)1011031
Bin(4)0115781
Bin(4)1031791
Bin(3)0131841
Bin(3)1047851
Bin(2)0166331
Bin(2)1082341
Bin(1)01130031
Bin(1)10146041
Bin(0)01259731
Bin(0)10275741

Port:

 READ_POINTER_INC_1
ElementFromToCountThreshold
Bin(11)0121
Bin(11)101671
Bin(10)0151
Bin(10)101701
Bin(9)01111
Bin(9)101761
Bin(8)01211
Bin(8)101861
Bin(7)01411
Bin(7)102061
Bin(6)012061
Bin(6)108661
Bin(5)014511
Bin(5)1011111
Bin(4)0115921
Bin(4)1031931
Bin(3)0131941
Bin(3)1047951
Bin(2)0166871
Bin(2)1082881
Bin(1)01131731
Bin(1)10147741
Bin(0)01275741
Bin(0)10259731

Port:

 WRITE_POINTER
ElementFromToCountThreshold
Bin(11)0151
Bin(11)101701
Bin(10)01111
Bin(10)101761
Bin(9)01231
Bin(9)101881
Bin(8)01451
Bin(8)102101
Bin(7)01891
Bin(7)102541
Bin(6)013111
Bin(6)109711
Bin(5)016691
Bin(5)1013291
Bin(4)0119711
Bin(4)1035721
Bin(3)0137771
Bin(3)1053781
Bin(2)0161711
Bin(2)1077701
Bin(1)0118811
Bin(1)1034821
Bin(0)0117351
Bin(0)1033361

Port:

 WRITE_POINTER_RAW
ElementFromToCountThreshold
Bin(11)0161
Bin(11)101711
Bin(10)01121
Bin(10)101771
Bin(9)01251
Bin(9)101901
Bin(8)01481
Bin(8)102131
Bin(7)01941
Bin(7)102591
Bin(6)013541
Bin(6)1010141
Bin(5)017561
Bin(5)1014161
Bin(4)0146071
Bin(4)1062081
Bin(3)01117771
Bin(3)10133781
Bin(2)01268471
Bin(2)10284461
Bin(1)01494351
Bin(1)10510361
Bin(0)01993141
Bin(0)101009151

Port:

 WRITE_POINTER_TS
ElementFromToCountThreshold
Bin(11)0151
Bin(11)101701
Bin(10)01111
Bin(10)101761
Bin(9)01231
Bin(9)101881
Bin(8)01451
Bin(8)102101
Bin(7)01891
Bin(7)102541
Bin(6)012971
Bin(6)109571
Bin(5)016531
Bin(5)1013131
Bin(4)0118881
Bin(4)1034891
Bin(3)0136161
Bin(3)1052171
Bin(2)0162031
Bin(2)1078041
Bin(1)0135321
Bin(1)1051261
Bin(0)01115951
Bin(0)10131941

Port:

 RX_MEM_FREE_I
ElementFromToCountThreshold
Bin(12)0112391
Bin(12)1010741
Bin(11)0110761
Bin(11)1012411
Bin(10)0110831
Bin(10)1012481
Bin(9)0110971
Bin(9)1012621
Bin(8)0111251
Bin(8)1012901
Bin(7)0145321
Bin(7)1042021
Bin(6)0141591
Bin(6)1048191
Bin(5)0188261
Bin(5)1085471
Bin(4)0184141
Bin(4)10100131
Bin(3)01100051
Bin(3)10116041
Bin(2)01122091
Bin(2)10138081
Bin(1)01160731
Bin(1)10176741
Bin(0)01274471
Bin(0)10290481

Signal:

 READ_POINTER_I
ElementFromToCountThreshold
Bin(11)0121
Bin(11)101671
Bin(10)0151
Bin(10)101701
Bin(9)01111
Bin(9)101761
Bin(8)01211
Bin(8)101861
Bin(7)01411
Bin(7)102061
Bin(6)012051
Bin(6)108651
Bin(5)014431
Bin(5)1011031
Bin(4)0115781
Bin(4)1031791
Bin(3)0131841
Bin(3)1047851
Bin(2)0166331
Bin(2)1082341
Bin(1)01130031
Bin(1)10146041
Bin(0)01259731
Bin(0)10275741

Signal:

 READ_POINTER_INC_1_I
ElementFromToCountThreshold
Bin(11)0121
Bin(11)101671
Bin(10)0151
Bin(10)101701
Bin(9)01111
Bin(9)101761
Bin(8)01211
Bin(8)101861
Bin(7)01411
Bin(7)102061
Bin(6)012061
Bin(6)108661
Bin(5)014511
Bin(5)1011111
Bin(4)0115921
Bin(4)1031931
Bin(3)0131941
Bin(3)1047951
Bin(2)0166871
Bin(2)1082881
Bin(1)01131731
Bin(1)10147741
Bin(0)01275741
Bin(0)10259731

Signal:

 WRITE_POINTER_I
ElementFromToCountThreshold
Bin(11)0151
Bin(11)101701
Bin(10)01111
Bin(10)101761
Bin(9)01231
Bin(9)101881
Bin(8)01451
Bin(8)102101
Bin(7)01891
Bin(7)102541
Bin(6)013111
Bin(6)109711
Bin(5)016691
Bin(5)1013291
Bin(4)0119711
Bin(4)1035721
Bin(3)0137771
Bin(3)1053781
Bin(2)0161711
Bin(2)1077701
Bin(1)0118811
Bin(1)1034821
Bin(0)0117351
Bin(0)1033361

Signal:

 WRITE_POINTER_RAW_I
ElementFromToCountThreshold
Bin(11)0161
Bin(11)101711
Bin(10)01121
Bin(10)101771
Bin(9)01251
Bin(9)101901
Bin(8)01481
Bin(8)102131
Bin(7)01941
Bin(7)102591
Bin(6)013541
Bin(6)1010141
Bin(5)017561
Bin(5)1014161
Bin(4)0146071
Bin(4)1062081
Bin(3)01117771
Bin(3)10133781
Bin(2)01268471
Bin(2)10284461
Bin(1)01494351
Bin(1)10510361
Bin(0)01993141
Bin(0)101009151

Signal:

 WRITE_POINTER_RAW_D
ElementFromToCountThreshold
Bin(11)01301
Bin(11)101951
Bin(10)01721
Bin(10)102371
Bin(9)011461
Bin(9)103111
Bin(8)012811
Bin(8)104461
Bin(7)015721
Bin(7)107371
Bin(6)0118571
Bin(6)1025171
Bin(5)0140991
Bin(5)1047591
Bin(4)01218241
Bin(4)10234251
Bin(3)01686241
Bin(3)10702251
Bin(2)01892561
Bin(2)10908551
Bin(1)011015631
Bin(1)101031641
Bin(0)011680081
Bin(0)101696091

Signal:

 WRITE_POINTER_RAW_CE
FromToCountThreshold
Bin011441701
Bin101457711

Signal:

 WRITE_POINTER_TS_I
ElementFromToCountThreshold
Bin(11)0151
Bin(11)101701
Bin(10)01111
Bin(10)101761
Bin(9)01231
Bin(9)101881
Bin(8)01451
Bin(8)102101
Bin(7)01891
Bin(7)102541
Bin(6)012971
Bin(6)109571
Bin(5)016531
Bin(5)1013131
Bin(4)0118881
Bin(4)1034891
Bin(3)0136161
Bin(3)1052171
Bin(2)0162031
Bin(2)1078041
Bin(1)0135321
Bin(1)1051261
Bin(0)01115951
Bin(0)10131941

Signal:

 WRITE_POINTER_TS_D
ElementFromToCountThreshold
Bin(11)0151
Bin(11)101701
Bin(10)01111
Bin(10)101761
Bin(9)01231
Bin(9)101881
Bin(8)01451
Bin(8)102101
Bin(7)01891
Bin(7)102541
Bin(6)013011
Bin(6)109611
Bin(5)016601
Bin(5)1013201
Bin(4)0119641
Bin(4)1035651
Bin(3)0137951
Bin(3)1053961
Bin(2)0175051
Bin(2)1091041
Bin(1)01119811
Bin(1)10135771
Bin(0)01302851
Bin(0)10286861

Signal:

 WRITE_POINTER_TS_CE
FromToCountThreshold
Bin01394731
Bin10410741

Signal:

 RX_MEM_FREE_I_I
ElementFromToCountThreshold
Bin(12)0112391
Bin(12)1010741
Bin(11)0110761
Bin(11)1012411
Bin(10)0110831
Bin(10)1012481
Bin(9)0110971
Bin(9)1012621
Bin(8)0111251
Bin(8)1012901
Bin(7)0145321
Bin(7)1042021
Bin(6)0141591
Bin(6)1048191
Bin(5)0188261
Bin(5)1085471
Bin(4)0184141
Bin(4)10100131
Bin(3)01100051
Bin(3)10116041
Bin(2)01122091
Bin(2)10138081
Bin(1)01160731
Bin(1)10176741
Bin(0)01274471
Bin(0)10290481

Signal:

 RX_MEM_FREE_RAW
ElementFromToCountThreshold
Bin(12)0111851
Bin(12)1010201
Bin(11)0110221
Bin(11)1011871
Bin(10)0110291
Bin(10)1011941
Bin(9)0110431
Bin(9)1012081
Bin(8)0110711
Bin(8)1012361
Bin(7)0143031
Bin(7)1039731
Bin(6)0139301
Bin(6)1045901
Bin(5)01209671
Bin(5)10206881
Bin(4)01206911
Bin(4)10222901
Bin(3)01248951
Bin(3)10264941
Bin(2)01392001
Bin(2)10407991
Bin(1)01665701
Bin(1)10681711
Bin(0)011249731
Bin(0)101265741

Signal:

 RX_MEM_FREE_RAW_INC_1
ElementFromToCountThreshold
Bin(12)0111861
Bin(12)1010211
Bin(11)0110231
Bin(11)1011881
Bin(10)0110301
Bin(10)1011951
Bin(9)0110441
Bin(9)1012091
Bin(8)0110721
Bin(8)1012371
Bin(7)0143071
Bin(7)1039771
Bin(6)0139341
Bin(6)1045941
Bin(5)01209711
Bin(5)10206921
Bin(4)01206801
Bin(4)10222791
Bin(3)01239871
Bin(3)10255861
Bin(2)01357751
Bin(2)10373741
Bin(1)01609921
Bin(1)10625931
Bin(0)011265741
Bin(0)101249731

Signal:

 RX_MEM_FREE_RAW_DEC_1
ElementFromToCountThreshold
Bin(12)0151
Bin(12)101701
Bin(11)011721
Bin(11)1071
Bin(10)011791
Bin(10)10141
Bin(9)011931
Bin(9)10281
Bin(8)012211
Bin(8)10561
Bin(7)012921
Bin(7)106221
Bin(6)019101
Bin(6)102501
Bin(5)0111861
Bin(5)1014671
Bin(4)0152391
Bin(4)1036381
Bin(3)01134581
Bin(3)10118571
Bin(2)01331971
Bin(2)10315981
Bin(1)01625931
Bin(1)10609921
Bin(0)011265741
Bin(0)101249731

Signal:

 RX_MEM_FREE_I_INC_1
ElementFromToCountThreshold
Bin(12)0112401
Bin(12)1010751
Bin(11)0110771
Bin(11)1012421
Bin(10)0110841
Bin(10)1012491
Bin(9)0110981
Bin(9)1012631
Bin(8)0111261
Bin(8)1012911
Bin(7)0145361
Bin(7)1042061
Bin(6)0141631
Bin(6)1048231
Bin(5)0188301
Bin(5)1085511
Bin(4)0184071
Bin(4)10100061
Bin(3)0198501
Bin(3)10114491
Bin(2)01122481
Bin(2)10138471
Bin(1)01134571
Bin(1)10150581
Bin(0)01290481
Bin(0)10274471

Signal:

 ABORT_APPLIED
FromToCountThreshold
Bin01313391
Bin10329401

Uncovered expressions:

Excluded expressions:

Covered expressions:

"or" expression on line 221:

 rec_abort_f = '1' or commit_overrun_abort = '1' 
 <------LHS------>    <----------RHS-----------> 
LHSRHSCountThreshold
BinFalseFalse361421
BinFalseTrue411
BinTrueFalse312981

"=" expression on line 221:

 rec_abort_f = '1' 
Evaluated toCountThreshold
BinFalse361831
BinTrue312981

"=" expression on line 221:

 commit_overrun_abort = '1' 
Evaluated toCountThreshold
BinFalse674401
BinTrue411

"=" expression on line 231:

 rx_buf_res_n_q_scan = '0' 
Evaluated toCountThreshold
BinFalse10875800001
BinTrue24389171

"=" expression on line 234:

 read_increment = '1' 
Evaluated toCountThreshold
BinFalse5437331541
BinTrue516851

"=" expression on line 246:

 rx_buf_res_n_q_scan = '0' 
Evaluated toCountThreshold
BinFalse10875800001
BinTrue24389171

"=" expression on line 249:

 commit_rx_frame = '1' 
Evaluated toCountThreshold
BinFalse5437714811
BinTrue133581

"=" expression on line 262:

 write_raw_OK = '1' 
Evaluated toCountThreshold
BinFalse1455291
BinTrue3057891

"=" expression on line 266:

 write_raw_OK = '1' 
Evaluated toCountThreshold
BinFalse1803201
BinTrue1128471

"=" expression on line 267:

 rec_abort_f = '1' 
Evaluated toCountThreshold
BinFalse1490141
BinTrue313061

"=" expression on line 268:

 commit_overrun_abort = '1' 
Evaluated toCountThreshold
BinFalse1489731
BinTrue411

"=" expression on line 273:

 rx_buf_res_n_q_scan = '0' 
Evaluated toCountThreshold
BinFalse10875800001
BinTrue24389171

"=" expression on line 276:

 write_pointer_raw_ce = '1' 
Evaluated toCountThreshold
BinFalse5435605541
BinTrue2242851

"=" expression on line 286:

 store_ts_wr_ptr = '1' 
Evaluated toCountThreshold
BinFalse2255901
BinTrue528221

"=" expression on line 291:

 store_ts_wr_ptr = '1' 
Evaluated toCountThreshold
BinFalse557371
BinTrue264111

"=" expression on line 292:

 inc_ts_wr_ptr = '1' 
Evaluated toCountThreshold
BinFalse426751
BinTrue130621

"=" expression on line 297:

 rx_buf_res_n_q_scan = '0' 
Evaluated toCountThreshold
BinFalse10875800001
BinTrue24389171

"=" expression on line 300:

 write_pointer_ts_ce = '1' 
Evaluated toCountThreshold
BinFalse5437453661
BinTrue394731

"=" expression on line 312:

 rx_buf_res_n_q_scan = '0' 
Evaluated toCountThreshold
BinFalse10875800001
BinTrue24389171

"=" expression on line 321:

 read_increment = '1' 
Evaluated toCountThreshold
BinFalse5437331541
BinTrue516851

"=" expression on line 325:

 abort_applied = '1' 
Evaluated toCountThreshold
BinFalse516651
BinTrue201

"=" expression on line 329:

 write_raw_OK = '0' 
Evaluated toCountThreshold
BinFalse611
BinTrue516041

"=" expression on line 339:

 abort_applied = '1' 
Evaluated toCountThreshold
BinFalse5437018351
BinTrue313191

"=" expression on line 343:

 write_raw_OK = '1' 
Evaluated toCountThreshold
BinFalse5435089501
BinTrue1928851

"=" expression on line 353:

 read_increment = '1' 
Evaluated toCountThreshold
BinFalse5437331541
BinTrue516851

"=" expression on line 354:

 commit_rx_frame = '1' 
Evaluated toCountThreshold
BinFalse516581
BinTrue271

"=" expression on line 360:

 commit_rx_frame = '1' 
Evaluated toCountThreshold
BinFalse5437198231
BinTrue133311

Uncovered FSM states:

Excluded FSM states:

Covered FSM states:

Uncovered functional coverage:

Excluded functional coverage:

Covered functional coverage: