| Nested Instances | Statement | Branch | Toggle | Expression | FSM state | Functional | Average |
|---|---|---|---|---|---|---|---|
| ENDIAN_SWAPPER_TX_INST | 100.0 % (8/8) | N.A. | 100.0 % (192/192) | N.A. | N.A. | N.A. | 100.0 % (200/200) |
| PROTOCOL_CONTROL_FSM_INST | 100.0 % (1193/1193) | 100.0 % (790/790) | 100.0 % (850/850) | 100.0 % (1215/1215) | 100.0 % (76/76) | N.A. | 100.0 % (4124/4124) |
| CONTROL_COUNTER_INST | 100.0 % (45/45) | 100.0 % (40/40) | 100.0 % (158/158) | 100.0 % (33/33) | N.A. | N.A. | 100.0 % (276/276) |
| REINTEGRATION_COUNTER_INST | 100.0 % (13/13) | 100.0 % (12/12) | 100.0 % (46/46) | 100.0 % (18/18) | N.A. | N.A. | 100.0 % (89/89) |
| RETRANSMITT_COUNTER_INST | 100.0 % (15/15) | 100.0 % (14/14) | 100.0 % (46/46) | 100.0 % (25/25) | N.A. | N.A. | 100.0 % (100/100) |
| ERR_DETECTOR_INST | 100.0 % (78/78) | 100.0 % (72/72) | 100.0 % (388/388) | 100.0 % (123/123) | N.A. | 100.0 % (13/13) | 100.0 % (674/674) |
| TX_SHIFT_REG_INST | 100.0 % (56/56) | 100.0 % (52/52) | 100.0 % (780/780) | 100.0 % (86/86) | N.A. | N.A. | 100.0 % (974/974) |
| RX_SHIFT_REG_INST | 100.0 % (93/93) | 100.0 % (98/98) | 100.0 % (508/508) | 96.8 % (92/95) | N.A. | N.A. | 99.6 % (791/794) |
| Current Instance | Statement | Branch | Toggle | Expression | FSM state | Functional | Average |
|---|---|---|---|---|---|---|---|
| CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.CAN_CORE_INST.PROTOCOL_CONTROL_INST | 100.0 % (9/9) | N.A. | 100.0 % (966/966) | N.A. | N.A. | N.A. | 100.0 % (975/975) |
| Statement | Branch | Toggle | Expression | FSM state | Functional |
|---|
980: rec_frame_type <= rec_frame_type_i; 981: rec_is_rtr <= rec_is_rtr_i; 982: rec_dlc <= rec_dlc_q; 983: form_err <= form_err_i; 984: ack_err <= ack_err_i; 985: crc_err <= crc_err_i; 986: fixed_stuff <= fixed_stuff_i; 987: arbitration_lost <= arbitration_lost_i; 988: pc_dbg <= pc_dbg_i; CLK_SYS| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
RES_N| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
SCAN_ENABLE| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_MODE_ACF| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_MODE_STM| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_MODE_BMM| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_MODE_FDE| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_MODE_ROM| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_MODE_TSTM| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_MODE_SAM| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_SETTINGS_ENA| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_SETTINGS_NISOFD| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_SETTINGS_RTRTH| Element | From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|---|
| Bin | (3) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (3) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (2) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (2) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (1) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (1) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (0) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (0) | 1 | 0 | 0 | 1 | Exclude file |
MR_SETTINGS_RTRLE| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_SETTINGS_ILBP| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_SETTINGS_PEX| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_COMMAND_ERCRST| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_COMMAND_CPEXS| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_SSP_CFG_SSP_SRC| Element | From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|---|
| Bin | (1) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (1) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (0) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (0) | 1 | 0 | 0 | 1 | Exclude file |
TRAN_WORD| Element | From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|---|
| Bin | (31) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (31) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (30) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (30) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (29) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (29) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (28) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (28) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (27) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (27) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (26) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (26) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (25) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (25) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (24) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (24) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (23) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (23) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (22) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (22) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (21) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (21) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (20) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (20) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (19) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (19) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (18) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (18) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (17) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (17) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (16) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (16) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (15) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (15) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (14) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (14) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (13) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (13) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (12) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (12) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (11) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (11) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (10) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (10) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (9) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (9) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (8) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (8) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (7) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (7) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (6) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (6) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (5) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (5) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (4) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (4) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (3) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (3) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (2) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (2) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (1) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (1) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (0) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (0) | 1 | 0 | 0 | 1 | Exclude file |
TRAN_DLC| Element | From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|---|
| Bin | (3) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (3) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (2) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (2) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (1) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (1) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (0) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (0) | 1 | 0 | 0 | 1 | Exclude file |
TRAN_IS_RTR| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
TRAN_IDENT_TYPE| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
TRAN_FRAME_TYPE| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
TRAN_BRS| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
TRAN_IDENTIFIER| Element | From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|---|
| Bin | (28) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (28) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (27) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (27) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (26) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (26) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (25) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (25) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (24) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (24) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (23) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (23) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (22) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (22) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (21) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (21) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (20) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (20) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (19) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (19) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (18) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (18) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (17) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (17) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (16) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (16) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (15) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (15) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (14) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (14) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (13) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (13) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (12) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (12) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (11) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (11) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (10) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (10) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (9) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (9) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (8) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (8) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (7) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (7) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (6) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (6) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (5) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (5) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (4) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (4) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (3) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (3) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (2) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (2) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (1) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (1) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (0) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (0) | 1 | 0 | 0 | 1 | Exclude file |
TRAN_FRAME_VALID| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
TRAN_FRAME_PARITY_ERROR| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
TXTB_CHANGED| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
IS_TRANSMITTER| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
IS_RECEIVER| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
IS_ERR_ACTIVE| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
IS_ERR_PASSIVE| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
IS_BUS_OFF| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
TX_TRIGGER| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
RX_TRIGGER| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
TX_DATA_WBS| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
RX_DATA_NBS| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
DST_CTR| Element | From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|---|
| Bin | (2) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (2) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (1) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (1) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (0) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (0) | 1 | 0 | 0 | 1 | Exclude file |
BST_CTR| Element | From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|---|
| Bin | (2) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (2) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (1) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (1) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (0) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (0) | 1 | 0 | 0 | 1 | Exclude file |
STUFF_ERR| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
BIT_ERR| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
SYNC_EDGE| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
CRC_15| Element | From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|---|
| Bin | (14) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (14) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (13) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (13) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (12) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (12) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (11) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (11) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (10) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (10) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (9) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (9) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (8) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (8) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (7) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (7) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (6) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (6) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (5) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (5) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (4) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (4) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (3) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (3) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (2) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (2) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (1) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (1) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (0) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (0) | 1 | 0 | 0 | 1 | Exclude file |
CRC_17| Element | From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|---|
| Bin | (16) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (16) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (15) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (15) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (14) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (14) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (13) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (13) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (12) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (12) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (11) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (11) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (10) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (10) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (9) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (9) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (8) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (8) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (7) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (7) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (6) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (6) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (5) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (5) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (4) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (4) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (3) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (3) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (2) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (2) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (1) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (1) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (0) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (0) | 1 | 0 | 0 | 1 | Exclude file |
CRC_21| Element | From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|---|
| Bin | (20) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (20) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (19) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (19) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (18) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (18) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (17) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (17) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (16) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (16) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (15) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (15) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (14) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (14) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (13) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (13) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (12) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (12) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (11) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (11) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (10) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (10) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (9) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (9) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (8) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (8) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (7) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (7) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (6) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (6) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (5) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (5) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (4) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (4) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (3) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (3) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (2) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (2) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (1) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (1) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (0) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (0) | 1 | 0 | 0 | 1 | Exclude file |
ALC_ALC_BIT| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (4) | 0 | 1 | 68 | 1 |
| Bin | (4) | 1 | 0 | 1667 | 1 |
| Bin | (3) | 0 | 1 | 89 | 1 |
| Bin | (3) | 1 | 0 | 1688 | 1 |
| Bin | (2) | 0 | 1 | 102 | 1 |
| Bin | (2) | 1 | 0 | 1701 | 1 |
| Bin | (1) | 0 | 1 | 170 | 1 |
| Bin | (1) | 1 | 0 | 1769 | 1 |
| Bin | (0) | 0 | 1 | 297 | 1 |
| Bin | (0) | 1 | 0 | 1896 | 1 |
ALC_ALC_ID_FIELD| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (2) | 0 | 1 | 35 | 1 |
| Bin | (2) | 1 | 0 | 1636 | 1 |
| Bin | (1) | 0 | 1 | 41 | 1 |
| Bin | (1) | 1 | 0 | 1640 | 1 |
| Bin | (0) | 0 | 1 | 92 | 1 |
| Bin | (0) | 1 | 0 | 1693 | 1 |
ERR_CAPT_ERR_TYPE| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (2) | 0 | 1 | 964 | 1 |
| Bin | (2) | 1 | 0 | 2564 | 1 |
| Bin | (1) | 0 | 1 | 1234 | 1 |
| Bin | (1) | 1 | 0 | 2833 | 1 |
| Bin | (0) | 0 | 1 | 336 | 1 |
| Bin | (0) | 1 | 0 | 1936 | 1 |
ERR_CAPT_ERR_POS| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (3) | 0 | 1 | 4188 | 1 |
| Bin | (3) | 1 | 0 | 2595 | 1 |
| Bin | (2) | 0 | 1 | 4421 | 1 |
| Bin | (2) | 1 | 0 | 2821 | 1 |
| Bin | (1) | 0 | 1 | 3743 | 1 |
| Bin | (1) | 1 | 0 | 2146 | 1 |
| Bin | (0) | 0 | 1 | 2941 | 1 |
| Bin | (0) | 1 | 0 | 1341 | 1 |
ERR_CAPT_ERR_ERP| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 290 | 1 |
| Bin | 1 | 0 | 1891 | 1 |
MR_STATUS_PEXS| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 75 | 1 |
| Bin | 1 | 0 | 1676 | 1 |
PC_DBG| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | IS_SOF | 0 | 1 | 24924 | 1 |
| Bin | IS_SOF | 1 | 0 | 26525 | 1 |
| Bin | IS_ARBITRATION | 0 | 1 | 55723 | 1 |
| Bin | IS_ARBITRATION | 1 | 0 | 57324 | 1 |
| Bin | IS_CONTROL | 0 | 1 | 50970 | 1 |
| Bin | IS_CONTROL | 1 | 0 | 52571 | 1 |
| Bin | IS_DATA | 0 | 1 | 36820 | 1 |
| Bin | IS_DATA | 1 | 0 | 38421 | 1 |
| Bin | IS_STUFF_COUNT | 0 | 1 | 13502 | 1 |
| Bin | IS_STUFF_COUNT | 1 | 0 | 15103 | 1 |
| Bin | IS_CRC | 0 | 1 | 31213 | 1 |
| Bin | IS_CRC | 1 | 0 | 32814 | 1 |
| Bin | IS_CRC_DELIM | 0 | 1 | 29735 | 1 |
| Bin | IS_CRC_DELIM | 1 | 0 | 31336 | 1 |
| Bin | IS_ACK | 0 | 1 | 29588 | 1 |
| Bin | IS_ACK | 1 | 0 | 31189 | 1 |
| Bin | IS_ACK_DELIM | 0 | 1 | 28165 | 1 |
| Bin | IS_ACK_DELIM | 1 | 0 | 29766 | 1 |
| Bin | IS_EOF | 0 | 1 | 27273 | 1 |
| Bin | IS_EOF | 1 | 0 | 28874 | 1 |
| Bin | IS_OVERLOAD | 0 | 1 | 529 | 1 |
| Bin | IS_OVERLOAD | 1 | 0 | 2130 | 1 |
| Bin | IS_ERR | 0 | 1 | 27135 | 1 |
| Bin | IS_ERR | 1 | 0 | 28729 | 1 |
| Bin | IS_INTERMISSION | 0 | 1 | 51716 | 1 |
| Bin | IS_INTERMISSION | 1 | 0 | 53316 | 1 |
| Bin | IS_SUSPEND | 0 | 1 | 2779 | 1 |
| Bin | IS_SUSPEND | 1 | 0 | 4380 | 1 |
TRAN_FRAME_TEST| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | FSTC | 0 | 1 | 270 | 1 |
| Bin | FSTC | 1 | 0 | 1871 | 1 |
| Bin | FCRC | 0 | 1 | 100 | 1 |
| Bin | FCRC | 1 | 0 | 1701 | 1 |
| Bin | SDLC | 0 | 1 | 270 | 1 |
| Bin | SDLC | 1 | 0 | 1871 | 1 |
| Bin | TPRM(4) | 0 | 1 | 74 | 1 |
| Bin | TPRM(4) | 1 | 0 | 3283 | 1 |
| Bin | TPRM(3) | 0 | 1 | 169 | 1 |
| Bin | TPRM(3) | 1 | 0 | 1814 | 1 |
| Bin | TPRM(2) | 0 | 1 | 246 | 1 |
| Bin | TPRM(2) | 1 | 0 | 1891 | 1 |
| Bin | TPRM(1) | 0 | 1 | 458 | 1 |
| Bin | TPRM(1) | 1 | 0 | 2103 | 1 |
| Bin | TPRM(0) | 0 | 1 | 645 | 1 |
| Bin | TPRM(0) | 1 | 0 | 2290 | 1 |
TXTB_HW_CMD| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | LOCK | 0 | 1 | 25275 | 1 |
| Bin | LOCK | 1 | 0 | 26876 | 1 |
| Bin | VALID | 0 | 1 | 11112 | 1 |
| Bin | VALID | 1 | 0 | 12713 | 1 |
| Bin | ERR | 0 | 1 | 4262 | 1 |
| Bin | ERR | 1 | 0 | 5863 | 1 |
| Bin | ARBL | 0 | 1 | 455 | 1 |
| Bin | ARBL | 1 | 0 | 2056 | 1 |
| Bin | FAILED | 0 | 1 | 9436 | 1 |
| Bin | FAILED | 1 | 0 | 11037 | 1 |
TXTB_CLK_EN| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 79820 | 1 |
| Bin | 1 | 0 | 81421 | 1 |
REC_IDENT| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (28) | 0 | 1 | 37958 | 1 |
| Bin | (28) | 1 | 0 | 31904 | 1 |
| Bin | (27) | 0 | 1 | 23451 | 1 |
| Bin | (27) | 1 | 0 | 18485 | 1 |
| Bin | (26) | 0 | 1 | 35197 | 1 |
| Bin | (26) | 1 | 0 | 30734 | 1 |
| Bin | (25) | 0 | 1 | 23455 | 1 |
| Bin | (25) | 1 | 0 | 18907 | 1 |
| Bin | (24) | 0 | 1 | 35024 | 1 |
| Bin | (24) | 1 | 0 | 30140 | 1 |
| Bin | (23) | 0 | 1 | 28038 | 1 |
| Bin | (23) | 1 | 0 | 22073 | 1 |
| Bin | (22) | 0 | 1 | 38177 | 1 |
| Bin | (22) | 1 | 0 | 32473 | 1 |
| Bin | (21) | 0 | 1 | 26666 | 1 |
| Bin | (21) | 1 | 0 | 21346 | 1 |
| Bin | (20) | 0 | 1 | 34372 | 1 |
| Bin | (20) | 1 | 0 | 29680 | 1 |
| Bin | (19) | 0 | 1 | 26814 | 1 |
| Bin | (19) | 1 | 0 | 21432 | 1 |
| Bin | (18) | 0 | 1 | 36475 | 1 |
| Bin | (18) | 1 | 0 | 31537 | 1 |
| Bin | (17) | 0 | 1 | 6354 | 1 |
| Bin | (17) | 1 | 0 | 73134 | 1 |
| Bin | (16) | 0 | 1 | 7666 | 1 |
| Bin | (16) | 1 | 0 | 76181 | 1 |
| Bin | (15) | 0 | 1 | 8076 | 1 |
| Bin | (15) | 1 | 0 | 76311 | 1 |
| Bin | (14) | 0 | 1 | 8012 | 1 |
| Bin | (14) | 1 | 0 | 76870 | 1 |
| Bin | (13) | 0 | 1 | 6090 | 1 |
| Bin | (13) | 1 | 0 | 73160 | 1 |
| Bin | (12) | 0 | 1 | 6063 | 1 |
| Bin | (12) | 1 | 0 | 72708 | 1 |
| Bin | (11) | 0 | 1 | 6784 | 1 |
| Bin | (11) | 1 | 0 | 74963 | 1 |
| Bin | (10) | 0 | 1 | 7457 | 1 |
| Bin | (10) | 1 | 0 | 75754 | 1 |
| Bin | (9) | 0 | 1 | 6222 | 1 |
| Bin | (9) | 1 | 0 | 72961 | 1 |
| Bin | (8) | 0 | 1 | 7533 | 1 |
| Bin | (8) | 1 | 0 | 75953 | 1 |
| Bin | (7) | 0 | 1 | 8151 | 1 |
| Bin | (7) | 1 | 0 | 77151 | 1 |
| Bin | (6) | 0 | 1 | 6815 | 1 |
| Bin | (6) | 1 | 0 | 74206 | 1 |
| Bin | (5) | 0 | 1 | 6928 | 1 |
| Bin | (5) | 1 | 0 | 74300 | 1 |
| Bin | (4) | 0 | 1 | 7556 | 1 |
| Bin | (4) | 1 | 0 | 76575 | 1 |
| Bin | (3) | 0 | 1 | 7327 | 1 |
| Bin | (3) | 1 | 0 | 75514 | 1 |
| Bin | (2) | 0 | 1 | 8887 | 1 |
| Bin | (2) | 1 | 0 | 78980 | 1 |
| Bin | (1) | 0 | 1 | 7701 | 1 |
| Bin | (1) | 1 | 0 | 76297 | 1 |
| Bin | (0) | 0 | 1 | 6473 | 1 |
| Bin | (0) | 1 | 0 | 73851 | 1 |
REC_DLC| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (3) | 0 | 1 | 21342 | 1 |
| Bin | (3) | 1 | 0 | 59508 | 1 |
| Bin | (2) | 0 | 1 | 22108 | 1 |
| Bin | (2) | 1 | 0 | 28071 | 1 |
| Bin | (1) | 0 | 1 | 21797 | 1 |
| Bin | (1) | 1 | 0 | 27434 | 1 |
| Bin | (0) | 0 | 1 | 28542 | 1 |
| Bin | (0) | 1 | 0 | 34415 | 1 |
REC_IS_RTR| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 21837 | 1 |
| Bin | 1 | 0 | 23436 | 1 |
REC_IDENT_TYPE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 17628 | 1 |
| Bin | 1 | 0 | 19226 | 1 |
REC_FRAME_TYPE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 28884 | 1 |
| Bin | 1 | 0 | 30480 | 1 |
REC_LBPF| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 180 | 1 |
| Bin | 1 | 0 | 1781 | 1 |
REC_BRS| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 20399 | 1 |
| Bin | 1 | 0 | 21995 | 1 |
REC_ESI| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 2524 | 1 |
| Bin | 1 | 0 | 4123 | 1 |
REC_IVLD| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 50926 | 1 |
| Bin | 1 | 0 | 52518 | 1 |
STORE_METADATA| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 28539 | 1 |
| Bin | 1 | 0 | 30140 | 1 |
REC_ABORT| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 31302 | 1 |
| Bin | 1 | 0 | 32903 | 1 |
STORE_DATA| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 88436 | 1 |
| Bin | 1 | 0 | 90037 | 1 |
STORE_DATA_WORD| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (31) | 0 | 1 | 240582 | 1 |
| Bin | (31) | 1 | 0 | 242180 | 1 |
| Bin | (30) | 0 | 1 | 247304 | 1 |
| Bin | (30) | 1 | 0 | 248901 | 1 |
| Bin | (29) | 0 | 1 | 258514 | 1 |
| Bin | (29) | 1 | 0 | 260108 | 1 |
| Bin | (28) | 0 | 1 | 265752 | 1 |
| Bin | (28) | 1 | 0 | 267351 | 1 |
| Bin | (27) | 0 | 1 | 276396 | 1 |
| Bin | (27) | 1 | 0 | 277993 | 1 |
| Bin | (26) | 0 | 1 | 284428 | 1 |
| Bin | (26) | 1 | 0 | 286025 | 1 |
| Bin | (25) | 0 | 1 | 292258 | 1 |
| Bin | (25) | 1 | 0 | 293853 | 1 |
| Bin | (24) | 0 | 1 | 300482 | 1 |
| Bin | (24) | 1 | 0 | 302081 | 1 |
| Bin | (23) | 0 | 1 | 288578 | 1 |
| Bin | (23) | 1 | 0 | 290176 | 1 |
| Bin | (22) | 0 | 1 | 295744 | 1 |
| Bin | (22) | 1 | 0 | 297345 | 1 |
| Bin | (21) | 0 | 1 | 304275 | 1 |
| Bin | (21) | 1 | 0 | 305870 | 1 |
| Bin | (20) | 0 | 1 | 311864 | 1 |
| Bin | (20) | 1 | 0 | 313464 | 1 |
| Bin | (19) | 0 | 1 | 322864 | 1 |
| Bin | (19) | 1 | 0 | 324460 | 1 |
| Bin | (18) | 0 | 1 | 331611 | 1 |
| Bin | (18) | 1 | 0 | 333207 | 1 |
| Bin | (17) | 0 | 1 | 337780 | 1 |
| Bin | (17) | 1 | 0 | 339379 | 1 |
| Bin | (16) | 0 | 1 | 344233 | 1 |
| Bin | (16) | 1 | 0 | 345833 | 1 |
| Bin | (15) | 0 | 1 | 385458 | 1 |
| Bin | (15) | 1 | 0 | 387057 | 1 |
| Bin | (14) | 0 | 1 | 399109 | 1 |
| Bin | (14) | 1 | 0 | 400706 | 1 |
| Bin | (13) | 0 | 1 | 408432 | 1 |
| Bin | (13) | 1 | 0 | 410028 | 1 |
| Bin | (12) | 0 | 1 | 419557 | 1 |
| Bin | (12) | 1 | 0 | 421153 | 1 |
| Bin | (11) | 0 | 1 | 431918 | 1 |
| Bin | (11) | 1 | 0 | 433513 | 1 |
| Bin | (10) | 0 | 1 | 443737 | 1 |
| Bin | (10) | 1 | 0 | 445331 | 1 |
| Bin | (9) | 0 | 1 | 453415 | 1 |
| Bin | (9) | 1 | 0 | 455012 | 1 |
| Bin | (8) | 0 | 1 | 465347 | 1 |
| Bin | (8) | 1 | 0 | 466943 | 1 |
| Bin | (7) | 0 | 1 | 511984 | 1 |
| Bin | (7) | 1 | 0 | 513578 | 1 |
| Bin | (6) | 0 | 1 | 523026 | 1 |
| Bin | (6) | 1 | 0 | 524619 | 1 |
| Bin | (5) | 0 | 1 | 534226 | 1 |
| Bin | (5) | 1 | 0 | 535822 | 1 |
| Bin | (4) | 0 | 1 | 544724 | 1 |
| Bin | (4) | 1 | 0 | 546318 | 1 |
| Bin | (3) | 0 | 1 | 554817 | 1 |
| Bin | (3) | 1 | 0 | 556410 | 1 |
| Bin | (2) | 0 | 1 | 566357 | 1 |
| Bin | (2) | 1 | 0 | 567950 | 1 |
| Bin | (1) | 0 | 1 | 577627 | 1 |
| Bin | (1) | 1 | 0 | 579219 | 1 |
| Bin | (0) | 0 | 1 | 586771 | 1 |
| Bin | (0) | 1 | 0 | 588363 | 1 |
SOF_PULSE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 80686 | 1 |
| Bin | 1 | 0 | 82287 | 1 |
ARBITRATION_LOST| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 1171 | 1 |
| Bin | 1 | 0 | 2772 | 1 |
SET_TRANSMITTER| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 40289 | 1 |
| Bin | 1 | 0 | 41890 | 1 |
SET_RECEIVER| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 30487 | 1 |
| Bin | 1 | 0 | 32088 | 1 |
SET_IDLE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 96579 | 1 |
| Bin | 1 | 0 | 98180 | 1 |
ERR_DETECTED| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 124470 | 1 |
| Bin | 1 | 0 | 126071 | 1 |
PRIMARY_ERR| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 22770 | 1 |
| Bin | 1 | 0 | 24371 | 1 |
ACT_ERR_OVR_FLAG| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 19592 | 1 |
| Bin | 1 | 0 | 21189 | 1 |
ERR_DELIM_LATE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 390 | 1 |
| Bin | 1 | 0 | 1991 | 1 |
SET_ERR_ACTIVE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 6637 | 1 |
| Bin | 1 | 0 | 8238 | 1 |
ERR_CTRS_UNCHANGED| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 795 | 1 |
| Bin | 1 | 0 | 2396 | 1 |
TX_DATA_NBS| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 645138 | 1 |
| Bin | 1 | 0 | 643541 | 1 |
STUFF_ENABLE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 25275 | 1 |
| Bin | 1 | 0 | 26876 | 1 |
DESTUFF_ENABLE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 55762 | 1 |
| Bin | 1 | 0 | 57363 | 1 |
FIXED_STUFF| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 13512 | 1 |
| Bin | 1 | 0 | 15113 | 1 |
TX_FRAME_NO_SOF| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 351 | 1 |
| Bin | 1 | 0 | 1952 | 1 |
BTMC_RESET| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 28575 | 1 |
| Bin | 1 | 0 | 30176 | 1 |
DBT_MEASURE_START| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 1993 | 1 |
| Bin | 1 | 0 | 3594 | 1 |
GEN_FIRST_SSP| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 1993 | 1 |
| Bin | 1 | 0 | 3594 | 1 |
BIT_ERR_ENABLE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 67374 | 1 |
| Bin | 1 | 0 | 65781 | 1 |
CRC_ENABLE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 55762 | 1 |
| Bin | 1 | 0 | 57363 | 1 |
CRC_SPEC_ENABLE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 113491 | 1 |
| Bin | 1 | 0 | 115088 | 1 |
CRC_CALC_FROM_RX| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 84440 | 1 |
| Bin | 1 | 0 | 86031 | 1 |
LOAD_INIT_VECT| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 113459 | 1 |
| Bin | 1 | 0 | 115060 | 1 |
SP_CONTROL| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (1) | 0 | 1 | 3434 | 1 |
| Bin | (1) | 1 | 0 | 5035 | 1 |
| Bin | (0) | 0 | 1 | 25858 | 1 |
| Bin | (0) | 1 | 0 | 27459 | 1 |
SP_CONTROL_Q| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (1) | 0 | 1 | 2018 | 1 |
| Bin | (1) | 1 | 0 | 3619 | 1 |
| Bin | (0) | 0 | 1 | 18381 | 1 |
| Bin | (0) | 1 | 0 | 19982 | 1 |
NBT_CTRS_EN| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 6483 | 1 |
| Bin | 1 | 0 | 8072 | 1 |
DBT_CTRS_EN| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 67597 | 1 |
| Bin | 1 | 0 | 69198 | 1 |
SYNC_CONTROL| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (1) | 0 | 1 | 100230 | 1 |
| Bin | (1) | 1 | 0 | 100223 | 1 |
| Bin | (0) | 0 | 1 | 92680 | 1 |
| Bin | (0) | 1 | 0 | 92687 | 1 |
SSP_RESET| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 33156 | 1 |
| Bin | 1 | 0 | 34757 | 1 |
TRAN_DELAY_MEAS| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 37191 | 1 |
| Bin | 1 | 0 | 38792 | 1 |
TRAN_VALID| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 11112 | 1 |
| Bin | 1 | 0 | 12713 | 1 |
REC_VALID| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 15178 | 1 |
| Bin | 1 | 0 | 16779 | 1 |
DECREMENT_REC| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 14981 | 1 |
| Bin | 1 | 0 | 16582 | 1 |
BIT_ERR_AFTER_ACK_ERR| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 8 | 1 |
| Bin | 1 | 0 | 1609 | 1 |
BR_SHIFTED| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 47648 | 1 |
| Bin | 1 | 0 | 49249 | 1 |
FORM_ERR| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 87476 | 1 |
| Bin | 1 | 0 | 89077 | 1 |
ACK_ERR| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 8377 | 1 |
| Bin | 1 | 0 | 9978 | 1 |
CRC_ERR| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 1616 | 1 |
| Bin | 1 | 0 | 3217 | 1 |
RETR_CTR| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (3) | 0 | 1 | 54 | 1 |
| Bin | (3) | 1 | 0 | 1655 | 1 |
| Bin | (2) | 0 | 1 | 140 | 1 |
| Bin | (2) | 1 | 0 | 1741 | 1 |
| Bin | (1) | 0 | 1 | 257 | 1 |
| Bin | (1) | 1 | 0 | 1858 | 1 |
| Bin | (0) | 0 | 1 | 642 | 1 |
| Bin | (0) | 1 | 0 | 2242 | 1 |
TRAN_WORD_SWAPPED| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (31) | 0 | 1 | 35636 | 1 |
| Bin | (31) | 1 | 0 | 37237 | 1 |
| Bin | (30) | 0 | 1 | 26492 | 1 |
| Bin | (30) | 1 | 0 | 28093 | 1 |
| Bin | (29) | 0 | 1 | 19634 | 1 |
| Bin | (29) | 1 | 0 | 21235 | 1 |
| Bin | (28) | 0 | 1 | 18379 | 1 |
| Bin | (28) | 1 | 0 | 19980 | 1 |
| Bin | (27) | 0 | 1 | 26281 | 1 |
| Bin | (27) | 1 | 0 | 27882 | 1 |
| Bin | (26) | 0 | 1 | 27751 | 1 |
| Bin | (26) | 1 | 0 | 29352 | 1 |
| Bin | (25) | 0 | 1 | 29032 | 1 |
| Bin | (25) | 1 | 0 | 30633 | 1 |
| Bin | (24) | 0 | 1 | 36401 | 1 |
| Bin | (24) | 1 | 0 | 38002 | 1 |
| Bin | (23) | 0 | 1 | 15010 | 1 |
| Bin | (23) | 1 | 0 | 16611 | 1 |
| Bin | (22) | 0 | 1 | 15577 | 1 |
| Bin | (22) | 1 | 0 | 17178 | 1 |
| Bin | (21) | 0 | 1 | 15548 | 1 |
| Bin | (21) | 1 | 0 | 17149 | 1 |
| Bin | (20) | 0 | 1 | 15770 | 1 |
| Bin | (20) | 1 | 0 | 17371 | 1 |
| Bin | (19) | 0 | 1 | 16048 | 1 |
| Bin | (19) | 1 | 0 | 17649 | 1 |
| Bin | (18) | 0 | 1 | 17948 | 1 |
| Bin | (18) | 1 | 0 | 19549 | 1 |
| Bin | (17) | 0 | 1 | 25142 | 1 |
| Bin | (17) | 1 | 0 | 26743 | 1 |
| Bin | (16) | 0 | 1 | 16245 | 1 |
| Bin | (16) | 1 | 0 | 17846 | 1 |
| Bin | (15) | 0 | 1 | 22559 | 1 |
| Bin | (15) | 1 | 0 | 24160 | 1 |
| Bin | (14) | 0 | 1 | 26443 | 1 |
| Bin | (14) | 1 | 0 | 28044 | 1 |
| Bin | (13) | 0 | 1 | 22115 | 1 |
| Bin | (13) | 1 | 0 | 23716 | 1 |
| Bin | (12) | 0 | 1 | 26193 | 1 |
| Bin | (12) | 1 | 0 | 27794 | 1 |
| Bin | (11) | 0 | 1 | 23117 | 1 |
| Bin | (11) | 1 | 0 | 24718 | 1 |
| Bin | (10) | 0 | 1 | 26236 | 1 |
| Bin | (10) | 1 | 0 | 27837 | 1 |
| Bin | (9) | 0 | 1 | 15043 | 1 |
| Bin | (9) | 1 | 0 | 16644 | 1 |
| Bin | (8) | 0 | 1 | 15226 | 1 |
| Bin | (8) | 1 | 0 | 16827 | 1 |
| Bin | (7) | 0 | 1 | 8376 | 1 |
| Bin | (7) | 1 | 0 | 9977 | 1 |
| Bin | (6) | 0 | 1 | 8561 | 1 |
| Bin | (6) | 1 | 0 | 10162 | 1 |
| Bin | (5) | 0 | 1 | 8142 | 1 |
| Bin | (5) | 1 | 0 | 9743 | 1 |
| Bin | (4) | 0 | 1 | 26007 | 1 |
| Bin | (4) | 1 | 0 | 27608 | 1 |
| Bin | (3) | 0 | 1 | 21693 | 1 |
| Bin | (3) | 1 | 0 | 23294 | 1 |
| Bin | (2) | 0 | 1 | 25772 | 1 |
| Bin | (2) | 1 | 0 | 27373 | 1 |
| Bin | (1) | 0 | 1 | 21893 | 1 |
| Bin | (1) | 1 | 0 | 23494 | 1 |
| Bin | (0) | 0 | 1 | 26638 | 1 |
| Bin | (0) | 1 | 0 | 28239 | 1 |
ERR_FRM_REQ| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 31302 | 1 |
| Bin | 1 | 0 | 32903 | 1 |
TX_LOAD_BASE_ID| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 50623 | 1 |
| Bin | 1 | 0 | 52224 | 1 |
TX_LOAD_EXT_ID| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 39365 | 1 |
| Bin | 1 | 0 | 40966 | 1 |
TX_LOAD_DLC| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 122549 | 1 |
| Bin | 1 | 0 | 124150 | 1 |
TX_LOAD_DATA_WORD| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 156937 | 1 |
| Bin | 1 | 0 | 158538 | 1 |
TX_LOAD_STUFF_COUNT| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 40510 | 1 |
| Bin | 1 | 0 | 42111 | 1 |
TX_LOAD_CRC| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 57652 | 1 |
| Bin | 1 | 0 | 59253 | 1 |
TX_SHIFT_ENA| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 56206 | 1 |
| Bin | 1 | 0 | 57807 | 1 |
TX_DOMINANT| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 103186 | 1 |
| Bin | 1 | 0 | 104783 | 1 |
RX_CLEAR| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 70776 | 1 |
| Bin | 1 | 0 | 72377 | 1 |
RX_STORE_BASE_ID| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 53848 | 1 |
| Bin | 1 | 0 | 55449 | 1 |
RX_STORE_EXT_ID| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 15808 | 1 |
| Bin | 1 | 0 | 17409 | 1 |
RX_STORE_IDE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 105786 | 1 |
| Bin | 1 | 0 | 107387 | 1 |
RX_STORE_RTR| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 137618 | 1 |
| Bin | 1 | 0 | 139219 | 1 |
RX_STORE_EDL| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 101686 | 1 |
| Bin | 1 | 0 | 103287 | 1 |
RX_STORE_DLC| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 49790 | 1 |
| Bin | 1 | 0 | 51391 | 1 |
RX_STORE_ESI| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 57050 | 1 |
| Bin | 1 | 0 | 58651 | 1 |
RX_STORE_BRS| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 57150 | 1 |
| Bin | 1 | 0 | 58751 | 1 |
RX_STORE_STUFF_COUNT| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 26774 | 1 |
| Bin | 1 | 0 | 28375 | 1 |
RX_SHIFT_ENA| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (3) | 0 | 1 | 273160 | 1 |
| Bin | (3) | 1 | 0 | 562473 | 1 |
| Bin | (2) | 0 | 1 | 279114 | 1 |
| Bin | (2) | 1 | 0 | 556519 | 1 |
| Bin | (1) | 0 | 1 | 285656 | 1 |
| Bin | (1) | 1 | 0 | 549977 | 1 |
| Bin | (0) | 0 | 1 | 299004 | 1 |
| Bin | (0) | 1 | 0 | 536629 | 1 |
RX_SHIFT_IN_SEL| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 36820 | 1 |
| Bin | 1 | 0 | 38421 | 1 |
REC_IS_RTR_I| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 21837 | 1 |
| Bin | 1 | 0 | 23436 | 1 |
REC_DLC_D| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (3) | 0 | 1 | 566357 | 1 |
| Bin | (3) | 1 | 0 | 567950 | 1 |
| Bin | (2) | 0 | 1 | 577627 | 1 |
| Bin | (2) | 1 | 0 | 579219 | 1 |
| Bin | (1) | 0 | 1 | 586771 | 1 |
| Bin | (1) | 1 | 0 | 588363 | 1 |
| Bin | (0) | 0 | 1 | 1392677 | 1 |
| Bin | (0) | 1 | 0 | 1391076 | 1 |
REC_DLC_Q| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (3) | 0 | 1 | 21342 | 1 |
| Bin | (3) | 1 | 0 | 22942 | 1 |
| Bin | (2) | 0 | 1 | 22108 | 1 |
| Bin | (2) | 1 | 0 | 23705 | 1 |
| Bin | (1) | 0 | 1 | 21797 | 1 |
| Bin | (1) | 1 | 0 | 23394 | 1 |
| Bin | (0) | 0 | 1 | 28542 | 1 |
| Bin | (0) | 1 | 0 | 30139 | 1 |
REC_FRAME_TYPE_I| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 28884 | 1 |
| Bin | 1 | 0 | 30480 | 1 |
CTRL_CTR_PLOAD| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 842216 | 1 |
| Bin | 1 | 0 | 843816 | 1 |
CTRL_CTR_PLOAD_VAL| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (8) | 0 | 1 | 16491 | 1 |
| Bin | (8) | 1 | 0 | 18092 | 1 |
| Bin | (7) | 0 | 1 | 18156 | 1 |
| Bin | (7) | 1 | 0 | 19757 | 1 |
| Bin | (6) | 0 | 1 | 19504 | 1 |
| Bin | (6) | 1 | 0 | 21105 | 1 |
| Bin | (5) | 0 | 1 | 29382 | 1 |
| Bin | (5) | 1 | 0 | 30983 | 1 |
| Bin | (4) | 0 | 1 | 82144 | 1 |
| Bin | (4) | 1 | 0 | 83745 | 1 |
| Bin | (3) | 0 | 1 | 155684 | 1 |
| Bin | (3) | 1 | 0 | 157284 | 1 |
| Bin | (2) | 0 | 1 | 269635 | 1 |
| Bin | (2) | 1 | 0 | 271235 | 1 |
| Bin | (1) | 0 | 1 | 405826 | 1 |
| Bin | (1) | 1 | 0 | 407425 | 1 |
| Bin | (0) | 0 | 1 | 287389 | 1 |
| Bin | (0) | 1 | 0 | 288988 | 1 |
CTRL_CTR_ENA| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 215678 | 1 |
| Bin | 1 | 0 | 217271 | 1 |
CTRL_CTR_ZERO| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 355655 | 1 |
| Bin | 1 | 0 | 355664 | 1 |
CTRL_CTR_ONE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 351446 | 1 |
| Bin | 1 | 0 | 353047 | 1 |
CTRL_COUNTED_BYTE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 552157 | 1 |
| Bin | 1 | 0 | 553758 | 1 |
CTRL_COUNTED_BYTE_INDEX| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (1) | 0 | 1 | 136998 | 1 |
| Bin | (1) | 1 | 0 | 138599 | 1 |
| Bin | (0) | 0 | 1 | 274576 | 1 |
| Bin | (0) | 1 | 0 | 276177 | 1 |
CTRL_CTR_MEM_INDEX| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (4) | 0 | 1 | 4751 | 1 |
| Bin | (4) | 1 | 0 | 6352 | 1 |
| Bin | (3) | 0 | 1 | 12555 | 1 |
| Bin | (3) | 1 | 0 | 14156 | 1 |
| Bin | (2) | 0 | 1 | 18907 | 1 |
| Bin | (2) | 1 | 0 | 18907 | 1 |
| Bin | (1) | 0 | 1 | 40779 | 1 |
| Bin | (1) | 1 | 0 | 42380 | 1 |
| Bin | (0) | 0 | 1 | 67845 | 1 |
| Bin | (0) | 1 | 0 | 67845 | 1 |
COMPL_CTR_ENA| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 4508671 | 1 |
| Bin | 1 | 0 | 4510272 | 1 |
REINTEG_CTR_CLR| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 170 | 1 |
| Bin | 1 | 0 | 1771 | 1 |
REINTEG_CTR_ENABLE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 21938 | 1 |
| Bin | 1 | 0 | 23539 | 1 |
REINTEG_CTR_EXPIRED| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 170 | 1 |
| Bin | 1 | 0 | 1771 | 1 |
RETR_CTR_CLEAR| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 20558 | 1 |
| Bin | 1 | 0 | 22159 | 1 |
RETR_CTR_ADD| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 10547 | 1 |
| Bin | 1 | 0 | 12148 | 1 |
RETR_LIMIT_REACHED| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 1853 | 1 |
| Bin | 1 | 0 | 1854 | 1 |
FORM_ERR_I| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 87476 | 1 |
| Bin | 1 | 0 | 89077 | 1 |
ACK_ERR_I| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 8377 | 1 |
| Bin | 1 | 0 | 9978 | 1 |
CRC_CHECK| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 59467 | 1 |
| Bin | 1 | 0 | 61068 | 1 |
BIT_ERR_ARB| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 1455 | 1 |
| Bin | 1 | 0 | 3056 | 1 |
CRC_MATCH| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 27816 | 1 |
| Bin | 1 | 0 | 29417 | 1 |
CRC_ERR_I| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 1616 | 1 |
| Bin | 1 | 0 | 3217 | 1 |
CRC_CLEAR_MATCH_FLAG| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 57307 | 1 |
| Bin | 1 | 0 | 58908 | 1 |
CRC_SRC| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (1) | 0 | 1 | 24495 | 1 |
| Bin | (1) | 1 | 0 | 26096 | 1 |
| Bin | (0) | 0 | 1 | 29417 | 1 |
| Bin | (0) | 1 | 0 | 31013 | 1 |
ERR_POS| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (3) | 0 | 1 | 84491 | 1 |
| Bin | (3) | 1 | 0 | 82897 | 1 |
| Bin | (2) | 0 | 1 | 57892 | 1 |
| Bin | (2) | 1 | 0 | 56291 | 1 |
| Bin | (1) | 0 | 1 | 89386 | 1 |
| Bin | (1) | 1 | 0 | 87785 | 1 |
| Bin | (0) | 0 | 1 | 123737 | 1 |
| Bin | (0) | 1 | 0 | 122136 | 1 |
RX_CRC| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (20) | 0 | 1 | 697813 | 1 |
| Bin | (20) | 1 | 0 | 1380286 | 1 |
| Bin | (19) | 0 | 1 | 614606 | 1 |
| Bin | (19) | 1 | 0 | 1236727 | 1 |
| Bin | (18) | 0 | 1 | 662371 | 1 |
| Bin | (18) | 1 | 0 | 1200868 | 1 |
| Bin | (17) | 0 | 1 | 617654 | 1 |
| Bin | (17) | 1 | 0 | 1202776 | 1 |
| Bin | (16) | 0 | 1 | 1287260 | 1 |
| Bin | (16) | 1 | 0 | 2064786 | 1 |
| Bin | (15) | 0 | 1 | 738002 | 1 |
| Bin | (15) | 1 | 0 | 1195378 | 1 |
| Bin | (14) | 0 | 1 | 584464 | 1 |
| Bin | (14) | 1 | 0 | 559798 | 1 |
| Bin | (13) | 0 | 1 | 560568 | 1 |
| Bin | (13) | 1 | 0 | 588160 | 1 |
| Bin | (12) | 0 | 1 | 596840 | 1 |
| Bin | (12) | 1 | 0 | 577004 | 1 |
| Bin | (11) | 0 | 1 | 580716 | 1 |
| Bin | (11) | 1 | 0 | 607066 | 1 |
| Bin | (10) | 0 | 1 | 626294 | 1 |
| Bin | (10) | 1 | 0 | 598961 | 1 |
| Bin | (9) | 0 | 1 | 603824 | 1 |
| Bin | (9) | 1 | 0 | 628974 | 1 |
| Bin | (8) | 0 | 1 | 641694 | 1 |
| Bin | (8) | 1 | 0 | 618424 | 1 |
| Bin | (7) | 0 | 1 | 512041 | 1 |
| Bin | (7) | 1 | 0 | 513669 | 1 |
| Bin | (6) | 0 | 1 | 523083 | 1 |
| Bin | (6) | 1 | 0 | 524674 | 1 |
| Bin | (5) | 0 | 1 | 534263 | 1 |
| Bin | (5) | 1 | 0 | 535869 | 1 |
| Bin | (4) | 0 | 1 | 544764 | 1 |
| Bin | (4) | 1 | 0 | 546373 | 1 |
| Bin | (3) | 0 | 1 | 554879 | 1 |
| Bin | (3) | 1 | 0 | 556464 | 1 |
| Bin | (2) | 0 | 1 | 566471 | 1 |
| Bin | (2) | 1 | 0 | 568012 | 1 |
| Bin | (1) | 0 | 1 | 577687 | 1 |
| Bin | (1) | 1 | 0 | 579320 | 1 |
| Bin | (0) | 0 | 1 | 586821 | 1 |
| Bin | (0) | 1 | 0 | 588440 | 1 |
RX_STUFF_COUNT| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (3) | 0 | 1 | 3695 | 1 |
| Bin | (3) | 1 | 0 | 5296 | 1 |
| Bin | (2) | 0 | 1 | 6875 | 1 |
| Bin | (2) | 1 | 0 | 8475 | 1 |
| Bin | (1) | 0 | 1 | 7783 | 1 |
| Bin | (1) | 1 | 0 | 9381 | 1 |
| Bin | (0) | 0 | 1 | 6482 | 1 |
| Bin | (0) | 1 | 0 | 8081 | 1 |
FIXED_STUFF_I| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 13512 | 1 |
| Bin | 1 | 0 | 15113 | 1 |
ARBITRATION_LOST_I| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 1171 | 1 |
| Bin | 1 | 0 | 2772 | 1 |
ARBITRATION_PART| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (2) | 0 | 1 | 17584 | 1 |
| Bin | (2) | 1 | 0 | 19185 | 1 |
| Bin | (1) | 0 | 1 | 53116 | 1 |
| Bin | (1) | 1 | 0 | 54717 | 1 |
| Bin | (0) | 0 | 1 | 124447 | 1 |
| Bin | (0) | 1 | 0 | 126048 | 1 |
PC_DBG_I| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | IS_SOF | 0 | 1 | 24924 | 1 |
| Bin | IS_SOF | 1 | 0 | 26525 | 1 |
| Bin | IS_ARBITRATION | 0 | 1 | 55723 | 1 |
| Bin | IS_ARBITRATION | 1 | 0 | 57324 | 1 |
| Bin | IS_CONTROL | 0 | 1 | 50970 | 1 |
| Bin | IS_CONTROL | 1 | 0 | 52571 | 1 |
| Bin | IS_DATA | 0 | 1 | 36820 | 1 |
| Bin | IS_DATA | 1 | 0 | 38421 | 1 |
| Bin | IS_STUFF_COUNT | 0 | 1 | 13502 | 1 |
| Bin | IS_STUFF_COUNT | 1 | 0 | 15103 | 1 |
| Bin | IS_CRC | 0 | 1 | 31213 | 1 |
| Bin | IS_CRC | 1 | 0 | 32814 | 1 |
| Bin | IS_CRC_DELIM | 0 | 1 | 29735 | 1 |
| Bin | IS_CRC_DELIM | 1 | 0 | 31336 | 1 |
| Bin | IS_ACK | 0 | 1 | 29588 | 1 |
| Bin | IS_ACK | 1 | 0 | 31189 | 1 |
| Bin | IS_ACK_DELIM | 0 | 1 | 28165 | 1 |
| Bin | IS_ACK_DELIM | 1 | 0 | 29766 | 1 |
| Bin | IS_EOF | 0 | 1 | 27273 | 1 |
| Bin | IS_EOF | 1 | 0 | 28874 | 1 |
| Bin | IS_OVERLOAD | 0 | 1 | 529 | 1 |
| Bin | IS_OVERLOAD | 1 | 0 | 2130 | 1 |
| Bin | IS_ERR | 0 | 1 | 27135 | 1 |
| Bin | IS_ERR | 1 | 0 | 28729 | 1 |
| Bin | IS_INTERMISSION | 0 | 1 | 51716 | 1 |
| Bin | IS_INTERMISSION | 1 | 0 | 53316 | 1 |
| Bin | IS_SUSPEND | 0 | 1 | 2779 | 1 |
| Bin | IS_SUSPEND | 1 | 0 | 4380 | 1 |