File: /__w/ctu-can-regression/ctu-can-regression/src/can_core/can_core.vhd
0: --------------------------------------------------------------------------------
1: --
2: -- CTU CAN FD IP Core
3: -- Copyright (C) 2021-2023 Ondrej Ille
4: -- Copyright (C) 2023- Logic Design Services Ltd.s
5: --
6: -- Permission is hereby granted, free of charge, to any person obtaining a copy
7: -- of this VHDL component and associated documentation files (the "Component"),
8: -- to use, copy, modify, merge, publish, distribute the Component for
9: -- non-commercial purposes. Using the Component for commercial purposes is
10: -- forbidden unless previously agreed with Copyright holder.
11: --
12: -- The above copyright notice and this permission notice shall be included in
13: -- all copies or substantial portions of the Component.
14: --
15: -- THE COMPONENT IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16: -- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17: -- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18: -- AUTHORS OR COPYRIGHTHOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19: -- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20: -- FROM, OUT OF OR IN CONNECTION WITH THE COMPONENT OR THE USE OR OTHER DEALINGS
21: -- IN THE COMPONENT.
22: --
23: -- The CAN protocol is developed by Robert Bosch GmbH and protected by patents.
24: -- Anybody who wants to implement this IP core on silicon has to obtain a CAN
25: -- protocol license from Bosch.
26: --
27: -- -------------------------------------------------------------------------------
28: --
29: -- CTU CAN FD IP Core
30: -- Copyright (C) 2015-2020 MIT License
31: --
32: -- Authors:
33: -- Ondrej Ille <ondrej.ille@gmail.com>
34: -- Martin Jerabek <martin.jerabek01@gmail.com>
35: --
36: -- Project advisors:
37: -- Jiri Novak <jnovak@fel.cvut.cz>
38: -- Pavel Pisa <pisa@cmp.felk.cvut.cz>
39: --
40: -- Department of Measurement (http://meas.fel.cvut.cz/)
41: -- Faculty of Electrical Engineering (http://www.fel.cvut.cz)
42: -- Czech Technical University (http://www.cvut.cz/)
43: --
44: -- Permission is hereby granted, free of charge, to any person obtaining a copy
45: -- of this VHDL component and associated documentation files (the "Component"),
46: -- to deal in the Component without restriction, including without limitation
47: -- the rights to use, copy, modify, merge, publish, distribute, sublicense,
48: -- and/or sell copies of the Component, and to permit persons to whom the
49: -- Component is furnished to do so, subject to the following conditions:
50: --
51: -- The above copyright notice and this permission notice shall be included in
52: -- all copies or substantial portions of the Component.
53: --
54: -- THE COMPONENT IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
55: -- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
56: -- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
57: -- AUTHORS OR COPYRIGHTHOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
58: -- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
59: -- FROM, OUT OF OR IN CONNECTION WITH THE COMPONENT OR THE USE OR OTHER DEALINGS
60: -- IN THE COMPONENT.
61: --
62: -- The CAN protocol is developed by Robert Bosch GmbH and protected by patents.
63: -- Anybody who wants to implement this IP core on silicon has to obtain a CAN
64: -- protocol license from Bosch.
65: --
66: --------------------------------------------------------------------------------
67:
68: --------------------------------------------------------------------------------
69: -- Module:
70: -- CAN Core
71: --
72: -- Sub-modules:
73: -- 1. Protocol control
74: -- 2. Bit stuffing
75: -- 3. Bit destuffing
76: -- 4. Fault confinement
77: -- 5. CAN CRC
78: -- 6. Operation control
79: --
80: -- Note:
81: -- Status bus assignments are implemented in this module.
82: --------------------------------------------------------------------------------
83:
84: Library ieee;
85: use ieee.std_logic_1164.all;
86: use ieee.numeric_std.ALL;
87:
88: Library ctu_can_fd_rtl;
89: use ctu_can_fd_rtl.can_constants_pkg.all;
90: use ctu_can_fd_rtl.can_types_pkg.all;
91:
92: use ctu_can_fd_rtl.CAN_FD_register_map.all;
93: use ctu_can_fd_rtl.CAN_FD_frame_format.all;
94:
95: entity can_core is
96: generic (
97: -- Number of signals in Sample trigger
98: G_SAMPLE_TRIGGER_COUNT : natural range 2 to 8;
99:
100: -- Control counter width
101: G_CTRL_CTR_WIDTH : natural;
102:
103: -- Retransmitt limit counter width
104: G_RETR_LIM_CTR_WIDTH : natural;
105:
106: -- Insert pipeline on "error_valid"
107: G_ERR_VALID_PIPELINE : boolean;
108:
109: -- CRC 15 polynomial
110: G_CRC15_POL : std_logic_vector(15 downto 0);
111:
112: -- CRC 17 polynomial
113: G_CRC17_POL : std_logic_vector(19 downto 0);
114:
115: -- CRC 15 polynomial
116: G_CRC21_POL : std_logic_vector(23 downto 0);
117:
118: -- Support traffic counters
119: G_SUP_TRAFFIC_CTRS : boolean
120: );
121: port (
122: -------------------------------------------------------------------------------------------
123: -- Clock and Asynchronous reset
124: -------------------------------------------------------------------------------------------
125: clk_sys : in std_logic;
126: res_n : in std_logic;
127:
128: -------------------------------------------------------------------------------------------
129: -- DFT support
130: -------------------------------------------------------------------------------------------
131: scan_enable : in std_logic;
132:
133: -------------------------------------------------------------------------------------------
134: -- Memory registers interface
135: -------------------------------------------------------------------------------------------
136: mr_mode_acf : in std_logic;
137: mr_mode_stm : in std_logic;
138: mr_mode_bmm : in std_logic;
139: mr_mode_fde : in std_logic;
140: mr_mode_rom : in std_logic;
141: mr_mode_tstm : in std_logic;
142: mr_mode_sam : in std_logic;
143:
144: mr_settings_ena : in std_logic;
145: mr_settings_nisofd : in std_logic;
146: mr_settings_rtrth : in std_logic_vector(3 downto 0);
147: mr_settings_rtrle : in std_logic;
148: mr_settings_ilbp : in std_logic;
149: mr_settings_pex : in std_logic;
150:
151: mr_command_ercrst : in std_logic;
152: mr_command_rxfcrst : in std_logic;
153: mr_command_txfcrst : in std_logic;
154: mr_command_cpexs : in std_logic;
155:
156: mr_ssp_cfg_ssp_src : in std_logic_vector(1 downto 0);
157:
158: mr_ewl_ew_limit : in std_logic_vector(7 downto 0);
159: mr_erp_erp_limit : in std_logic_vector(7 downto 0);
160:
161: mr_ctr_pres_ctpv : in std_logic_vector(8 downto 0);
162: mr_ctr_pres_ptx : in std_logic;
163: mr_ctr_pres_prx : in std_logic;
164: mr_ctr_pres_enorm : in std_logic;
165: mr_ctr_pres_efd : in std_logic;
166:
167: -------------------------------------------------------------------------------------------
168: -- Status signals
169: -------------------------------------------------------------------------------------------
170: cc_stat : out t_can_core_stat;
171: pc_dbg : out t_protocol_control_dbg;
172:
173: -------------------------------------------------------------------------------------------
174: -- Tx Arbitrator and TXT Buffers interface
175: -------------------------------------------------------------------------------------------
176: -- TX Data word
177: tran_word : in std_logic_vector(31 downto 0);
178:
179: -- TX Data length code
180: tran_dlc : in std_logic_vector(3 downto 0);
181:
182: -- TX Remote transmission request flag
183: tran_is_rtr : in std_logic;
184:
185: -- TX Identifier type (0-Basic, 1-Extended)
186: tran_ident_type : in std_logic;
187:
188: -- TX Frame type (0-CAN 2.0, 1-CAN FD)
189: tran_frame_type : in std_logic;
190:
191: -- TX Bit Rate Shift
192: tran_brs : in std_logic;
193:
194: -- TX Identifier
195: tran_identifier : in std_logic_vector(28 downto 0);
196:
197: -- TX frame test word
198: tran_frame_test : in t_frame_test_w;
199:
200: -- Frame in TXT Buffer is valid any can be transmitted.
201: tran_frame_valid : in std_logic;
202:
203: -- Parity Error occurred in TXT Buffer RAMs during transmission of data words
204: tran_frame_parity_error : in std_logic;
205:
206: -- HW Commands for TX Arbitrator and TXT Buffers
207: txtb_hw_cmd : out t_txtb_hw_cmd;
208:
209: -- Selected TXT Buffer index changed
210: txtb_changed : in std_logic;
211:
212: -- Pointer to TXT buffer memory
213: txtb_ptr : out natural range 0 to 20;
214:
215: -- Clock enable for TXT Buffer memory
216: txtb_clk_en : out std_logic;
217:
218: -------------------------------------------------------------------------------------------
219: -- Recieve Buffer and Message Filter Interface
220: -------------------------------------------------------------------------------------------
221: -- RX CAN Identifier
222: rec_ident : out std_logic_vector(28 downto 0);
223:
224: -- RX Data length code
225: rec_dlc : out std_logic_vector(3 downto 0);
226:
227: -- RX Recieved identifier type (0-BASE Format, 1-Extended Format);
228: rec_ident_type : out std_logic;
229:
230: -- RX frame type (0-CAN 2.0, 1- CAN FD)
231: rec_frame_type : out std_logic;
232:
233: -- Received Loopback frame
234: rec_lbpf : out std_logic;
235:
236: -- RX Remote transmission request Flag
237: rec_is_rtr : out std_logic;
238:
239: -- RX Bit Rate Shift bit
240: rec_brs : out std_logic;
241:
242: -- RX Error state indicator
243: rec_esi : out std_logic;
244:
245: -- RX Identifier is valid
246: rec_ivld : out std_logic;
247:
248: -- RX Frame received succesfully, can be commited to RX Buffer.
249: rec_valid : out std_logic;
250:
251: -- Metadata are received OK, and can be stored in RX Buffer.
252: store_metadata : out std_logic;
253:
254: -- Store data word to RX Buffer.
255: store_data : out std_logic;
256:
257: -- Data words to be stored to RX Buffer.
258: store_data_word : out std_logic_vector(31 downto 0);
259:
260: -- Abort storing of frame in RX Buffer. Revert to last frame.
261: rec_abort : out std_logic;
262:
263: -- Pulse in Start of Frame
264: sof_pulse : out std_logic;
265:
266: -------------------------------------------------------------------------------------------
267: -- Interrupt Manager Interface
268: -------------------------------------------------------------------------------------------
269: -- Arbitration was lost
270: arbitration_lost : out std_logic;
271:
272: -- Frame stored in CAN Core was sucessfully transmitted
273: tran_valid : out std_logic;
274:
275: -- Bit Rate Was Shifted
276: br_shifted : out std_logic;
277:
278: -- Error is detected (Error frame will be transmitted)
279: err_detected : out std_logic;
280:
281: -- Fault confinement state changed
282: fcs_changed : out std_logic;
283:
284: -- Error warning limit reached
285: err_warning_limit_pulse : out std_logic;
286:
287: -------------------------------------------------------------------------------------------
288: -- Prescaler interface
289: -------------------------------------------------------------------------------------------
290: -- RX Triggers (in Sample Point)
291: rx_triggers : in std_logic_vector(G_SAMPLE_TRIGGER_COUNT - 1 downto 0);
292:
293: -- TX Trigger
294: tx_trigger : in std_logic;
295:
296: -- Synchronisation control (No synchronisation, Hard Synchronisation,
297: -- Resynchronisation
298: sync_control : out std_logic_vector(1 downto 0);
299:
300: -- No positive resynchronisation
301: no_pos_resync : out std_logic;
302:
303: -- Sample control (Nominal, Data, Secondary)
304: sp_control : out std_logic_vector(1 downto 0);
305:
306: -- Enable Nominal Bit time counters.
307: nbt_ctrs_en : out std_logic;
308:
309: -- Enable Data Bit time counters.
310: dbt_ctrs_en : out std_logic;
311:
312: -------------------------------------------------------------------------------------------
313: -- CAN Bus serial data stream
314: -------------------------------------------------------------------------------------------
315: -- RX Data from CAN Bus
316: rx_data_wbs : in std_logic;
317:
318: -- TX Data to CAN Bus
319: tx_data_wbs : out std_logic;
320:
321: -------------------------------------------------------------------------------------------
322: -- Others
323: -------------------------------------------------------------------------------------------
324: -- Secondary sample point reset
325: ssp_reset : out std_logic;
326:
327: -- Enable measurement of Transmitter delay
328: tran_delay_meas : out std_logic;
329:
330: -- Bit Error detected
331: bit_err : in std_logic;
332:
333: -- Reset Bit time measurement counter
334: btmc_reset : out std_logic;
335:
336: -- Start Measurement of data bit time (in TX Trigger)
337: dbt_measure_start : out std_logic;
338:
339: -- First SSP generated (in ESI bit)
340: gen_first_ssp : out std_logic;
341:
342: -- Synchronization edge
343: sync_edge : in std_logic;
344:
345: -- Bit error enable
346: bit_err_enable : out std_logic;
347:
348: -- RX Trigger of Protocol control FSM (sample point)
349: pc_rx_trigger : out std_logic
350: );
351: end entity;
352:
353: architecture rtl of can_core is
354:
355: -----------------------------------------------------------------------------------------------
356: -----------------------------------------------------------------------------------------------
357: -- Internal signals
358: -----------------------------------------------------------------------------------------------
359: -----------------------------------------------------------------------------------------------
360:
361: -- Arbitration lost capture
362: signal alc_alc_bit : std_logic_vector(4 downto 0);
363: signal alc_alc_id_field : std_logic_vector(2 downto 0);
364:
365: -- Error code capture
366: signal err_capt_err_type : std_logic_vector(2 downto 0);
367: signal err_capt_err_pos : std_logic_vector(3 downto 0);
368: signal err_capt_err_erp : std_logic;
369:
370: -- Operation control interface
371: signal is_transmitter : std_logic;
372: signal is_receiver : std_logic;
373: signal is_idle : std_logic;
374: signal arbitration_lost_i : std_logic;
375: signal set_transmitter : std_logic;
376: signal set_receiver : std_logic;
377: signal set_idle : std_logic;
378:
379: -- Fault confinement Interface
380: signal is_err_active : std_logic;
381: signal is_err_passive : std_logic;
382: signal is_bus_off_i : std_logic;
383: signal err_detected_i : std_logic;
384: signal primary_err : std_logic;
385: signal act_err_ovr_flag : std_logic;
386: signal err_delim_late : std_logic;
387: signal set_err_active : std_logic;
388: signal err_ctrs_unchanged : std_logic;
389:
390: -- Bit Stuffing Interface
391: signal stuff_enable : std_logic;
392: signal destuff_enable : std_logic;
393: signal fixed_stuff : std_logic;
394: signal tx_frame_no_sof : std_logic;
395: signal dst_ctr : std_logic_vector(2 downto 0);
396: signal bst_ctr : std_logic_vector(2 downto 0);
397: signal stuff_err : std_logic;
398:
399: -- CRC Interface
400: signal crc_enable : std_logic;
401: signal crc_spec_enable : std_logic;
402: signal crc_calc_from_rx : std_logic;
403: signal crc_15 : std_logic_vector(14 downto 0);
404: signal crc_17 : std_logic_vector(16 downto 0);
405: signal crc_21 : std_logic_vector(20 downto 0);
406:
407: -- Protocol control - control outputs
408: signal sp_control_i : std_logic_vector(1 downto 0);
409: signal sp_control_q : std_logic_vector(1 downto 0);
410: signal tran_valid_i : std_logic;
411: signal rec_valid_i : std_logic;
412:
413: -- Fault confinement status signals
414: signal tx_err_ctr : std_logic_vector(8 downto 0);
415: signal rx_err_ctr : std_logic_vector(8 downto 0);
416: signal norm_err_ctr : std_logic_vector(15 downto 0);
417: signal data_err_ctr : std_logic_vector(15 downto 0);
418:
419: -- Protocol control triggers
420: signal pc_tx_trigger : std_logic;
421: signal pc_rx_trigger_i : std_logic;
422:
423: -- Protocol control data inputs/outputs
424: signal pc_tx_data_nbs : std_logic;
425: signal pc_rx_data_nbs : std_logic;
426:
427: -- CRC Data inputs
428: signal crc_data_tx_wbs : std_logic;
429: signal crc_data_tx_nbs : std_logic;
430: signal crc_data_rx_wbs : std_logic;
431: signal crc_data_rx_nbs : std_logic;
432:
433: -- CRC Trigger inputs
434: signal crc_trig_tx_wbs : std_logic;
435: signal crc_trig_tx_nbs : std_logic;
436: signal crc_trig_rx_wbs : std_logic;
437: signal crc_trig_rx_nbs : std_logic;
438:
439: -- Bit stuffing signals
440: signal bst_data_in : std_logic;
441: signal bst_data_out : std_logic;
442: signal bst_trigger : std_logic;
443: signal data_halt : std_logic;
444:
445: -- Bit destuffing signals
446: signal bds_data_in : std_logic;
447: signal bds_data_out : std_logic;
448: signal bds_trigger : std_logic;
449: signal destuffed : std_logic;
450:
451: -- Bus traffic counters
452: signal tx_frame_ctr : std_logic_vector(31 downto 0);
453: signal rx_frame_ctr : std_logic_vector(31 downto 0);
454:
455: signal tx_data_wbs_i : std_logic;
456:
457: -- Looped back data for bus monitoring mode
458: signal lpb_dominant : std_logic;
459:
460: -- Error indication
461: signal form_err : std_logic;
462: signal ack_err : std_logic;
463: signal crc_err : std_logic;
464:
465: signal load_init_vect : std_logic;
466: signal retr_ctr : std_logic_vector(G_RETR_LIM_CTR_WIDTH - 1 downto 0);
467:
468: -- Decrement Receive Error counter
469: signal decrement_rec : std_logic;
470:
471: -- Bit Error in passive error flag following ACK error!
472: signal bit_err_after_ack_err : std_logic;
473:
474: -- Protocol exception status
475: signal mr_status_pexs : std_logic;
476:
477: -- Error warning limit status
478: signal mr_status_ewl : std_logic;
479:
480: begin
481:
482: -----------------------------------------------------------------------------------------------
483: -- Protocol control
484: -----------------------------------------------------------------------------------------------
485: protocol_control_inst : entity ctu_can_fd_rtl.protocol_control
486: generic map (
487: G_CTRL_CTR_WIDTH => G_CTRL_CTR_WIDTH,
488: G_RETR_LIM_CTR_WIDTH => G_RETR_LIM_CTR_WIDTH,
489: G_ERR_VALID_PIPELINE => G_ERR_VALID_PIPELINE
490: )
491: port map (
492: clk_sys => clk_sys, -- IN
493: res_n => res_n, -- IN
494:
495: -- DFT support
496: scan_enable => scan_enable, -- IN
497:
498: -- Memory registers interface
499: mr_mode_acf => mr_mode_acf, -- IN
500: mr_mode_stm => mr_mode_stm, -- IN
501: mr_mode_bmm => mr_mode_bmm, -- IN
502: mr_mode_fde => mr_mode_fde, -- IN
503: mr_mode_rom => mr_mode_rom, -- IN
504: mr_mode_tstm => mr_mode_tstm, -- IN
505: mr_mode_sam => mr_mode_sam, -- IN
506: mr_settings_ena => mr_settings_ena, -- IN
507: mr_settings_nisofd => mr_settings_nisofd, -- IN
508: mr_settings_rtrth => mr_settings_rtrth, -- IN
509: mr_settings_rtrle => mr_settings_rtrle, -- IN
510: mr_settings_ilbp => mr_settings_ilbp, -- IN
511: mr_settings_pex => mr_settings_pex, -- IN
512: mr_command_ercrst => mr_command_ercrst, -- IN
513: mr_command_cpexs => mr_command_cpexs, -- IN
514: mr_ssp_cfg_ssp_src => mr_ssp_cfg_ssp_src, -- IN
515:
516: alc_alc_bit => alc_alc_bit, -- OUT
517: alc_alc_id_field => alc_alc_id_field, -- OUT
518:
519: err_capt_err_type => err_capt_err_type, -- OUT
520: err_capt_err_pos => err_capt_err_pos, -- OUT
521: err_capt_err_erp => err_capt_err_erp, -- OUT
522:
523: pc_dbg => pc_dbg, -- OUT
524: mr_status_pexs => mr_status_pexs, -- OUT
525:
526: -- TXT Buffers interface
527: tran_word => tran_word, -- IN
528: tran_dlc => tran_dlc, -- IN
529: tran_is_rtr => tran_is_rtr, -- IN
530: tran_ident_type => tran_ident_type, -- IN
531: tran_frame_type => tran_frame_type, -- IN
532: tran_brs => tran_brs, -- IN
533: tran_identifier => tran_identifier, -- IN
534: tran_frame_test => tran_frame_test, -- IN
535: tran_frame_valid => tran_frame_valid, -- IN
536: tran_frame_parity_error => tran_frame_parity_error, -- IN
537: txtb_hw_cmd => txtb_hw_cmd, -- IN
538: txtb_ptr => txtb_ptr, -- OUT
539: txtb_clk_en => txtb_clk_en, -- OUT
540: txtb_changed => txtb_changed, -- IN
541:
542: -- RX Buffer interface
543: rec_ident => rec_ident, -- OUT
544: rec_dlc => rec_dlc, -- OUT
545: rec_is_rtr => rec_is_rtr, -- OUT
546: rec_ident_type => rec_ident_type, -- OUT
547: rec_frame_type => rec_frame_type, -- OUT
548: rec_lbpf => rec_lbpf, -- OUT
549: rec_brs => rec_brs, -- OUT
550: rec_esi => rec_esi, -- OUT
551: rec_ivld => rec_ivld, -- OUT
552: store_metadata => store_metadata, -- OUT
553: rec_abort => rec_abort, -- OUT
554: store_data => store_data, -- OUT
555: store_data_word => store_data_word, -- OUT
556: sof_pulse => sof_pulse, -- OUT
557:
558: -- Operation control FSM Interface
559: is_transmitter => is_transmitter, -- IN
560: is_receiver => is_receiver, -- IN
561: arbitration_lost => arbitration_lost_i, -- OUT
562: set_transmitter => set_transmitter, -- OUT
563: set_receiver => set_receiver, -- OUT
564: set_idle => set_idle, -- OUT
565:
566: -- Fault confinement Interface
567: is_err_active => is_err_active, -- IN
568: is_err_passive => is_err_passive, -- IN
569: is_bus_off => is_bus_off_i, -- IN
570: err_detected => err_detected_i, -- OUT
571: primary_err => primary_err, -- OUT
572: act_err_ovr_flag => act_err_ovr_flag, -- OUT
573: err_delim_late => err_delim_late, -- OUT
574: set_err_active => set_err_active, -- OUT
575: err_ctrs_unchanged => err_ctrs_unchanged, -- OUT
576:
577: -- TX and RX Trigger signals to Sample and Transmitt Data
578: tx_trigger => pc_tx_trigger, -- IN
579: rx_trigger => pc_rx_trigger_i, -- IN
580:
581: -- CAN Bus serial data stream
582: tx_data_nbs => pc_tx_data_nbs, -- OUT
583: tx_data_wbs => tx_data_wbs_i, -- IN
584: rx_data_nbs => pc_rx_data_nbs, -- IN
585:
586: -- Bit Stuffing Interface
587: stuff_enable => stuff_enable, -- OUT
588: destuff_enable => destuff_enable, -- OUT
589: fixed_stuff => fixed_stuff, -- OUT
590: tx_frame_no_sof => tx_frame_no_sof, -- OUT
591: dst_ctr => dst_ctr, -- IN
592: bst_ctr => bst_ctr, -- IN
593: stuff_err => stuff_err, -- IN
594:
595: -- Bus Sampling Interface
596: bit_err => bit_err, -- IN
597: btmc_reset => btmc_reset, -- OUT
598: dbt_measure_start => dbt_measure_start, -- OUT
599: gen_first_ssp => gen_first_ssp, -- OUT
600: sync_edge => sync_edge, -- IN
601: bit_err_enable => bit_err_enable, -- OUT
602:
603: -- CRC Interface
604: crc_enable => crc_enable, -- OUT
605: crc_spec_enable => crc_spec_enable, -- OUT
606: crc_calc_from_rx => crc_calc_from_rx, -- OUT
607: load_init_vect => load_init_vect, -- OUT
608: crc_15 => crc_15, -- IN
609: crc_17 => crc_17, -- IN
610: crc_21 => crc_21, -- IN
611:
612: -- Control signals
613: sp_control => sp_control_i, -- OUT
614: sp_control_q => sp_control_q, -- OUT
615: nbt_ctrs_en => nbt_ctrs_en, -- OUT
616: dbt_ctrs_en => dbt_ctrs_en, -- OUT
617: sync_control => sync_control, -- OUT
618: ssp_reset => ssp_reset, -- OUT
619: tran_delay_meas => tran_delay_meas, -- OUT
620: tran_valid => tran_valid_i, -- OUT
621: rec_valid => rec_valid_i, -- OUT
622: decrement_rec => decrement_rec, -- OUT
623: bit_err_after_ack_err => bit_err_after_ack_err, -- OUT
624:
625: -- Status signals
626: br_shifted => br_shifted, -- OUT
627: form_err => form_err, -- OUT
628: ack_err => ack_err, -- OUT
629: crc_err => crc_err, -- OUT
630: retr_ctr => retr_ctr -- OUT
631: );
632:
633:
634: -----------------------------------------------------------------------------------------------
635: -- Operation control FSM
636: -----------------------------------------------------------------------------------------------
637: operation_control_inst : entity ctu_can_fd_rtl.operation_control
638: port map (
639: clk_sys => clk_sys, -- IN
640: res_n => res_n, -- IN
641:
642: -- Prescaler Interface
643: rx_trigger => pc_rx_trigger_i, -- IN
644:
645: -- Fault confinement Interface
646: is_bus_off => is_bus_off_i, -- IN
647:
648: -- Protocol Control Interface
649: arbitration_lost => arbitration_lost_i, -- IN
650: set_transmitter => set_transmitter, -- IN
651: set_receiver => set_receiver, -- IN
652: set_idle => set_idle, -- IN
653: is_transmitter => is_transmitter, -- OUT
654: is_receiver => is_receiver, -- OUT
655: is_idle => is_idle -- OUT
656: );
657:
658:
659: -----------------------------------------------------------------------------------------------
660: -- Fault confinement
661: -----------------------------------------------------------------------------------------------
662: fault_confinement_inst : entity ctu_can_fd_rtl.fault_confinement
663: port map (
664: clk_sys => clk_sys, -- IN
665: res_n => res_n, -- IN
666:
667: -- DFT support
668: scan_enable => scan_enable, -- IN
669:
670: mr_mode_rom => mr_mode_rom, -- IN
671: mr_ewl_ew_limit => mr_ewl_ew_limit, -- IN
672: mr_erp_erp_limit => mr_erp_erp_limit, -- IN
673: mr_ctr_pres_ctpv => mr_ctr_pres_ctpv, -- IN
674: mr_ctr_pres_ptx => mr_ctr_pres_ptx, -- IN
675: mr_ctr_pres_prx => mr_ctr_pres_prx, -- IN
676: mr_ctr_pres_enorm => mr_ctr_pres_enorm, -- IN
677: mr_ctr_pres_efd => mr_ctr_pres_efd, -- IN
678: mr_status_ewl => mr_status_ewl, -- OUT
679:
680: -- Error signalling for interrupts
681: fcs_changed => fcs_changed, -- OUT
682: err_warning_limit_pulse => err_warning_limit_pulse, -- OUT
683:
684: -- Operation control Interface
685: is_transmitter => is_transmitter, -- IN
686: is_receiver => is_receiver, -- IN
687:
688: -- Protocol control Interface
689: sp_control => sp_control_i, -- IN
690: set_err_active => set_err_active, -- IN
691: err_detected => err_detected_i, -- IN
692: err_ctrs_unchanged => err_ctrs_unchanged, -- IN
693: primary_err => primary_err, -- IN
694: act_err_ovr_flag => act_err_ovr_flag, -- IN
695: err_delim_late => err_delim_late, -- IN
696: tran_valid => tran_valid_i, -- IN
697: decrement_rec => decrement_rec, -- IN
698: bit_err_after_ack_err => bit_err_after_ack_err, -- IN
699:
700: -- Fault confinement State indication
701: is_err_active => is_err_active, -- OUT
702: is_err_passive => is_err_passive, -- OUT
703: is_bus_off => is_bus_off_i, -- OUT
704:
705: -- Error counters
706: tx_err_ctr => tx_err_ctr, -- OUT
707: rx_err_ctr => rx_err_ctr, -- OUT
708: norm_err_ctr => norm_err_ctr, -- OUT
709: data_err_ctr => data_err_ctr -- OUT
710: );
711:
712:
713: -----------------------------------------------------------------------------------------------
714: -- CAN CRC
715: -----------------------------------------------------------------------------------------------
716: can_crc_inst : entity ctu_can_fd_rtl.can_crc
717: generic map (
718: G_CRC15_POL => G_CRC15_POL,
719: G_CRC17_POL => G_CRC17_POL,
720: G_CRC21_POL => G_CRC21_POL
721: )
722: port map (
723: clk_sys => clk_sys, -- IN
724: res_n => res_n, -- IN
725:
726: -- Memory registers interface
727: mr_settings_nisofd => mr_settings_nisofd, -- IN
728:
729: -- Data inputs for CRC calculation
730: data_tx_wbs => crc_data_tx_wbs, -- IN
731: data_tx_nbs => crc_data_tx_nbs, -- IN
732: data_rx_wbs => crc_data_rx_wbs, -- IN
733: data_rx_nbs => crc_data_rx_nbs, -- IN
734:
735: -- Trigger signals to process the data on each CRC input.
736: trig_tx_wbs => crc_trig_tx_wbs, -- IN
737: trig_tx_nbs => crc_trig_tx_nbs, -- IN
738: trig_rx_wbs => crc_trig_rx_wbs, -- IN
739: trig_rx_nbs => crc_trig_rx_nbs, -- IN
740:
741: -- Control signals
742: crc_enable => crc_enable, -- IN
743: crc_spec_enable => crc_spec_enable, -- IN
744: crc_calc_from_rx => crc_calc_from_rx, -- IN
745: load_init_vect => load_init_vect, -- IN
746:
747: -- CRC Outputs
748: crc_15 => crc_15, -- OUT
749: crc_17 => crc_17, -- OUT
750: crc_21 => crc_21 -- OUT
751: );
752:
753:
754: -----------------------------------------------------------------------------------------------
755: -- Bit Stuffing
756: -----------------------------------------------------------------------------------------------
757: bit_stuffing_inst : entity ctu_can_fd_rtl.bit_stuffing
758: port map (
759: clk_sys => clk_sys, -- IN
760: res_n => res_n, -- IN
761:
762: -- Data-path
763: data_in => bst_data_in, -- IN
764: data_out => bst_data_out, -- OUT
765:
766: -- Control signals
767: bst_trigger => bst_trigger, -- IN
768: stuff_enable => stuff_enable, -- IN
769: fixed_stuff => fixed_stuff, -- IN
770: tx_frame_no_sof => tx_frame_no_sof, -- IN
771:
772: -- Status signals
773: bst_ctr => bst_ctr, -- OUT
774: data_halt => data_halt -- OUT
775: );
776:
777:
778: -----------------------------------------------------------------------------------------------
779: -- Bit Destuffing
780: -----------------------------------------------------------------------------------------------
781: bit_destuffing_inst : entity ctu_can_fd_rtl.bit_destuffing
782: port map (
783: clk_sys => clk_sys, -- IN
784: res_n => res_n, -- IN
785:
786: -- Data-path
787: data_in => bds_data_in, -- IN
788: data_out => bds_data_out, -- OUT
789:
790: -- Control signals
791: bds_trigger => bds_trigger, -- IN
792: destuff_enable => destuff_enable, -- IN
793: fixed_stuff => fixed_stuff, -- IN
794:
795: -- Status Outpus
796: stuff_err => stuff_err, -- OUT
797: destuffed => destuffed, -- OUT
798: dst_ctr => dst_ctr -- OUT
799: );
800:
801:
802: -----------------------------------------------------------------------------------------------
803: -- Bus traffic counters
804: -----------------------------------------------------------------------------------------------
805: bus_traffic_ctrs_gen : if (G_SUP_TRAFFIC_CTRS = true) generate
806:
807: bus_traffic_counters_inst : entity ctu_can_fd_rtl.bus_traffic_counters
808: port map (
809: clk_sys => clk_sys, -- IN
810: res_n => res_n, -- IN
811: scan_enable => scan_enable, -- IN
812:
813: -- Memory registers interface
814: mr_command_rxfcrst => mr_command_rxfcrst, -- IN
815: mr_command_txfcrst => mr_command_txfcrst, -- IN
816:
817: tran_valid => tran_valid_i, -- IN
818: rec_valid => rec_valid_i, -- IN
819:
820: -- Counter outputs
821: tx_frame_ctr => tx_frame_ctr, -- OUT
822: rx_frame_ctr => rx_frame_ctr -- OUT
823: );
824:
825: end generate bus_traffic_ctrs_gen;
826:
827: no_bus_traffic_ctrs_gen : if (G_SUP_TRAFFIC_CTRS = false) generate
828: tx_frame_ctr <= (others => '0');
829: rx_frame_ctr <= (others => '0');
830: end generate;
831:
832: -----------------------------------------------------------------------------------------------
833: -- Trigger multiplexor
834: -----------------------------------------------------------------------------------------------
835: trigger_mux_inst : entity ctu_can_fd_rtl.trigger_mux
836: generic map (
837: G_SAMPLE_TRIGGER_COUNT => G_SAMPLE_TRIGGER_COUNT
838: )
839: port map (
840: -- Clock and Asynchronous reset
841: clk_sys => clk_sys, -- IN
842: res_n => res_n, -- IN
843:
844: -- Input triggers
845: rx_triggers => rx_triggers, -- IN
846: tx_trigger => tx_trigger, -- IN
847:
848: -- Control signals
849: data_halt => data_halt, -- IN
850: destuffed => destuffed, -- IN
851: fixed_stuff => fixed_stuff, -- IN
852: bds_data_in => bds_data_in, -- IN
853:
854: -- Output triggers
855: pc_tx_trigger => pc_tx_trigger, -- OUT
856: pc_rx_trigger => pc_rx_trigger_i, -- OUT
857: bst_trigger => bst_trigger, -- OUT
858: bds_trigger => bds_trigger, -- OUT
859: crc_trig_rx_nbs => crc_trig_rx_nbs, -- OUT
860: crc_trig_tx_nbs => crc_trig_tx_nbs, -- OUT
861: crc_trig_rx_wbs => crc_trig_rx_wbs, -- OUT
862: crc_trig_tx_wbs => crc_trig_tx_wbs, -- OUT
863:
864: -- Status signals
865: crc_data_rx_wbs => crc_data_rx_wbs -- OUT
866: );
867:
868:
869: -----------------------------------------------------------------------------------------------
870: -----------------------------------------------------------------------------------------------
871: -- Datapath connection
872: -----------------------------------------------------------------------------------------------
873: -----------------------------------------------------------------------------------------------
874:
875: -----------------------------------------------------------------------------------------------
876: -- Protocol control datapath connection:
877: -- 1. RX Data - Output of bit destuffing.
878: -- 2. TX Data - Input to bit stuffing.
879: -----------------------------------------------------------------------------------------------
880: pc_rx_data_nbs <= bds_data_out;
881: bst_data_in <= pc_tx_data_nbs;
882:
883: -----------------------------------------------------------------------------------------------
884: -- CRC 15 (No bit stuffing) data inputs:
885: -- 1. TX Data from Protocol control.
886: -- 2. RX Data after bit destuffing.
887: -----------------------------------------------------------------------------------------------
888: crc_data_tx_nbs <= pc_tx_data_nbs;
889: crc_data_rx_nbs <= bds_data_out;
890:
891: -----------------------------------------------------------------------------------------------
892: -- CRC 17,21 (With bit stuffing) data inputs:
893: -- 1. TX Data after Bit stuffing.
894: -- 2. RX Data before Bit destuffing.
895: -----------------------------------------------------------------------------------------------
896: crc_data_tx_wbs <= bst_data_out;
897:
898: lpb_dominant <= rx_data_wbs and bst_data_out;
899:
900: -----------------------------------------------------------------------------------------------
901: -- Bit Stuffing data input:
902: -- 1. Bit Destuffing output for secondary sampling. This-way core will automatically receive
903: -- what it transmitts without loop over Transceiver. Bit Error is detected by Bus sampling
904: -- properly.
905: -- 2. Looped back dominant Bit for Bus monitoring Mode.
906: -- 3. Regular RX Data
907: -----------------------------------------------------------------------------------------------
908: bds_data_in <= bst_data_out when (sp_control_q = SECONDARY_SAMPLE) else
909: lpb_dominant when (mr_mode_bmm = '1') else
910: rx_data_wbs;
911:
912: -----------------------------------------------------------------------------------------------
913: -- In Bus monitoring mode or when core is disabled, transmitted data to the bus are only
914: -- recessive. Otherwise transmitted data are stuffed data!
915: -----------------------------------------------------------------------------------------------
916: tx_data_wbs_i <= RECESSIVE when (mr_settings_ena = CTU_CAN_DISABLED) else
917: RECESSIVE when (mr_mode_bmm = '1') else
918: bst_data_out;
919:
920: -----------------------------------------------------------------------------------------------
921: -- Node transmitting dominant bit does shall not re-synchronize as a result of dominant
922: -- transmitted bit.
923: -----------------------------------------------------------------------------------------------
924: no_pos_resync <= '1' when (tx_data_wbs_i = DOMINANT) else
925: '0';
926:
927: -----------------------------------------------------------------------------------------------
928: -- CAN Core status record connections
929: -----------------------------------------------------------------------------------------------
930: cc_stat.is_err_active <= is_err_active;
931: cc_stat.is_err_passive <= is_err_passive;
932: cc_stat.is_bus_off <= is_bus_off_i;
933: cc_stat.is_transmitter <= is_transmitter;
934: cc_stat.is_receiver <= is_receiver;
935: cc_stat.is_idle <= is_idle;
936: cc_stat.tx_err_ctr <= tx_err_ctr;
937: cc_stat.rx_err_ctr <= rx_err_ctr;
938: cc_stat.status_pexs <= mr_status_pexs;
939: cc_stat.norm_err_ctr <= norm_err_ctr;
940: cc_stat.data_err_ctr <= data_err_ctr;
941: cc_stat.err_type <= err_capt_err_type;
942: cc_stat.err_erp <= err_capt_err_erp;
943: cc_stat.err_pos <= err_capt_err_pos;
944: cc_stat.retr_ctr <= retr_ctr;
945: cc_stat.alc_bit <= alc_alc_bit;
946: cc_stat.alc_id_field <= alc_alc_id_field;
947: cc_stat.rx_frame_ctr <= rx_frame_ctr;
948: cc_stat.tx_frame_ctr <= tx_frame_ctr;
949: cc_stat.bst_ctr <= bst_ctr;
950: cc_stat.dst_ctr <= dst_ctr;
951: cc_stat.status_ewl <= mr_status_ewl;
952:
953: -----------------------------------------------------------------------------------------------
954: -- Internal signals to output propagation
955: -----------------------------------------------------------------------------------------------
956: rec_valid <= rec_valid_i;
957: arbitration_lost <= arbitration_lost_i;
958: tran_valid <= tran_valid_i;
959: err_detected <= err_detected_i;
960: tx_data_wbs <= tx_data_wbs_i;
961: sp_control <= sp_control_i;
962:
963: -- Test signals observation
964: pc_rx_trigger <= pc_rx_trigger_i;
965:
966: -----------------------------------------------------------------------------------------------
967: -----------------------------------------------------------------------------------------------
968: -- Assertions
969: -----------------------------------------------------------------------------------------------
970: -----------------------------------------------------------------------------------------------
971:
972: -- psl default clock is rising_edge(clk_sys);
973:
974: -- psl no_stuff_bit_in_error_frame_1_asrt : assert never
975: -- (data_halt = '1' and pc_dbg.is_err = '1')
976: -- report "Stuff bits not allowed in Error frame!";
977:
978: -- Note: In following assertion, we can't check at the same clock cycle
979: -- because Data halt will be cleared one clock cycle later than
980: -- Error frame transmission starts!
981:
982: -- psl no_stuff_bit_in_error_frame_2_asrt : assert never
983: -- ({pc_dbg.is_err = '1'; pc_dbg.is_err = '1' and destuffed = '1'})
984: -- report "Stuff bits not allowed in Error frame!";
985:
986: -- psl no_stuff_bit_in_overload_frame_asrt : assert never
987: -- ((destuffed = '1' or data_halt = '1') and pc_dbg.is_overload = '1')
988: -- report "Stuff bits not allowed in Overload frame!";
989:
990: -- psl no_stuff_bit_in_eof_asrt : assert never
991: -- ((destuffed = '1' or data_halt = '1') and pc_dbg.is_eof = '1')
992: -- report "Stuff bits not allowed in End of frame!";
993:
994: -- psl no_stuff_bit_in_intermission_asrt : assert never
995: -- ((destuffed = '1' or data_halt = '1') and pc_dbg.is_intermission = '1')
996: -- report "Stuff bits not allowed in Intermission!";
997:
998: -- psl no_stuff_bit_in_idle_asrt : assert never
999: -- ((destuffed = '1' or data_halt = '1') and is_idle = '1' and mr_mode_rom = '0')
1000: -- report "Stuff bits not allowed in Bus idle!";
1001:
1002: -- psl no_tran_frame_valid_in_rom_or_bmm_asrt : assert never
1003: -- (tran_frame_valid = '1' and (mr_mode_bmm = '1' or mr_mode_rom = '1'))
1004: -- report "TX frame shall not be ready in MODE[ROM] or MODE[BMM]!";
1005:
1006: end architecture;