NVC code coverage report

Nested Instances	Statement	Branch	Toggle	Expression	FSM state	Functional	Average
BYTE_GEN(0)	100.0 % (3/3)	100.0 % (2/2)	N.A.	100.0 % (7/7)	N.A.	N.A.	100.0 % (12/12)
BYTE_GEN(1)	100.0 % (3/3)	100.0 % (2/2)	N.A.	85.7 % (6/7)	N.A.	N.A.	91.6 % (11/12)
BYTE_GEN(2)	100.0 % (3/3)	100.0 % (2/2)	N.A.	85.7 % (6/7)	N.A.	N.A.	91.6 % (11/12)
BYTE_GEN(3)	100.0 % (3/3)	100.0 % (2/2)	N.A.	85.7 % (6/7)	N.A.	N.A.	91.6 % (11/12)
RAM_RST_FALSE_GEN	100.0 % (4/4)	100.0 % (4/4)	N.A.	100.0 % (2/2)	N.A.	N.A.	100.0 % (10/10)
SYNC_READ_GEN	100.0 % (2/2)	100.0 % (2/2)	N.A.	N.A.	N.A.	N.A.	100.0 % (4/4)

Current Instance	Statement	Branch	Toggle	Expression	FSM state	Functional	Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.TXT_BUF_COMP_GEN(3).TXT_BUF_ODD_GEN.TXT_BUFFER_ODD_INST.TXT_BUFFER_RAM_INST.DP_INF_RAM_BE_INST	100.0 % (1/1)	N.A.	100.0 % (1578/1578)	N.A.	N.A.	N.A.	100.0 % (1579/1579)

Uncovered toggles:

Excluded toggles:

Port:

CLK_SYS

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

Port:

RES_N

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

Port:

ADDR_A

	Element	From	To	Threshold	Excluded due to
Bin	(4)	0	1	1	Exclude file
Bin	(4)	1	0	1	Exclude file
Bin	(3)	0	1	1	Exclude file
Bin	(3)	1	0	1	Exclude file
Bin	(2)	0	1	1	Exclude file
Bin	(2)	1	0	1	Exclude file
Bin	(1)	0	1	1	Exclude file
Bin	(1)	1	0	1	Exclude file
Bin	(0)	0	1	1	Exclude file
Bin	(0)	1	0	1	Exclude file

Port:

WRITE

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

Port:

DATA_IN

	Element	From	To	Threshold	Excluded due to
Bin	(31)	0	1	1	Exclude file
Bin	(31)	1	0	1	Exclude file
Bin	(30)	0	1	1	Exclude file
Bin	(30)	1	0	1	Exclude file
Bin	(29)	0	1	1	Exclude file
Bin	(29)	1	0	1	Exclude file
Bin	(28)	0	1	1	Exclude file
Bin	(28)	1	0	1	Exclude file
Bin	(27)	0	1	1	Exclude file
Bin	(27)	1	0	1	Exclude file
Bin	(26)	0	1	1	Exclude file
Bin	(26)	1	0	1	Exclude file
Bin	(25)	0	1	1	Exclude file
Bin	(25)	1	0	1	Exclude file
Bin	(24)	0	1	1	Exclude file
Bin	(24)	1	0	1	Exclude file
Bin	(23)	0	1	1	Exclude file
Bin	(23)	1	0	1	Exclude file
Bin	(22)	0	1	1	Exclude file
Bin	(22)	1	0	1	Exclude file
Bin	(21)	0	1	1	Exclude file
Bin	(21)	1	0	1	Exclude file
Bin	(20)	0	1	1	Exclude file
Bin	(20)	1	0	1	Exclude file
Bin	(19)	0	1	1	Exclude file
Bin	(19)	1	0	1	Exclude file
Bin	(18)	0	1	1	Exclude file
Bin	(18)	1	0	1	Exclude file
Bin	(17)	0	1	1	Exclude file
Bin	(17)	1	0	1	Exclude file
Bin	(16)	0	1	1	Exclude file
Bin	(16)	1	0	1	Exclude file
Bin	(15)	0	1	1	Exclude file
Bin	(15)	1	0	1	Exclude file
Bin	(14)	0	1	1	Exclude file
Bin	(14)	1	0	1	Exclude file
Bin	(13)	0	1	1	Exclude file
Bin	(13)	1	0	1	Exclude file
Bin	(12)	0	1	1	Exclude file
Bin	(12)	1	0	1	Exclude file
Bin	(11)	0	1	1	Exclude file
Bin	(11)	1	0	1	Exclude file
Bin	(10)	0	1	1	Exclude file
Bin	(10)	1	0	1	Exclude file
Bin	(9)	0	1	1	Exclude file
Bin	(9)	1	0	1	Exclude file
Bin	(8)	0	1	1	Exclude file
Bin	(8)	1	0	1	Exclude file
Bin	(7)	0	1	1	Exclude file
Bin	(7)	1	0	1	Exclude file
Bin	(6)	0	1	1	Exclude file
Bin	(6)	1	0	1	Exclude file
Bin	(5)	0	1	1	Exclude file
Bin	(5)	1	0	1	Exclude file
Bin	(4)	0	1	1	Exclude file
Bin	(4)	1	0	1	Exclude file
Bin	(3)	0	1	1	Exclude file
Bin	(3)	1	0	1	Exclude file
Bin	(2)	0	1	1	Exclude file
Bin	(2)	1	0	1	Exclude file
Bin	(1)	0	1	1	Exclude file
Bin	(1)	1	0	1	Exclude file
Bin	(0)	0	1	1	Exclude file
Bin	(0)	1	0	1	Exclude file

Port:

BE

	Element	From	To	Threshold	Excluded due to
Bin	(3)	0	1	1	Exclude file
Bin	(3)	1	0	1	Exclude file
Bin	(2)	0	1	1	Exclude file
Bin	(2)	1	0	1	Exclude file
Bin	(1)	0	1	1	Exclude file
Bin	(1)	1	0	1	Exclude file
Bin	(0)	0	1	1	Exclude file
Bin	(0)	1	0	1	Exclude file

Port:

ADDR_B

	Element	From	To	Threshold	Excluded due to
Bin	(4)	0	1	1	Exclude file
Bin	(4)	1	0	1	Exclude file
Bin	(3)	0	1	1	Exclude file
Bin	(3)	1	0	1	Exclude file
Bin	(2)	0	1	1	Exclude file
Bin	(2)	1	0	1	Exclude file
Bin	(1)	0	1	1	Exclude file
Bin	(1)	1	0	1	Exclude file
Bin	(0)	0	1	1	Exclude file
Bin	(0)	1	0	1	Exclude file

Covered toggles:

Port:

DATA_OUT

	Element	From	To	Count	Threshold
Bin	(31)	0	1	885	1
Bin	(31)	1	0	1505	1
Bin	(30)	0	1	984	1
Bin	(30)	1	0	1604	1
Bin	(29)	0	1	847	1
Bin	(29)	1	0	1467	1
Bin	(28)	0	1	2160	1
Bin	(28)	1	0	2771	1
Bin	(27)	0	1	2417	1
Bin	(27)	1	0	3028	1
Bin	(26)	0	1	2077	1
Bin	(26)	1	0	2685	1
Bin	(25)	0	1	2315	1
Bin	(25)	1	0	2925	1
Bin	(24)	0	1	2240	1
Bin	(24)	1	0	2843	1
Bin	(23)	0	1	2433	1
Bin	(23)	1	0	3044	1
Bin	(22)	0	1	2383	1
Bin	(22)	1	0	2993	1
Bin	(21)	0	1	2495	1
Bin	(21)	1	0	3098	1
Bin	(20)	0	1	2487	1
Bin	(20)	1	0	3093	1
Bin	(19)	0	1	2547	1
Bin	(19)	1	0	3151	1
Bin	(18)	0	1	2396	1
Bin	(18)	1	0	3004	1
Bin	(17)	0	1	1628	1
Bin	(17)	1	0	2246	1
Bin	(16)	0	1	1683	1
Bin	(16)	1	0	2299	1
Bin	(15)	0	1	1775	1
Bin	(15)	1	0	2394	1
Bin	(14)	0	1	1982	1
Bin	(14)	1	0	2599	1
Bin	(13)	0	1	1839	1
Bin	(13)	1	0	2454	1
Bin	(12)	0	1	1509	1
Bin	(12)	1	0	2126	1
Bin	(11)	0	1	1491	1
Bin	(11)	1	0	2109	1
Bin	(10)	0	1	2125	1
Bin	(10)	1	0	2742	1
Bin	(9)	0	1	2310	1
Bin	(9)	1	0	2909	1
Bin	(8)	0	1	1913	1
Bin	(8)	1	0	2529	1
Bin	(7)	0	1	3053	1
Bin	(7)	1	0	3634	1
Bin	(6)	0	1	2921	1
Bin	(6)	1	0	3513	1
Bin	(5)	0	1	2760	1
Bin	(5)	1	0	3374	1
Bin	(4)	0	1	1997	1
Bin	(4)	1	0	2612	1
Bin	(3)	0	1	2193	1
Bin	(3)	1	0	2793	1
Bin	(2)	0	1	2128	1
Bin	(2)	1	0	2727	1
Bin	(1)	0	1	2225	1
Bin	(1)	1	0	2824	1
Bin	(0)	0	1	2520	1
Bin	(0)	1	0	3115	1

Signal:

RAM_MEMORY

	Element	From	To	Count	Threshold
Bin	(0)(31)	0	1	138	1
Bin	(0)(31)	1	0	16175	1
Bin	(0)(30)	0	1	238	1
Bin	(0)(30)	1	0	16254	1
Bin	(0)(29)	0	1	260	1
Bin	(0)(29)	1	0	16215	1
Bin	(0)(28)	0	1	261	1
Bin	(0)(28)	1	0	16343	1
Bin	(0)(27)	0	1	218	1
Bin	(0)(27)	1	0	16194	1
Bin	(0)(26)	0	1	176	1
Bin	(0)(26)	1	0	16155	1
Bin	(0)(25)	0	1	177	1
Bin	(0)(25)	1	0	16155	1
Bin	(0)(24)	0	1	237	1
Bin	(0)(24)	1	0	16233	1
Bin	(0)(23)	0	1	117	1
Bin	(0)(23)	1	0	16007	1
Bin	(0)(22)	0	1	216	1
Bin	(0)(22)	1	0	16065	1
Bin	(0)(21)	0	1	197	1
Bin	(0)(21)	1	0	16045	1
Bin	(0)(20)	0	1	219	1
Bin	(0)(20)	1	0	16161	1
Bin	(0)(19)	0	1	219	1
Bin	(0)(19)	1	0	16134	1
Bin	(0)(18)	0	1	218	1
Bin	(0)(18)	1	0	16107	1
Bin	(0)(17)	0	1	137	1
Bin	(0)(17)	1	0	16058	1
Bin	(0)(16)	0	1	215	1
Bin	(0)(16)	1	0	16044	1
Bin	(0)(15)	0	1	178	1
Bin	(0)(15)	1	0	14144	1
Bin	(0)(14)	0	1	236	1
Bin	(0)(14)	1	0	14197	1
Bin	(0)(13)	0	1	176	1
Bin	(0)(13)	1	0	14158	1
Bin	(0)(12)	0	1	239	1
Bin	(0)(12)	1	0	14220	1
Bin	(0)(11)	0	1	155	1
Bin	(0)(11)	1	0	14157	1
Bin	(0)(10)	0	1	218	1
Bin	(0)(10)	1	0	14240	1
Bin	(0)(9)	0	1	883	1
Bin	(0)(9)	1	0	15599	1
Bin	(0)(8)	0	1	196	1
Bin	(0)(8)	1	0	14199	1
Bin	(0)(7)	0	1	1186	1
Bin	(0)(7)	1	0	13853	1
Bin	(0)(6)	0	1	968	1
Bin	(0)(6)	1	0	13822	1
Bin	(0)(5)	0	1	521	1
Bin	(0)(5)	1	0	13551	1
Bin	(0)(4)	0	1	239	1
Bin	(0)(4)	1	0	13271	1
Bin	(0)(3)	0	1	821	1
Bin	(0)(3)	1	0	13543	1
Bin	(0)(2)	0	1	854	1
Bin	(0)(2)	1	0	13713	1
Bin	(0)(1)	0	1	796	1
Bin	(0)(1)	1	0	13567	1
Bin	(0)(0)	0	1	879	1
Bin	(0)(0)	1	0	13701	1
Bin	(1)(31)	0	1	168	1
Bin	(1)(31)	1	0	12788	1
Bin	(1)(30)	0	1	189	1
Bin	(1)(30)	1	0	12807	1
Bin	(1)(29)	0	1	234	1
Bin	(1)(29)	1	0	12850	1
Bin	(1)(28)	0	1	953	1
Bin	(1)(28)	1	0	13403	1
Bin	(1)(27)	0	1	913	1
Bin	(1)(27)	1	0	13402	1
Bin	(1)(26)	0	1	957	1
Bin	(1)(26)	1	0	13449	1
Bin	(1)(25)	0	1	988	1
Bin	(1)(25)	1	0	13454	1
Bin	(1)(24)	0	1	1030	1
Bin	(1)(24)	1	0	13484	1
Bin	(1)(23)	0	1	1061	1
Bin	(1)(23)	1	0	13503	1
Bin	(1)(22)	0	1	1085	1
Bin	(1)(22)	1	0	13483	1
Bin	(1)(21)	0	1	989	1
Bin	(1)(21)	1	0	13438	1
Bin	(1)(20)	0	1	1006	1
Bin	(1)(20)	1	0	13409	1
Bin	(1)(19)	0	1	945	1
Bin	(1)(19)	1	0	13384	1
Bin	(1)(18)	0	1	988	1
Bin	(1)(18)	1	0	13421	1
Bin	(1)(17)	0	1	572	1
Bin	(1)(17)	1	0	13129	1
Bin	(1)(16)	0	1	643	1
Bin	(1)(16)	1	0	13200	1
Bin	(1)(15)	0	1	588	1
Bin	(1)(15)	1	0	14195	1
Bin	(1)(14)	0	1	632	1
Bin	(1)(14)	1	0	14328	1
Bin	(1)(13)	0	1	585	1
Bin	(1)(13)	1	0	14231	1
Bin	(1)(12)	0	1	636	1
Bin	(1)(12)	1	0	14208	1
Bin	(1)(11)	0	1	592	1
Bin	(1)(11)	1	0	14207	1
Bin	(1)(10)	0	1	623	1
Bin	(1)(10)	1	0	14176	1
Bin	(1)(9)	0	1	694	1
Bin	(1)(9)	1	0	14389	1
Bin	(1)(8)	0	1	538	1
Bin	(1)(8)	1	0	14148	1
Bin	(1)(7)	0	1	607	1
Bin	(1)(7)	1	0	14176	1
Bin	(1)(6)	0	1	565	1
Bin	(1)(6)	1	0	14141	1
Bin	(1)(5)	0	1	598	1
Bin	(1)(5)	1	0	14192	1
Bin	(1)(4)	0	1	653	1
Bin	(1)(4)	1	0	14172	1
Bin	(1)(3)	0	1	549	1
Bin	(1)(3)	1	0	14198	1
Bin	(1)(2)	0	1	676	1
Bin	(1)(2)	1	0	14303	1
Bin	(1)(1)	0	1	591	1
Bin	(1)(1)	1	0	14168	1
Bin	(1)(0)	0	1	662	1
Bin	(1)(0)	1	0	14264	1
Bin	(2)(31)	0	1	247	1
Bin	(2)(31)	1	0	14759	1
Bin	(2)(30)	0	1	199	1
Bin	(2)(30)	1	0	14895	1
Bin	(2)(29)	0	1	217	1
Bin	(2)(29)	1	0	14732	1
Bin	(2)(28)	0	1	224	1
Bin	(2)(28)	1	0	14738	1
Bin	(2)(27)	0	1	200	1
Bin	(2)(27)	1	0	14716	1
Bin	(2)(26)	0	1	241	1
Bin	(2)(26)	1	0	14808	1
Bin	(2)(25)	0	1	202	1
Bin	(2)(25)	1	0	14719	1
Bin	(2)(24)	0	1	213	1
Bin	(2)(24)	1	0	14728	1
Bin	(2)(23)	0	1	244	1
Bin	(2)(23)	1	0	14998	1
Bin	(2)(22)	0	1	244	1
Bin	(2)(22)	1	0	15000	1
Bin	(2)(21)	0	1	219	1
Bin	(2)(21)	1	0	14979	1
Bin	(2)(20)	0	1	235	1
Bin	(2)(20)	1	0	14993	1
Bin	(2)(19)	0	1	231	1
Bin	(2)(19)	1	0	14990	1
Bin	(2)(18)	0	1	244	1
Bin	(2)(18)	1	0	14998	1
Bin	(2)(17)	0	1	249	1
Bin	(2)(17)	1	0	15006	1
Bin	(2)(16)	0	1	207	1
Bin	(2)(16)	1	0	14967	1
Bin	(2)(15)	0	1	227	1
Bin	(2)(15)	1	0	14939	1
Bin	(2)(14)	0	1	225	1
Bin	(2)(14)	1	0	14941	1
Bin	(2)(13)	0	1	216	1
Bin	(2)(13)	1	0	14931	1
Bin	(2)(12)	0	1	234	1
Bin	(2)(12)	1	0	14949	1
Bin	(2)(11)	0	1	258	1
Bin	(2)(11)	1	0	14967	1
Bin	(2)(10)	0	1	239	1
Bin	(2)(10)	1	0	14952	1
Bin	(2)(9)	0	1	211	1
Bin	(2)(9)	1	0	14925	1
Bin	(2)(8)	0	1	214	1
Bin	(2)(8)	1	0	14932	1
Bin	(2)(7)	0	1	253	1
Bin	(2)(7)	1	0	14932	1
Bin	(2)(6)	0	1	229	1
Bin	(2)(6)	1	0	14927	1
Bin	(2)(5)	0	1	224	1
Bin	(2)(5)	1	0	14908	1
Bin	(2)(4)	0	1	221	1
Bin	(2)(4)	1	0	14905	1
Bin	(2)(3)	0	1	265	1
Bin	(2)(3)	1	0	14945	1
Bin	(2)(2)	0	1	239	1
Bin	(2)(2)	1	0	14920	1
Bin	(2)(1)	0	1	223	1
Bin	(2)(1)	1	0	14907	1
Bin	(2)(0)	0	1	223	1
Bin	(2)(0)	1	0	14904	1
Bin	(3)(31)	0	1	234	1
Bin	(3)(31)	1	0	14333	1
Bin	(3)(30)	0	1	238	1
Bin	(3)(30)	1	0	14334	1
Bin	(3)(29)	0	1	216	1
Bin	(3)(29)	1	0	14314	1
Bin	(3)(28)	0	1	240	1
Bin	(3)(28)	1	0	14330	1
Bin	(3)(27)	0	1	238	1
Bin	(3)(27)	1	0	14333	1
Bin	(3)(26)	0	1	230	1
Bin	(3)(26)	1	0	14326	1
Bin	(3)(25)	0	1	250	1
Bin	(3)(25)	1	0	14341	1
Bin	(3)(24)	0	1	253	1
Bin	(3)(24)	1	0	14346	1
Bin	(3)(23)	0	1	227	1
Bin	(3)(23)	1	0	14323	1
Bin	(3)(22)	0	1	188	1
Bin	(3)(22)	1	0	14292	1
Bin	(3)(21)	0	1	250	1
Bin	(3)(21)	1	0	14347	1
Bin	(3)(20)	0	1	237	1
Bin	(3)(20)	1	0	14335	1
Bin	(3)(19)	0	1	218	1
Bin	(3)(19)	1	0	14318	1
Bin	(3)(18)	0	1	204	1
Bin	(3)(18)	1	0	14309	1
Bin	(3)(17)	0	1	238	1
Bin	(3)(17)	1	0	14333	1
Bin	(3)(16)	0	1	239	1
Bin	(3)(16)	1	0	14334	1
Bin	(3)(15)	0	1	194	1
Bin	(3)(15)	1	0	14260	1
Bin	(3)(14)	0	1	219	1
Bin	(3)(14)	1	0	14234	1
Bin	(3)(13)	0	1	242	1
Bin	(3)(13)	1	0	14253	1
Bin	(3)(12)	0	1	248	1
Bin	(3)(12)	1	0	14265	1
Bin	(3)(11)	0	1	221	1
Bin	(3)(11)	1	0	14234	1
Bin	(3)(10)	0	1	255	1
Bin	(3)(10)	1	0	14266	1
Bin	(3)(9)	0	1	271	1
Bin	(3)(9)	1	0	14275	1
Bin	(3)(8)	0	1	220	1
Bin	(3)(8)	1	0	14246	1
Bin	(3)(7)	0	1	241	1
Bin	(3)(7)	1	0	14165	1
Bin	(3)(6)	0	1	196	1
Bin	(3)(6)	1	0	14132	1
Bin	(3)(5)	0	1	247	1
Bin	(3)(5)	1	0	14337	1
Bin	(3)(4)	0	1	197	1
Bin	(3)(4)	1	0	14131	1
Bin	(3)(3)	0	1	209	1
Bin	(3)(3)	1	0	14145	1
Bin	(3)(2)	0	1	223	1
Bin	(3)(2)	1	0	14153	1
Bin	(3)(1)	0	1	222	1
Bin	(3)(1)	1	0	14152	1
Bin	(3)(0)	0	1	254	1
Bin	(3)(0)	1	0	14177	1
Bin	(4)(31)	0	1	780	1
Bin	(4)(31)	1	0	12032	1
Bin	(4)(30)	0	1	727	1
Bin	(4)(30)	1	0	12072	1
Bin	(4)(29)	0	1	707	1
Bin	(4)(29)	1	0	12067	1
Bin	(4)(28)	0	1	658	1
Bin	(4)(28)	1	0	12038	1
Bin	(4)(27)	0	1	743	1
Bin	(4)(27)	1	0	12026	1
Bin	(4)(26)	0	1	722	1
Bin	(4)(26)	1	0	12112	1
Bin	(4)(25)	0	1	762	1
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Bin	(18)(7)	0	1	176	1
Bin	(18)(7)	1	0	5118	1
Bin	(18)(6)	0	1	210	1
Bin	(18)(6)	1	0	5122	1
Bin	(18)(5)	0	1	199	1
Bin	(18)(5)	1	0	5120	1
Bin	(18)(4)	0	1	210	1
Bin	(18)(4)	1	0	5122	1
Bin	(18)(3)	0	1	241	1
Bin	(18)(3)	1	0	5124	1
Bin	(18)(2)	0	1	233	1
Bin	(18)(2)	1	0	5124	1
Bin	(18)(1)	0	1	220	1
Bin	(18)(1)	1	0	5122	1
Bin	(18)(0)	0	1	212	1
Bin	(18)(0)	1	0	5122	1
Bin	(19)(31)	0	1	235	1
Bin	(19)(31)	1	0	4510	1
Bin	(19)(30)	0	1	253	1
Bin	(19)(30)	1	0	4511	1
Bin	(19)(29)	0	1	214	1
Bin	(19)(29)	1	0	4509	1
Bin	(19)(28)	0	1	211	1
Bin	(19)(28)	1	0	4509	1
Bin	(19)(27)	0	1	256	1
Bin	(19)(27)	1	0	4511	1
Bin	(19)(26)	0	1	210	1
Bin	(19)(26)	1	0	4509	1
Bin	(19)(25)	0	1	214	1
Bin	(19)(25)	1	0	4509	1
Bin	(19)(24)	0	1	232	1
Bin	(19)(24)	1	0	4510	1
Bin	(19)(23)	0	1	214	1
Bin	(19)(23)	1	0	4509	1
Bin	(19)(22)	0	1	232	1
Bin	(19)(22)	1	0	4510	1
Bin	(19)(21)	0	1	236	1
Bin	(19)(21)	1	0	4510	1
Bin	(19)(20)	0	1	189	1
Bin	(19)(20)	1	0	4508	1
Bin	(19)(19)	0	1	215	1
Bin	(19)(19)	1	0	4509	1
Bin	(19)(18)	0	1	189	1
Bin	(19)(18)	1	0	4508	1
Bin	(19)(17)	0	1	236	1
Bin	(19)(17)	1	0	4510	1
Bin	(19)(16)	0	1	231	1
Bin	(19)(16)	1	0	4510	1
Bin	(19)(15)	0	1	235	1
Bin	(19)(15)	1	0	4510	1
Bin	(19)(14)	0	1	210	1
Bin	(19)(14)	1	0	4509	1
Bin	(19)(13)	0	1	257	1
Bin	(19)(13)	1	0	4511	1
Bin	(19)(12)	0	1	210	1
Bin	(19)(12)	1	0	4509	1
Bin	(19)(11)	0	1	235	1
Bin	(19)(11)	1	0	4510	1
Bin	(19)(10)	0	1	210	1
Bin	(19)(10)	1	0	4509	1
Bin	(19)(9)	0	1	235	1
Bin	(19)(9)	1	0	4510	1
Bin	(19)(8)	0	1	231	1
Bin	(19)(8)	1	0	4510	1
Bin	(19)(7)	0	1	235	1
Bin	(19)(7)	1	0	4510	1
Bin	(19)(6)	0	1	190	1
Bin	(19)(6)	1	0	4508	1
Bin	(19)(5)	0	1	214	1
Bin	(19)(5)	1	0	4509	1
Bin	(19)(4)	0	1	232	1
Bin	(19)(4)	1	0	4510	1
Bin	(19)(3)	0	1	215	1
Bin	(19)(3)	1	0	4509	1
Bin	(19)(2)	0	1	210	1
Bin	(19)(2)	1	0	4509	1
Bin	(19)(1)	0	1	215	1
Bin	(19)(1)	1	0	4509	1
Bin	(19)(0)	0	1	211	1
Bin	(19)(0)	1	0	4509	1
Bin	(20)(31)	0	1	370	1
Bin	(20)(31)	1	0	4064	1
Bin	(20)(30)	0	1	206	1
Bin	(20)(30)	1	0	3900	1
Bin	(20)(29)	0	1	328	1
Bin	(20)(29)	1	0	3963	1
Bin	(20)(28)	0	1	328	1
Bin	(20)(28)	1	0	3942	1
Bin	(20)(27)	0	1	328	1
Bin	(20)(27)	1	0	3984	1
Bin	(20)(26)	0	1	328	1
Bin	(20)(26)	1	0	3942	1
Bin	(20)(25)	0	1	328	1
Bin	(20)(25)	1	0	4064	1
Bin	(20)(24)	0	1	206	1
Bin	(20)(24)	1	0	3900	1
Bin	(20)(23)	0	1	370	1
Bin	(20)(23)	1	0	4064	1
Bin	(20)(22)	0	1	185	1
Bin	(20)(22)	1	0	3900	1
Bin	(20)(21)	0	1	328	1
Bin	(20)(21)	1	0	3942	1
Bin	(20)(20)	0	1	328	1
Bin	(20)(20)	1	0	3963	1
Bin	(20)(19)	0	1	328	1
Bin	(20)(19)	1	0	3942	1
Bin	(20)(18)	0	1	328	1
Bin	(20)(18)	1	0	3984	1
Bin	(20)(17)	0	1	370	1
Bin	(20)(17)	1	0	4064	1
Bin	(20)(16)	0	1	206	1
Bin	(20)(16)	1	0	3900	1
Bin	(20)(15)	0	1	391	1
Bin	(20)(15)	1	0	3388	1
Bin	(20)(14)	0	1	227	1
Bin	(20)(14)	1	0	3224	1
Bin	(20)(13)	0	1	328	1
Bin	(20)(13)	1	0	3266	1
Bin	(20)(12)	0	1	345	1
Bin	(20)(12)	1	0	3227	1
Bin	(20)(11)	0	1	396	1
Bin	(20)(11)	1	0	3349	1
Bin	(20)(10)	0	1	410	1
Bin	(20)(10)	1	0	3366	1
Bin	(20)(9)	0	1	554	1
Bin	(20)(9)	1	0	3586	1
Bin	(20)(8)	0	1	368	1
Bin	(20)(8)	1	0	3464	1
Bin	(20)(7)	0	1	349	1
Bin	(20)(7)	1	0	3377	1
Bin	(20)(6)	0	1	206	1
Bin	(20)(6)	1	0	3213	1
Bin	(20)(5)	0	1	328	1
Bin	(20)(5)	1	0	3276	1
Bin	(20)(4)	0	1	328	1
Bin	(20)(4)	1	0	3276	1
Bin	(20)(3)	0	1	328	1
Bin	(20)(3)	1	0	3276	1
Bin	(20)(2)	0	1	504	1
Bin	(20)(2)	1	0	3458	1
Bin	(20)(1)	0	1	487	1
Bin	(20)(1)	1	0	3400	1
Bin	(20)(0)	0	1	421	1
Bin	(20)(0)	1	0	3373	1

Signal:

INT_READ_DATA

	Element	From	To	Count	Threshold
Bin	(31)	0	1	899	1
Bin	(31)	1	0	1519	1
Bin	(30)	0	1	994	1
Bin	(30)	1	0	1614	1
Bin	(29)	0	1	859	1
Bin	(29)	1	0	1479	1
Bin	(28)	0	1	2949	1
Bin	(28)	1	0	3569	1
Bin	(27)	0	1	3212	1
Bin	(27)	1	0	3832	1
Bin	(26)	0	1	2720	1
Bin	(26)	1	0	3340	1
Bin	(25)	0	1	3115	1
Bin	(25)	1	0	3734	1
Bin	(24)	0	1	3123	1
Bin	(24)	1	0	3743	1
Bin	(23)	0	1	3322	1
Bin	(23)	1	0	3942	1
Bin	(22)	0	1	3211	1
Bin	(22)	1	0	3831	1
Bin	(21)	0	1	3537	1
Bin	(21)	1	0	4157	1
Bin	(20)	0	1	3391	1
Bin	(20)	1	0	4011	1
Bin	(19)	0	1	3561	1
Bin	(19)	1	0	4181	1
Bin	(18)	0	1	3217	1
Bin	(18)	1	0	3837	1
Bin	(17)	0	1	2029	1
Bin	(17)	1	0	2649	1
Bin	(16)	0	1	2118	1
Bin	(16)	1	0	2738	1
Bin	(15)	0	1	2268	1
Bin	(15)	1	0	2888	1
Bin	(14)	0	1	2638	1
Bin	(14)	1	0	3258	1
Bin	(13)	0	1	2447	1
Bin	(13)	1	0	3067	1
Bin	(12)	0	1	1869	1
Bin	(12)	1	0	2489	1
Bin	(11)	0	1	1800	1
Bin	(11)	1	0	2420	1
Bin	(10)	0	1	2802	1
Bin	(10)	1	0	3422	1
Bin	(9)	0	1	2729	1
Bin	(9)	1	0	3349	1
Bin	(8)	0	1	2372	1
Bin	(8)	1	0	2992	1
Bin	(7)	0	1	3685	1
Bin	(7)	1	0	4305	1
Bin	(6)	0	1	3491	1
Bin	(6)	1	0	4111	1
Bin	(5)	0	1	3529	1
Bin	(5)	1	0	4149	1
Bin	(4)	0	1	2722	1
Bin	(4)	1	0	3342	1
Bin	(3)	0	1	2562	1
Bin	(3)	1	0	3182	1
Bin	(2)	0	1	2611	1
Bin	(2)	1	0	3231	1
Bin	(1)	0	1	2640	1
Bin	(1)	1	0	3260	1
Bin	(0)	0	1	3143	1
Bin	(0)	1	0	3763	1

Signal:

BYTE_WE

	Element	From	To	Count	Threshold
Bin	(3)	0	1	45991	1
Bin	(3)	1	0	46651	1
Bin	(2)	0	1	45991	1
Bin	(2)	1	0	46651	1
Bin	(1)	0	1	45991	1
Bin	(1)	1	0	46651	1
Bin	(0)	0	1	45991	1
Bin	(0)	1	0	46651	1

NVC code coverage report

Hierarchy

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.TXT_BUF_COMP_GEN(3).TXT_BUF_ODD_GEN.TXT_BUFFER_ODD_INST.TXT_BUFFER_RAM_INST.DP_INF_RAM_BE_INST

File: /__w/ctu-can-regression/ctu-can-regression/src/txt_buffer/txt_buffer_ram.vhd

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.

Uncovered statements:

Excluded statements:

Covered statements:

Signal assignment statement on line 191:

Uncovered branches:

Excluded branches:

Covered branches:

Uncovered toggles:

Excluded toggles:

Port:

Port:

Port:

Port:

Port:

Port:

Port:

Covered toggles:

Port:

Signal:

Signal:

Signal:

Uncovered expressions:

Excluded expressions:

Covered expressions:

Uncovered FSM states:

Excluded FSM states:

Covered FSM states:

Uncovered functional coverage:

Excluded functional coverage:

Covered functional coverage: