NVC code coverage report

Hierarchy

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.TX_ARBITRATOR_INST.PRIORITY_DECODER_INST

File:  /__w/ctu-can-regression/ctu-can-regression/src/tx_arbitrator/tx_arbitrator.vhd

Nested Instances Statement Branch Toggle Expression FSM state Functional Average
L0_GEN(0) 100.0 % (2/2) N.A. N.A. N.A. N.A. N.A. 100.0 % (2/2)
L0_GEN(1) 100.0 % (2/2) N.A. N.A. N.A. N.A. N.A. 100.0 % (2/2)
L0_GEN(2) 100.0 % (2/2) N.A. N.A. N.A. N.A. N.A. 100.0 % (2/2)
L0_GEN(3) 100.0 % (2/2) N.A. N.A. N.A. N.A. N.A. 100.0 % (2/2)
L0_GEN(4) 100.0 % (2/2) N.A. N.A. N.A. N.A. N.A. 100.0 % (2/2)
L0_GEN(5) 100.0 % (2/2) N.A. N.A. N.A. N.A. N.A. 100.0 % (2/2)
L0_GEN(6) 100.0 % (2/2) N.A. N.A. N.A. N.A. N.A. 100.0 % (2/2)
L0_GEN(7) 100.0 % (2/2) N.A. N.A. N.A. N.A. N.A. 100.0 % (2/2)
FILL_ZEROES_GEN 100.0 % (2/2) N.A. N.A. N.A. N.A. N.A. 100.0 % (2/2)

Current Instance Statement Branch Toggle Expression FSM state Functional Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.TX_ARBITRATOR_INST.PRIORITY_DECODER_INST 100.0 % (64/64) 100.0 % (36/36) 100.0 % (194/194) 100.0 % (19/19) N.A. N.A. 100.0 % (313/313)

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.


Statement Branch Toggle Expression FSM state Functional

Uncovered statements:

Excluded statements:

Covered statements:

Variable assignment statement on line 202:

202:        tmp := (others => (others => '0')); 
Count: 59706
Threshold: 1

Loop statement on lines 203 to 232:

203:        for i in 0 to 3 loop 
204:            tmp(i) := l0_valid(2 * i + 1 downto 2 * i); 
...
231:            end case; 
232:        end loop; 

Count: 59706
Threshold: 1

Variable assignment statement on line 204:

204:            tmp(i) := l0_valid(2 * i + 1 downto 2 * i); 
Count: 238824
Threshold: 1

Sequential statement on lines 205 to 231:

205:            case tmp(i) is 
206:            when "01" => 
...
230: 
231:            end case; 

Count: 238824
Threshold: 1

Signal assignment statement on line 207:

207:                l1_prio(i)      <= l0_prio(2 * i); 
Count: 15945
Threshold: 1

Signal assignment statement on line 208:

208:                l1_valid(i)     <= '1'; 
Count: 15945
Threshold: 1

Signal assignment statement on line 209:

209:                l1_winner(i)    <= LOWER_TREE; 
Count: 15945
Threshold: 1

Signal assignment statement on line 212:

212:                l1_prio(i)      <= l0_prio(2 * i + 1); 
Count: 10302
Threshold: 1

Signal assignment statement on line 213:

213:                l1_valid(i)     <= '1'; 
Count: 10302
Threshold: 1

Signal assignment statement on line 214:

214:                l1_winner(i)    <= UPPER_TREE; 
Count: 10302
Threshold: 1

If statement on lines 217 to 223:

217:                if (unsigned(l0_prio(2 * i + 1)) > unsigned(l0_prio(2 * i))) then 
218:                    l1_prio(i)    <= l0_prio(2 * i + 1); 
...
222:                    l1_winner(i)  <= LOWER_TREE; 
223:                end if; 

Count: 1195
Threshold: 1

Signal assignment statement on line 218:

218:                    l1_prio(i)    <= l0_prio(2 * i + 1); 
Count: 176
Threshold: 1

Signal assignment statement on line 219:

219:                    l1_winner(i)  <= UPPER_TREE; 
Count: 176
Threshold: 1

Signal assignment statement on line 221:

221:                    l1_prio(i)    <= l0_prio(2 * i); 
Count: 1019
Threshold: 1

Signal assignment statement on line 222:

222:                    l1_winner(i)  <= LOWER_TREE; 
Count: 1019
Threshold: 1

Signal assignment statement on line 224:

224:                l1_valid(i)     <= '1'; 
Count: 1195
Threshold: 1

Signal assignment statement on line 227:

227:                l1_valid(i)     <= '0'; 
Count: 211382
Threshold: 1

Signal assignment statement on line 228:

228:                l1_prio(i)      <= l0_prio(2 * i + 1); 
Count: 211382
Threshold: 1

Signal assignment statement on line 229:

229:                l1_winner(i)    <= UPPER_TREE; 
Count: 211382
Threshold: 1

Variable assignment statement on line 242:

242:        tmp := (others => (others => '0')); 
Count: 58824
Threshold: 1

Loop statement on lines 243 to 273:

243:        for i in 0 to 1 loop 
244:            tmp(i) := l1_valid(2 * i + 1 downto 2 * i); 
...
272:            end case; 
273:        end loop; 

Count: 58824
Threshold: 1

Variable assignment statement on line 244:

244:            tmp(i) := l1_valid(2 * i + 1 downto 2 * i); 
Count: 117648
Threshold: 1

Sequential statement on lines 246 to 272:

246:            case tmp(i) is 
247:            when "01" => 
...
271: 
272:            end case; 

Count: 117648
Threshold: 1

Signal assignment statement on line 248:

248:                l2_prio(i)      <= l1_prio(2 * i); 
Count: 23838
Threshold: 1

Signal assignment statement on line 249:

249:                l2_valid(i)     <= '1'; 
Count: 23838
Threshold: 1

Signal assignment statement on line 250:

250:                l2_winner(i)    <= LOWER_TREE; 
Count: 23838
Threshold: 1

Signal assignment statement on line 253:

253:                l2_prio(i)      <= l1_prio(2 * i + 1); 
Count: 2344
Threshold: 1

Signal assignment statement on line 254:

254:                l2_valid(i)     <= '1'; 
Count: 2344
Threshold: 1

Signal assignment statement on line 255:

255:                l2_winner(i)    <= UPPER_TREE; 
Count: 2344
Threshold: 1

If statement on lines 258 to 264:

258:                if (unsigned(l1_prio(2 * i + 1)) > unsigned(l1_prio(2 * i))) then 
259:                    l2_prio(i)    <= l1_prio(2 * i + 1); 
...
263:                    l2_winner(i)  <= LOWER_TREE; 
264:                end if; 

Count: 303
Threshold: 1

Signal assignment statement on line 259:

259:                    l2_prio(i)    <= l1_prio(2 * i + 1); 
Count: 108
Threshold: 1

Signal assignment statement on line 260:

260:                    l2_winner(i)  <= UPPER_TREE; 
Count: 108
Threshold: 1

Signal assignment statement on line 262:

262:                    l2_prio(i)    <= l1_prio(2 * i); 
Count: 195
Threshold: 1

Signal assignment statement on line 263:

263:                    l2_winner(i)  <= LOWER_TREE; 
Count: 195
Threshold: 1

Signal assignment statement on line 265:

265:                l2_valid(i)     <= '1'; 
Count: 303
Threshold: 1

Signal assignment statement on line 268:

268:                l2_valid(i)     <= '0'; 
Count: 91163
Threshold: 1

Signal assignment statement on line 269:

269:                l2_prio(i)      <= l1_prio(2 * i + 1); 
Count: 91163
Threshold: 1

Signal assignment statement on line 270:

270:                l2_winner(i)    <= UPPER_TREE; 
Count: 91163
Threshold: 1

If statement on lines 285 to 287:

285:    l3_valid  <= '0' when l2_valid(1 downto 0) = "00" 
286:                     else 
287:                '1'; 

Count: 54006
Threshold: 1

Signal assignment statement on line 285:

285:    l3_valid  <= '0' when l2_valid(1 downto 0) = "00" 
Count: 26988
Threshold: 1

Signal assignment statement on line 287:

287:                '1'
Count: 27018
Threshold: 1

If statement on line 288:

288:    output_valid <= '1' when l3_valid = '1' else '0'; 
Count: 55577
Threshold: 1

Signal assignment statement on line 288:

288:    output_valid <= '1' when l3_valid = '1' else '0'; 
Count: 26988
Threshold: 1

Signal assignment statement on line 288:

288:    output_valid <= '1' when l3_valid = '1' else '0'
Count: 28589
Threshold: 1

If statement on lines 291 to 296:

291:    l3_winner  <= LOWER_TREE when l2_valid(1 downto 0) = "01" else 
292:                  UPPER_TREE when l2_valid(1 downto 0) = "10" else 
293:                  UPPER_TREE when (l2_valid(1 downto 0) = "11" and 
294:                                 unsigned(l2_prio(1)) > unsigned(l2_prio(0))) 
295:                             else 
296:                  LOWER_TREE; 

Count: 57387
Threshold: 1

Signal assignment statement on line 291:

291:    l3_winner  <= LOWER_TREE when l2_valid(1 downto 0) = "01" else 
Count: 25316
Threshold: 1

Signal assignment statement on line 292:

292:                  UPPER_TREE when l2_valid(1 downto 0) = "10" else 
Count: 914
Threshold: 1

Signal assignment statement on line 293:

293:                  UPPER_TREE when (l2_valid(1 downto 0) = "11" and 
Count: 39
Threshold: 1

Signal assignment statement on line 296:

296:                  LOWER_TREE
Count: 31118
Threshold: 1

If statement on lines 310 to 338:

310:        if (l3_winner = LOWER_TREE) then 
311:            if (l2_winner(0) = LOWER_TREE) then 
...
337:            end if; 
338:        end if; 

Count: 84098
Threshold: 1

If statement on lines 311 to 323:

311:            if (l2_winner(0) = LOWER_TREE) then 
312:                if (l1_winner(0) = LOWER_TREE) then 
...
322:                end if; 
323:            end if; 

Count: 80516
Threshold: 1

If statement on lines 312 to 316:

312:                if (l1_winner(0) = LOWER_TREE) then 
313:                    output_index <= 0; 
314:                else 
315:                    output_index <= 1; 
316:                end if; 

Count: 37772
Threshold: 1

Signal assignment statement on line 313:

313:                    output_index <= 0; 
Count: 14819
Threshold: 1

Signal assignment statement on line 315:

315:                    output_index <= 1; 
Count: 22953
Threshold: 1

If statement on lines 318 to 322:

318:                if (l1_winner(1) = LOWER_TREE) then 
319:                    output_index <= 2 mod G_TXT_BUFFER_COUNT; 
320:                else 
321:                    output_index <= 3 mod G_TXT_BUFFER_COUNT; 
322:                end if; 

Count: 42744
Threshold: 1

Signal assignment statement on line 319:

319:                    output_index <= 2 mod G_TXT_BUFFER_COUNT; 
Count: 1082
Threshold: 1

Signal assignment statement on line 321:

321:                    output_index <= 3 mod G_TXT_BUFFER_COUNT; 
Count: 41662
Threshold: 1

If statement on lines 325 to 337:

325:            if (l2_winner(1) = LOWER_TREE) then 
326:                if (l1_winner(2) = LOWER_TREE) then 
...
336:                end if; 
337:            end if; 

Count: 3582
Threshold: 1

If statement on lines 326 to 330:

326:                if (l1_winner(2) = LOWER_TREE) then 
327:                    output_index <= 4 mod G_TXT_BUFFER_COUNT; 
328:                else 
329:                    output_index <= 5 mod G_TXT_BUFFER_COUNT; 
330:                end if; 

Count: 795
Threshold: 1

Signal assignment statement on line 327:

327:                    output_index <= 4 mod G_TXT_BUFFER_COUNT; 
Count: 282
Threshold: 1

Signal assignment statement on line 329:

329:                    output_index <= 5 mod G_TXT_BUFFER_COUNT; 
Count: 513
Threshold: 1

If statement on lines 332 to 336:

332:                if (l1_winner(3) = LOWER_TREE) then 
333:                    output_index <= 6 mod G_TXT_BUFFER_COUNT; 
334:                else 
335:                    output_index <= 7 mod G_TXT_BUFFER_COUNT; 
336:                end if; 

Count: 2787
Threshold: 1

Signal assignment statement on line 333:

333:                    output_index <= 6 mod G_TXT_BUFFER_COUNT; 
Count: 250
Threshold: 1

Signal assignment statement on line 335:

335:                    output_index <= 7 mod G_TXT_BUFFER_COUNT; 
Count: 2537
Threshold: 1

Uncovered branches:

Excluded branches:

Covered branches:

"case" / "with" / "select" choice on line 206:

206:            when "01" => 
Choice ofCountThreshold
Bin"01"159451

"case" / "with" / "select" choice on line 211:

211:            when "10" => 
Choice ofCountThreshold
Bin"10"103021

"case" / "with" / "select" choice on line 216:

216:            when "11" => 
Choice ofCountThreshold
Bin"11"11951

"if" / "when" / "else" condition on line 217:

217:                if (unsigned(l0_prio(2 * i + 1)) > unsigned(l0_prio(2 * i))) then 
Evaluated toCountThreshold
BinTrue1761
BinFalse10191

"case" / "with" / "select" choice on line 226:

226:            when others => 
Choice ofCountThreshold
Binothers2113821

"case" / "with" / "select" choice on line 247:

247:            when "01" => 
Choice ofCountThreshold
Bin"01"238381

"case" / "with" / "select" choice on line 252:

252:            when "10" => 
Choice ofCountThreshold
Bin"10"23441

"case" / "with" / "select" choice on line 257:

257:            when "11" => 
Choice ofCountThreshold
Bin"11"3031

"if" / "when" / "else" condition on line 258:

258:                if (unsigned(l1_prio(2 * i + 1)) > unsigned(l1_prio(2 * i))) then 
Evaluated toCountThreshold
BinTrue1081
BinFalse1951

"case" / "with" / "select" choice on line 267:

267:            when others => 
Choice ofCountThreshold
Binothers911631

"if" / "when" / "else" condition on line 285:

285:    l3_valid  <= '0' when l2_valid(1 downto 0) = "00" 
Evaluated toCountThreshold
BinTrue269881
BinFalse270181

"if" / "when" / "else" condition on line 288:

288:    output_valid <= '1' when l3_valid = '1' else '0'; 
Evaluated toCountThreshold
BinTrue269881
BinFalse285891

"if" / "when" / "else" condition on line 291:

291:    l3_winner  <= LOWER_TREE when l2_valid(1 downto 0) = "01" else 
Evaluated toCountThreshold
BinTrue253161
BinFalse320711

"if" / "when" / "else" condition on line 292:

292:                  UPPER_TREE when l2_valid(1 downto 0) = "10" else 
Evaluated toCountThreshold
BinTrue9141
BinFalse311571

"if" / "when" / "else" condition on lines 293 to 294:

293:                  UPPER_TREE when (l2_valid(1 downto 0) = "11" and 
294:                                 unsigned(l2_prio(1)) > unsigned(l2_prio(0))) 

Evaluated toCountThreshold
BinTrue391
BinFalse311181

"if" / "when" / "else" condition on line 310:

310:        if (l3_winner = LOWER_TREE) then 
Evaluated toCountThreshold
BinTrue805161
BinFalse35821

"if" / "when" / "else" condition on line 311:

311:            if (l2_winner(0) = LOWER_TREE) then 
Evaluated toCountThreshold
BinTrue377721
BinFalse427441

"if" / "when" / "else" condition on line 312:

312:                if (l1_winner(0) = LOWER_TREE) then 
Evaluated toCountThreshold
BinTrue148191
BinFalse229531

"if" / "when" / "else" condition on line 318:

318:                if (l1_winner(1) = LOWER_TREE) then 
Evaluated toCountThreshold
BinTrue10821
BinFalse416621

"if" / "when" / "else" condition on line 325:

325:            if (l2_winner(1) = LOWER_TREE) then 
Evaluated toCountThreshold
BinTrue7951
BinFalse27871

"if" / "when" / "else" condition on line 326:

326:                if (l1_winner(2) = LOWER_TREE) then 
Evaluated toCountThreshold
BinTrue2821
BinFalse5131

"if" / "when" / "else" condition on line 332:

332:                if (l1_winner(3) = LOWER_TREE) then 
Evaluated toCountThreshold
BinTrue2501
BinFalse25371

Uncovered toggles:

Excluded toggles:

Port:

 PRIO
ElementFromToCountThresholdExcluded due to
Bin(7)(2)0101Exclude file
Bin(7)(2)1001Exclude file
Bin(7)(1)0101Exclude file
Bin(7)(1)1001Exclude file
Bin(7)(0)0101Exclude file
Bin(7)(0)1001Exclude file
Bin(6)(2)0101Exclude file
Bin(6)(2)1001Exclude file
Bin(6)(1)0101Exclude file
Bin(6)(1)1001Exclude file
Bin(6)(0)0101Exclude file
Bin(6)(0)1001Exclude file
Bin(5)(2)0101Exclude file
Bin(5)(2)1001Exclude file
Bin(5)(1)0101Exclude file
Bin(5)(1)1001Exclude file
Bin(5)(0)0101Exclude file
Bin(5)(0)1001Exclude file
Bin(4)(2)0101Exclude file
Bin(4)(2)1001Exclude file
Bin(4)(1)0101Exclude file
Bin(4)(1)1001Exclude file
Bin(4)(0)0101Exclude file
Bin(4)(0)1001Exclude file
Bin(3)(2)0101Exclude file
Bin(3)(2)1001Exclude file
Bin(3)(1)0101Exclude file
Bin(3)(1)1001Exclude file
Bin(3)(0)0101Exclude file
Bin(3)(0)1001Exclude file
Bin(2)(2)0101Exclude file
Bin(2)(2)1001Exclude file
Bin(2)(1)0101Exclude file
Bin(2)(1)1001Exclude file
Bin(2)(0)0101Exclude file
Bin(2)(0)1001Exclude file
Bin(1)(2)0101Exclude file
Bin(1)(2)1001Exclude file
Bin(1)(1)0101Exclude file
Bin(1)(1)1001Exclude file
Bin(1)(0)0101Exclude file
Bin(1)(0)1001Exclude file
Bin(0)(2)0101Exclude file
Bin(0)(2)1001Exclude file
Bin(0)(1)0101Exclude file
Bin(0)(1)1001Exclude file
Bin(0)(0)0101Exclude file
Bin(0)(0)1001Exclude file

Port:

 PRIO_VALID
ElementFromToCountThresholdExcluded due to
Bin(7)0101Exclude file
Bin(7)1001Exclude file
Bin(6)0101Exclude file
Bin(6)1001Exclude file
Bin(5)0101Exclude file
Bin(5)1001Exclude file
Bin(4)0101Exclude file
Bin(4)1001Exclude file
Bin(3)0101Exclude file
Bin(3)1001Exclude file
Bin(2)0101Exclude file
Bin(2)1001Exclude file
Bin(1)0101Exclude file
Bin(1)1001Exclude file
Bin(0)0101Exclude file
Bin(0)1001Exclude file

Covered toggles:

Port:

 OUTPUT_VALID
FromToCountThreshold
Bin01269881
Bin10285891

Signal:

 L0_PRIO
ElementFromToCountThreshold
Bin(7)(2)01651
Bin(7)(2)1038861
Bin(7)(1)01711
Bin(7)(1)1039481
Bin(7)(0)01731
Bin(7)(0)1039431
Bin(6)(2)01651
Bin(6)(2)1038891
Bin(6)(1)01781
Bin(6)(1)1038901
Bin(6)(0)01831
Bin(6)(0)1039081
Bin(5)(2)01931
Bin(5)(2)1039291
Bin(5)(1)01731
Bin(5)(1)1039161
Bin(5)(0)01991
Bin(5)(0)1039251
Bin(4)(2)01671
Bin(4)(2)1038511
Bin(4)(1)01991
Bin(4)(1)1038941
Bin(4)(0)011001
Bin(4)(0)1038661
Bin(3)(2)011511
Bin(3)(2)1029731
Bin(3)(1)011631
Bin(3)(1)1030411
Bin(3)(0)012271
Bin(3)(0)1030511
Bin(2)(2)011711
Bin(2)(2)1029331
Bin(2)(1)012421
Bin(2)(1)1030521
Bin(2)(0)012751
Bin(2)(0)1029701
Bin(1)(2)012551
Bin(1)(2)1018241
Bin(1)(1)013151
Bin(1)(1)1019321
Bin(1)(0)013371
Bin(1)(0)1019001
Bin(0)(2)013231
Bin(0)(2)1018671
Bin(0)(1)013021
Bin(0)(1)1019751
Bin(0)(0)0119981
Bin(0)(0)103501

Signal:

 L0_VALID
ElementFromToCountThreshold
Bin(7)013141
Bin(7)10550951
Bin(6)013221
Bin(6)10550871
Bin(5)013311
Bin(5)10550781
Bin(4)013331
Bin(4)10550761
Bin(3)0112911
Bin(3)10536231
Bin(2)0111651
Bin(2)10537491
Bin(1)0195181
Bin(1)10444551
Bin(0)01152771
Bin(0)10386961

Signal:

 L1_PRIO
ElementFromToCountThreshold
Bin(3)(2)01921
Bin(3)(2)10330491
Bin(3)(1)01881
Bin(3)(1)10330381
Bin(3)(0)011141
Bin(3)(0)10331001
Bin(2)(2)011071
Bin(2)(2)10330471
Bin(2)(1)01951
Bin(2)(1)10330261
Bin(2)(0)011341
Bin(2)(0)10330871
Bin(1)(2)012041
Bin(1)(2)10319181
Bin(1)(1)012601
Bin(1)(1)10320941
Bin(1)(0)013081
Bin(1)(0)10320241
Bin(0)(2)015481
Bin(0)(2)1020971
Bin(0)(1)017441
Bin(0)(1)1022841
Bin(0)(0)01146761
Bin(0)(0)10162351

Signal:

 L1_VALID
ElementFromToCountThreshold
Bin(3)014741
Bin(3)10520541
Bin(2)015301
Bin(2)10519981
Bin(1)0119961
Bin(1)10505321
Bin(0)01227431
Bin(0)10297851

Signal:

 L1_WINNER
ElementFromToCountThreshold
Bin(3)01339281
Bin(3)102831
Bin(2)01339011
Bin(2)103101
Bin(1)01331031
Bin(1)1011081
Bin(0)01193481
Bin(0)10148631

Signal:

 L2_PRIO
ElementFromToCountThreshold
Bin(1)(2)01841
Bin(1)(2)10325821
Bin(1)(1)011111
Bin(1)(1)10325901
Bin(1)(0)011011
Bin(1)(0)10326111
Bin(0)(2)015051
Bin(0)(2)1021001
Bin(0)(1)018071
Bin(0)(1)1024221
Bin(0)(0)01149881
Bin(0)(0)10165641

Signal:

 L2_VALID
ElementFromToCountThreshold
Bin(1)019411
Bin(1)10514641
Bin(0)01245071
Bin(0)10278981

Signal:

 L2_WINNER
ElementFromToCountThreshold
Bin(1)01474861
Bin(1)105371
Bin(0)01253051
Bin(0)10227181

Signal:

 L3_VALID
FromToCountThreshold
Bin01269881
Bin10269881

Signal:

 L3_WINNER
FromToCountThreshold
Bin019401
Bin1025411

Uncovered expressions:

Excluded expressions:

"and" expression on lines 293 to 294:

 l2_valid(1 downto 0) = "11" and unsigned(l2_prio(1)) > unsigned(l2_prio(0)) 
 <-----------LHS----------->     <-------------------RHS-------------------> 

LHSRHSCountThresholdExcluded due to
BinFalseTrue01Unreachable

Covered expressions:

"=" expression on line 288:

 l3_valid = '1' 
Evaluated toCountThreshold
BinFalse285891
BinTrue269881

"and" expression on lines 293 to 294:

 l2_valid(1 downto 0) = "11" and unsigned(l2_prio(1)) > unsigned(l2_prio(0)) 
 <-----------LHS----------->     <-------------------RHS-------------------> 

LHSRHSCountThreshold
BinTrueFalse541
BinTrueTrue391

"=" expression on line 310:

 l3_winner = LOWER_TREE 
Evaluated toCountThreshold
BinFalse35821
BinTrue805161

"=" expression on line 311:

 l2_winner(0) = LOWER_TREE 
Evaluated toCountThreshold
BinFalse427441
BinTrue377721

"=" expression on line 312:

 l1_winner(0) = LOWER_TREE 
Evaluated toCountThreshold
BinFalse229531
BinTrue148191

"=" expression on line 318:

 l1_winner(1) = LOWER_TREE 
Evaluated toCountThreshold
BinFalse416621
BinTrue10821

"=" expression on line 325:

 l2_winner(1) = LOWER_TREE 
Evaluated toCountThreshold
BinFalse27871
BinTrue7951

"=" expression on line 326:

 l1_winner(2) = LOWER_TREE 
Evaluated toCountThreshold
BinFalse5131
BinTrue2821

"=" expression on line 332:

 l1_winner(3) = LOWER_TREE 
Evaluated toCountThreshold
BinFalse25371
BinTrue2501

Uncovered FSM states:

Excluded FSM states:

Covered FSM states:

Uncovered functional coverage:

Excluded functional coverage:

Covered functional coverage: