NVC code coverage report

Current Instance	Statement	Branch	Toggle	Expression	FSM state	Functional	Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.RST_SYNC_INST	100.0 % (5/5)	100.0 % (4/4)	100.0 % (8/8)	100.0 % (2/2)	N.A.	N.A.	100.0 % (19/19)

Current Instance

Statement

Branch

Toggle

Expression

FSM state

Functional

Average

CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.RST_SYNC_INST

100.0 % (5/5)

100.0 % (4/4)

100.0 % (8/8)

100.0 % (2/2)

N.A.

100.0 % (19/19)

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.

Statement

Branch

Toggle

Expression

FSM state

Functional

Uncovered statements:

Excluded statements:

Covered statements:

If statement on lines 104 to 110:

104:        if (arst = G_RESET_POLARITY) then 
105:            rff <= G_RESET_POLARITY; 
...
109:            rst <= rff; 
110:        end if;

Count: 1090018003
Threshold: 1

Signal assignment statement on line 105:

105: rff <= G_RESET_POLARITY;
Count: 22317
Threshold: 1

Signal assignment statement on line 106:

106: rst <= G_RESET_POLARITY;
Count: 22317
Threshold: 1

Signal assignment statement on line 108:

108: rff <= not (G_RESET_POLARITY);
Count: 544991935
Threshold: 1

Signal assignment statement on line 109:

109: rst <= rff;
Count: 544991935
Threshold: 1

Uncovered branches:

Excluded branches:

Covered branches:

"if" / "when" / "else" condition on line 104:

104: if (arst = G_RESET_POLARITY) then

	Evaluated to	Count	Threshold
Bin	True	22317	1
Bin	False	1089995686	1

"if" / "when" / "else" condition on line 107:

107: elsif (rising_edge(clk)) then

	Evaluated to	Count	Threshold
Bin	True	544991935	1
Bin	False	545003751	1

Uncovered toggles:

Excluded toggles:

Port:

CLK

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

Port:

ARST

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

Covered toggles:

Port:

RST

	From	To	Count	Threshold
Bin	0	1	7176	1
Bin	1	0	7176	1

Signal:

RFF

	From	To	Count	Threshold
Bin	0	1	8777	1
Bin	1	0	7176	1

Uncovered expressions:

Excluded expressions:

Covered expressions:

"=" expression on line 104:

arst = G_RESET_POLARITY

	Evaluated to	Count	Threshold
Bin	False	1089995686	1
Bin	True	22317	1

NVC code coverage report

Hierarchy

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.RST_SYNC_INST

File: /__w/ctu-can-regression/ctu-can-regression/src/can_top_level.vhd

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.

Uncovered statements:

Excluded statements:

Covered statements:

If statement on lines 104 to 110:

Signal assignment statement on line 105:

Signal assignment statement on line 106:

Signal assignment statement on line 108:

Signal assignment statement on line 109:

Uncovered branches:

Excluded branches:

Covered branches:

"if" / "when" / "else" condition on line 104:

"if" / "when" / "else" condition on line 107:

Uncovered toggles:

Excluded toggles:

Port:

Port:

Covered toggles:

Port:

Signal:

Uncovered expressions:

Excluded expressions:

Covered expressions:

"=" expression on line 104:

Uncovered FSM states:

Excluded FSM states:

Covered FSM states:

Uncovered functional coverage:

Excluded functional coverage:

Covered functional coverage: