NVC code coverage report

File: /__w/ctu-can-regression/ctu-can-regression/src/frame_filters/frame_filters.vhd

Nested Instances	Statement	Branch	Toggle	Expression	FSM state	Functional	Average
GEN_FILT_POS	100.0 % (3/3)	100.0 % (2/2)	N.A.	100.0 % (5/5)	N.A.	N.A.	100.0 % (10/10)
GEN_FILT_NEG	100.0 % (1/1)	N.A.	N.A.	N.A.	N.A.	N.A.	100.0 % (1/1)

Nested Instances

Statement

Branch

Toggle

Expression

FSM state

Functional

Average

GEN_FILT_POS

100.0 % (3/3)

100.0 % (2/2)

N.A.

100.0 % (5/5)

N.A.

100.0 % (10/10)

GEN_FILT_NEG

100.0 % (1/1)

N.A.

100.0 % (1/1)

Current Instance	Statement	Branch	Toggle	Expression	FSM state	Functional	Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.FRAME_FILTERS_INST.BIT_FILTER_A_INST	100.0 % (2/2)	N.A.	100.0 % (294/294)	N.A.	N.A.	N.A.	100.0 % (296/296)

Current Instance

Statement

Branch

Toggle

Expression

FSM state

Functional

Average

CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.FRAME_FILTERS_INST.BIT_FILTER_A_INST

100.0 % (2/2)

N.A.

100.0 % (294/294)

N.A.

100.0 % (296/296)

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.

Statement

Branch

Toggle

Expression

FSM state

Functional

Uncovered statements:

Excluded statements:

Covered statements:

Signal assignment statement on line 121:

121: masked_input <= filter_input and filter_mask;
Count: 116384
Threshold: 1

Signal assignment statement on line 122:

122: masked_value <= filter_value and filter_mask;
Count: 8297
Threshold: 1

Uncovered branches:

Excluded branches:

Covered branches:

Uncovered toggles:

Excluded toggles:

Port:

FILTER_MASK

	Element	From	To	Threshold	Excluded due to
Bin	(28)	0	1	1	Exclude file
Bin	(28)	1	0	1	Exclude file
Bin	(27)	0	1	1	Exclude file
Bin	(27)	1	0	1	Exclude file
Bin	(26)	0	1	1	Exclude file
Bin	(26)	1	0	1	Exclude file
Bin	(25)	0	1	1	Exclude file
Bin	(25)	1	0	1	Exclude file
Bin	(24)	0	1	1	Exclude file
Bin	(24)	1	0	1	Exclude file
Bin	(23)	0	1	1	Exclude file
Bin	(23)	1	0	1	Exclude file
Bin	(22)	0	1	1	Exclude file
Bin	(22)	1	0	1	Exclude file
Bin	(21)	0	1	1	Exclude file
Bin	(21)	1	0	1	Exclude file
Bin	(20)	0	1	1	Exclude file
Bin	(20)	1	0	1	Exclude file
Bin	(19)	0	1	1	Exclude file
Bin	(19)	1	0	1	Exclude file
Bin	(18)	0	1	1	Exclude file
Bin	(18)	1	0	1	Exclude file
Bin	(17)	0	1	1	Exclude file
Bin	(17)	1	0	1	Exclude file
Bin	(16)	0	1	1	Exclude file
Bin	(16)	1	0	1	Exclude file
Bin	(15)	0	1	1	Exclude file
Bin	(15)	1	0	1	Exclude file
Bin	(14)	0	1	1	Exclude file
Bin	(14)	1	0	1	Exclude file
Bin	(13)	0	1	1	Exclude file
Bin	(13)	1	0	1	Exclude file
Bin	(12)	0	1	1	Exclude file
Bin	(12)	1	0	1	Exclude file
Bin	(11)	0	1	1	Exclude file
Bin	(11)	1	0	1	Exclude file
Bin	(10)	0	1	1	Exclude file
Bin	(10)	1	0	1	Exclude file
Bin	(9)	0	1	1	Exclude file
Bin	(9)	1	0	1	Exclude file
Bin	(8)	0	1	1	Exclude file
Bin	(8)	1	0	1	Exclude file
Bin	(7)	0	1	1	Exclude file
Bin	(7)	1	0	1	Exclude file
Bin	(6)	0	1	1	Exclude file
Bin	(6)	1	0	1	Exclude file
Bin	(5)	0	1	1	Exclude file
Bin	(5)	1	0	1	Exclude file
Bin	(4)	0	1	1	Exclude file
Bin	(4)	1	0	1	Exclude file
Bin	(3)	0	1	1	Exclude file
Bin	(3)	1	0	1	Exclude file
Bin	(2)	0	1	1	Exclude file
Bin	(2)	1	0	1	Exclude file
Bin	(1)	0	1	1	Exclude file
Bin	(1)	1	0	1	Exclude file
Bin	(0)	0	1	1	Exclude file
Bin	(0)	1	0	1	Exclude file

Port:

FILTER_VALUE

	Element	From	To	Threshold	Excluded due to
Bin	(28)	0	1	1	Exclude file
Bin	(28)	1	0	1	Exclude file
Bin	(27)	0	1	1	Exclude file
Bin	(27)	1	0	1	Exclude file
Bin	(26)	0	1	1	Exclude file
Bin	(26)	1	0	1	Exclude file
Bin	(25)	0	1	1	Exclude file
Bin	(25)	1	0	1	Exclude file
Bin	(24)	0	1	1	Exclude file
Bin	(24)	1	0	1	Exclude file
Bin	(23)	0	1	1	Exclude file
Bin	(23)	1	0	1	Exclude file
Bin	(22)	0	1	1	Exclude file
Bin	(22)	1	0	1	Exclude file
Bin	(21)	0	1	1	Exclude file
Bin	(21)	1	0	1	Exclude file
Bin	(20)	0	1	1	Exclude file
Bin	(20)	1	0	1	Exclude file
Bin	(19)	0	1	1	Exclude file
Bin	(19)	1	0	1	Exclude file
Bin	(18)	0	1	1	Exclude file
Bin	(18)	1	0	1	Exclude file
Bin	(17)	0	1	1	Exclude file
Bin	(17)	1	0	1	Exclude file
Bin	(16)	0	1	1	Exclude file
Bin	(16)	1	0	1	Exclude file
Bin	(15)	0	1	1	Exclude file
Bin	(15)	1	0	1	Exclude file
Bin	(14)	0	1	1	Exclude file
Bin	(14)	1	0	1	Exclude file
Bin	(13)	0	1	1	Exclude file
Bin	(13)	1	0	1	Exclude file
Bin	(12)	0	1	1	Exclude file
Bin	(12)	1	0	1	Exclude file
Bin	(11)	0	1	1	Exclude file
Bin	(11)	1	0	1	Exclude file
Bin	(10)	0	1	1	Exclude file
Bin	(10)	1	0	1	Exclude file
Bin	(9)	0	1	1	Exclude file
Bin	(9)	1	0	1	Exclude file
Bin	(8)	0	1	1	Exclude file
Bin	(8)	1	0	1	Exclude file
Bin	(7)	0	1	1	Exclude file
Bin	(7)	1	0	1	Exclude file
Bin	(6)	0	1	1	Exclude file
Bin	(6)	1	0	1	Exclude file
Bin	(5)	0	1	1	Exclude file
Bin	(5)	1	0	1	Exclude file
Bin	(4)	0	1	1	Exclude file
Bin	(4)	1	0	1	Exclude file
Bin	(3)	0	1	1	Exclude file
Bin	(3)	1	0	1	Exclude file
Bin	(2)	0	1	1	Exclude file
Bin	(2)	1	0	1	Exclude file
Bin	(1)	0	1	1	Exclude file
Bin	(1)	1	0	1	Exclude file
Bin	(0)	0	1	1	Exclude file
Bin	(0)	1	0	1	Exclude file

Port:

FILTER_INPUT

	Element	From	To	Threshold	Excluded due to
Bin	(28)	0	1	1	Exclude file
Bin	(28)	1	0	1	Exclude file
Bin	(27)	0	1	1	Exclude file
Bin	(27)	1	0	1	Exclude file
Bin	(26)	0	1	1	Exclude file
Bin	(26)	1	0	1	Exclude file
Bin	(25)	0	1	1	Exclude file
Bin	(25)	1	0	1	Exclude file
Bin	(24)	0	1	1	Exclude file
Bin	(24)	1	0	1	Exclude file
Bin	(23)	0	1	1	Exclude file
Bin	(23)	1	0	1	Exclude file
Bin	(22)	0	1	1	Exclude file
Bin	(22)	1	0	1	Exclude file
Bin	(21)	0	1	1	Exclude file
Bin	(21)	1	0	1	Exclude file
Bin	(20)	0	1	1	Exclude file
Bin	(20)	1	0	1	Exclude file
Bin	(19)	0	1	1	Exclude file
Bin	(19)	1	0	1	Exclude file
Bin	(18)	0	1	1	Exclude file
Bin	(18)	1	0	1	Exclude file
Bin	(17)	0	1	1	Exclude file
Bin	(17)	1	0	1	Exclude file
Bin	(16)	0	1	1	Exclude file
Bin	(16)	1	0	1	Exclude file
Bin	(15)	0	1	1	Exclude file
Bin	(15)	1	0	1	Exclude file
Bin	(14)	0	1	1	Exclude file
Bin	(14)	1	0	1	Exclude file
Bin	(13)	0	1	1	Exclude file
Bin	(13)	1	0	1	Exclude file
Bin	(12)	0	1	1	Exclude file
Bin	(12)	1	0	1	Exclude file
Bin	(11)	0	1	1	Exclude file
Bin	(11)	1	0	1	Exclude file
Bin	(10)	0	1	1	Exclude file
Bin	(10)	1	0	1	Exclude file
Bin	(9)	0	1	1	Exclude file
Bin	(9)	1	0	1	Exclude file
Bin	(8)	0	1	1	Exclude file
Bin	(8)	1	0	1	Exclude file
Bin	(7)	0	1	1	Exclude file
Bin	(7)	1	0	1	Exclude file
Bin	(6)	0	1	1	Exclude file
Bin	(6)	1	0	1	Exclude file
Bin	(5)	0	1	1	Exclude file
Bin	(5)	1	0	1	Exclude file
Bin	(4)	0	1	1	Exclude file
Bin	(4)	1	0	1	Exclude file
Bin	(3)	0	1	1	Exclude file
Bin	(3)	1	0	1	Exclude file
Bin	(2)	0	1	1	Exclude file
Bin	(2)	1	0	1	Exclude file
Bin	(1)	0	1	1	Exclude file
Bin	(1)	1	0	1	Exclude file
Bin	(0)	0	1	1	Exclude file
Bin	(0)	1	0	1	Exclude file

Port:

ENABLE

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

Covered toggles:

Port:

VALID

	From	To	Count	Threshold
Bin	0	1	2129	1
Bin	1	0	3070	1

Signal:

MASKED_INPUT

	Element	From	To	Count	Threshold
Bin	(28)	0	1	435	1
Bin	(28)	1	0	2036	1
Bin	(27)	0	1	421	1
Bin	(27)	1	0	2022	1
Bin	(26)	0	1	367	1
Bin	(26)	1	0	1968	1
Bin	(25)	0	1	427	1
Bin	(25)	1	0	2028	1
Bin	(24)	0	1	402	1
Bin	(24)	1	0	2003	1
Bin	(23)	0	1	433	1
Bin	(23)	1	0	2034	1
Bin	(22)	0	1	457	1
Bin	(22)	1	0	2058	1
Bin	(21)	0	1	414	1
Bin	(21)	1	0	2015	1
Bin	(20)	0	1	445	1
Bin	(20)	1	0	2046	1
Bin	(19)	0	1	478	1
Bin	(19)	1	0	2079	1
Bin	(18)	0	1	473	1
Bin	(18)	1	0	2074	1
Bin	(17)	0	1	36	1
Bin	(17)	1	0	1637	1
Bin	(16)	0	1	38	1
Bin	(16)	1	0	1639	1
Bin	(15)	0	1	39	1
Bin	(15)	1	0	1640	1
Bin	(14)	0	1	51	1
Bin	(14)	1	0	1652	1
Bin	(13)	0	1	76	1
Bin	(13)	1	0	1677	1
Bin	(12)	0	1	72	1
Bin	(12)	1	0	1673	1
Bin	(11)	0	1	60	1
Bin	(11)	1	0	1661	1
Bin	(10)	0	1	186	1
Bin	(10)	1	0	1787	1
Bin	(9)	0	1	191	1
Bin	(9)	1	0	1792	1
Bin	(8)	0	1	186	1
Bin	(8)	1	0	1787	1
Bin	(7)	0	1	227	1
Bin	(7)	1	0	1828	1
Bin	(6)	0	1	178	1
Bin	(6)	1	0	1779	1
Bin	(5)	0	1	199	1
Bin	(5)	1	0	1800	1
Bin	(4)	0	1	187	1
Bin	(4)	1	0	1788	1
Bin	(3)	0	1	193	1
Bin	(3)	1	0	1794	1
Bin	(2)	0	1	203	1
Bin	(2)	1	0	1804	1
Bin	(1)	0	1	176	1
Bin	(1)	1	0	1777	1
Bin	(0)	0	1	187	1
Bin	(0)	1	0	1788	1

Signal:

MASKED_VALUE

	Element	From	To	Count	Threshold
Bin	(28)	0	1	271	1
Bin	(28)	1	0	1872	1
Bin	(27)	0	1	254	1
Bin	(27)	1	0	1855	1
Bin	(26)	0	1	241	1
Bin	(26)	1	0	1842	1
Bin	(25)	0	1	252	1
Bin	(25)	1	0	1853	1
Bin	(24)	0	1	271	1
Bin	(24)	1	0	1872	1
Bin	(23)	0	1	266	1
Bin	(23)	1	0	1867	1
Bin	(22)	0	1	285	1
Bin	(22)	1	0	1886	1
Bin	(21)	0	1	251	1
Bin	(21)	1	0	1852	1
Bin	(20)	0	1	239	1
Bin	(20)	1	0	1840	1
Bin	(19)	0	1	282	1
Bin	(19)	1	0	1883	1
Bin	(18)	0	1	311	1
Bin	(18)	1	0	1912	1
Bin	(17)	0	1	47	1
Bin	(17)	1	0	1648	1
Bin	(16)	0	1	47	1
Bin	(16)	1	0	1648	1
Bin	(15)	0	1	35	1
Bin	(15)	1	0	1636	1
Bin	(14)	0	1	53	1
Bin	(14)	1	0	1654	1
Bin	(13)	0	1	68	1
Bin	(13)	1	0	1669	1
Bin	(12)	0	1	64	1
Bin	(12)	1	0	1665	1
Bin	(11)	0	1	73	1
Bin	(11)	1	0	1674	1
Bin	(10)	0	1	198	1
Bin	(10)	1	0	1799	1
Bin	(9)	0	1	199	1
Bin	(9)	1	0	1800	1
Bin	(8)	0	1	211	1
Bin	(8)	1	0	1812	1
Bin	(7)	0	1	216	1
Bin	(7)	1	0	1817	1
Bin	(6)	0	1	218	1
Bin	(6)	1	0	1819	1
Bin	(5)	0	1	219	1
Bin	(5)	1	0	1820	1
Bin	(4)	0	1	217	1
Bin	(4)	1	0	1818	1
Bin	(3)	0	1	221	1
Bin	(3)	1	0	1822	1
Bin	(2)	0	1	226	1
Bin	(2)	1	0	1827	1
Bin	(1)	0	1	196	1
Bin	(1)	1	0	1797	1
Bin	(0)	0	1	214	1
Bin	(0)	1	0	1815	1

NVC code coverage report

Hierarchy

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.FRAME_FILTERS_INST.BIT_FILTER_A_INST

File: /__w/ctu-can-regression/ctu-can-regression/src/frame_filters/frame_filters.vhd

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.

Uncovered statements:

Excluded statements:

Covered statements:

Signal assignment statement on line 121:

Signal assignment statement on line 122:

Uncovered branches:

Excluded branches:

Covered branches:

Uncovered toggles:

Excluded toggles:

Port:

Port:

Port:

Port:

Covered toggles:

Port:

Signal:

Signal:

Uncovered expressions:

Excluded expressions:

Covered expressions:

Uncovered FSM states:

Excluded FSM states:

Covered FSM states:

Uncovered functional coverage:

Excluded functional coverage:

Covered functional coverage: