NVC code coverage report

Signal assignment statement on line 208:

208:    txtb_port_b_data_out <= txtb_port_b_data_out_i; 
Count: 15735
Threshold: 1

---

If statement on lines 277 to 280:

277:    tst_ena <= '1' when (mr_tst_control_tmaena = '1') and 
278:                        (mr_tst_dest_tst_mtgt = std_logic_vector(to_unsigned(G_ID + 2, 4))) 
279:                   else 
280:               '0'; 
Count: 4626
Threshold: 1

---

Signal assignment statement on line 277:

277:    tst_ena <= '1' when (mr_tst_control_tmaena = '1') and 
Count: 242
Threshold: 1

---

Signal assignment statement on line 280:

280:               '0'; 
Count: 4384
Threshold: 1

---

If statement on lines 283 to 285:

283:    txtb_port_a_address_i <= txtb_port_a_address when (tst_ena = '0') 
284:                                                 else 
285:                             mr_tst_dest_tst_addr(4 downto 0); 
Count: 49965182
Threshold: 1

---

Signal assignment statement on line 283:

283:    txtb_port_a_address_i <= txtb_port_a_address when (tst_ena = '0') 
Count: 49938174
Threshold: 1

---

Signal assignment statement on line 285:

285:                             mr_tst_dest_tst_addr(4 downto 0); 
Count: 27008
Threshold: 1

---

If statement on lines 287 to 289:

287:    txtb_port_a_write_i <= txtb_port_a_write when (tst_ena = '0') 
288:                                             else 
289:                           mr_tst_control_twrstb; 
Count: 189237
Threshold: 1

---

Signal assignment statement on line 287:

287:    txtb_port_a_write_i <= txtb_port_a_write when (tst_ena = '0') 
Count: 185412
Threshold: 1

---

Signal assignment statement on line 289:

289:                           mr_tst_control_twrstb; 
Count: 3825
Threshold: 1

---

If statement on lines 291 to 293:

291:    txtb_port_a_data_i <= txtb_port_a_data_in when (tst_ena = '0') 
292:                                              else 
293:                          mr_tst_wdata_tst_wdata; 
Count: 1614620
Threshold: 1

---

Signal assignment statement on line 291:

291:    txtb_port_a_data_i <= txtb_port_a_data_in when (tst_ena = '0') 
Count: 1597889
Threshold: 1

---

Signal assignment statement on line 293:

293:                          mr_tst_wdata_tst_wdata; 
Count: 16731
Threshold: 1

---

If statement on lines 296 to 298:

296:    txtb_port_b_address_i <= txtb_port_b_address when (tst_ena = '0') 
297:                                                 else 
298:                             mr_tst_dest_tst_addr(4 downto 0); 
Count: 179827
Threshold: 1

---

Signal assignment statement on line 296:

296:    txtb_port_b_address_i <= txtb_port_b_address when (tst_ena = '0') 
Count: 176048
Threshold: 1

---

Signal assignment statement on line 298:

298:                             mr_tst_dest_tst_addr(4 downto 0); 
Count: 3779
Threshold: 1

---

If statement on lines 300 to 302:

300:    mr_tst_rdata_tst_rdata <= txtb_port_b_data_out_i when (tst_ena = '1') 
301:                                                     else 
302:                                     (others => '0'); 
Count: 16879
Threshold: 1

---

Signal assignment statement on line 300:

300:    mr_tst_rdata_tst_rdata <= txtb_port_b_data_out_i when (tst_ena = '1') 
Count: 2126
Threshold: 1

---

Signal assignment statement on line 302:

302:                                     (others => '0'); 
Count: 14753
Threshold: 1

"if" / "when" / "else" condition on lines 277 to 278:

277:    tst_ena <= '1' when (mr_tst_control_tmaena = '1') and 
278:                        (mr_tst_dest_tst_mtgt = std_logic_vector(to_unsigned(G_ID + 2, 4))) 

	Evaluated to	Count	Threshold
Bin	True	242	1
Bin	False	4384	1

---

"if" / "when" / "else" condition on line 283:

283:    txtb_port_a_address_i <= txtb_port_a_address when (tst_ena = '0') 

	Evaluated to	Count	Threshold
Bin	True	49938174	1
Bin	False	27008	1

---

"if" / "when" / "else" condition on line 287:

287:    txtb_port_a_write_i <= txtb_port_a_write when (tst_ena = '0') 

	Evaluated to	Count	Threshold
Bin	True	185412	1
Bin	False	3825	1

---

"if" / "when" / "else" condition on line 291:

291:    txtb_port_a_data_i <= txtb_port_a_data_in when (tst_ena = '0') 

	Evaluated to	Count	Threshold
Bin	True	1597889	1
Bin	False	16731	1

---

"if" / "when" / "else" condition on line 296:

296:    txtb_port_b_address_i <= txtb_port_b_address when (tst_ena = '0') 

	Evaluated to	Count	Threshold
Bin	True	176048	1
Bin	False	3779	1

---

"if" / "when" / "else" condition on line 300:

300:    mr_tst_rdata_tst_rdata <= txtb_port_b_data_out_i when (tst_ena = '1') 

	Evaluated to	Count	Threshold
Bin	True	2126	1
Bin	False	14753	1

Port:

 CLK_SYS

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 RES_N

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 MR_SETTINGS_PCHKE

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 MR_TST_CONTROL_TMAENA

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 MR_TST_CONTROL_TWRSTB

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 MR_TST_DEST_TST_ADDR

	Element	From	To	Count	Threshold	Excluded due to
Bin	(4)	0	1	0	1	Exclude file
Bin	(4)	1	0	0	1	Exclude file
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

---

Port:

 MR_TST_DEST_TST_MTGT

	Element	From	To	Count	Threshold	Excluded due to
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

---

Port:

 MR_TST_WDATA_TST_WDATA

	Element	From	To	Count	Threshold	Excluded due to
Bin	(31)	0	1	0	1	Exclude file
Bin	(31)	1	0	0	1	Exclude file
Bin	(30)	0	1	0	1	Exclude file
Bin	(30)	1	0	0	1	Exclude file
Bin	(29)	0	1	0	1	Exclude file
Bin	(29)	1	0	0	1	Exclude file
Bin	(28)	0	1	0	1	Exclude file
Bin	(28)	1	0	0	1	Exclude file
Bin	(27)	0	1	0	1	Exclude file
Bin	(27)	1	0	0	1	Exclude file
Bin	(26)	0	1	0	1	Exclude file
Bin	(26)	1	0	0	1	Exclude file
Bin	(25)	0	1	0	1	Exclude file
Bin	(25)	1	0	0	1	Exclude file
Bin	(24)	0	1	0	1	Exclude file
Bin	(24)	1	0	0	1	Exclude file
Bin	(23)	0	1	0	1	Exclude file
Bin	(23)	1	0	0	1	Exclude file
Bin	(22)	0	1	0	1	Exclude file
Bin	(22)	1	0	0	1	Exclude file
Bin	(21)	0	1	0	1	Exclude file
Bin	(21)	1	0	0	1	Exclude file
Bin	(20)	0	1	0	1	Exclude file
Bin	(20)	1	0	0	1	Exclude file
Bin	(19)	0	1	0	1	Exclude file
Bin	(19)	1	0	0	1	Exclude file
Bin	(18)	0	1	0	1	Exclude file
Bin	(18)	1	0	0	1	Exclude file
Bin	(17)	0	1	0	1	Exclude file
Bin	(17)	1	0	0	1	Exclude file
Bin	(16)	0	1	0	1	Exclude file
Bin	(16)	1	0	0	1	Exclude file
Bin	(15)	0	1	0	1	Exclude file
Bin	(15)	1	0	0	1	Exclude file
Bin	(14)	0	1	0	1	Exclude file
Bin	(14)	1	0	0	1	Exclude file
Bin	(13)	0	1	0	1	Exclude file
Bin	(13)	1	0	0	1	Exclude file
Bin	(12)	0	1	0	1	Exclude file
Bin	(12)	1	0	0	1	Exclude file
Bin	(11)	0	1	0	1	Exclude file
Bin	(11)	1	0	0	1	Exclude file
Bin	(10)	0	1	0	1	Exclude file
Bin	(10)	1	0	0	1	Exclude file
Bin	(9)	0	1	0	1	Exclude file
Bin	(9)	1	0	0	1	Exclude file
Bin	(8)	0	1	0	1	Exclude file
Bin	(8)	1	0	0	1	Exclude file
Bin	(7)	0	1	0	1	Exclude file
Bin	(7)	1	0	0	1	Exclude file
Bin	(6)	0	1	0	1	Exclude file
Bin	(6)	1	0	0	1	Exclude file
Bin	(5)	0	1	0	1	Exclude file
Bin	(5)	1	0	0	1	Exclude file
Bin	(4)	0	1	0	1	Exclude file
Bin	(4)	1	0	0	1	Exclude file
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

---

Port:

 TXTB_PORT_A_ADDRESS

	Element	From	To	Count	Threshold	Excluded due to
Bin	(4)	0	1	0	1	Exclude file
Bin	(4)	1	0	0	1	Exclude file
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

---

Port:

 TXTB_PORT_A_DATA_IN

	Element	From	To	Count	Threshold	Excluded due to
Bin	(31)	0	1	0	1	Exclude file
Bin	(31)	1	0	0	1	Exclude file
Bin	(30)	0	1	0	1	Exclude file
Bin	(30)	1	0	0	1	Exclude file
Bin	(29)	0	1	0	1	Exclude file
Bin	(29)	1	0	0	1	Exclude file
Bin	(28)	0	1	0	1	Exclude file
Bin	(28)	1	0	0	1	Exclude file
Bin	(27)	0	1	0	1	Exclude file
Bin	(27)	1	0	0	1	Exclude file
Bin	(26)	0	1	0	1	Exclude file
Bin	(26)	1	0	0	1	Exclude file
Bin	(25)	0	1	0	1	Exclude file
Bin	(25)	1	0	0	1	Exclude file
Bin	(24)	0	1	0	1	Exclude file
Bin	(24)	1	0	0	1	Exclude file
Bin	(23)	0	1	0	1	Exclude file
Bin	(23)	1	0	0	1	Exclude file
Bin	(22)	0	1	0	1	Exclude file
Bin	(22)	1	0	0	1	Exclude file
Bin	(21)	0	1	0	1	Exclude file
Bin	(21)	1	0	0	1	Exclude file
Bin	(20)	0	1	0	1	Exclude file
Bin	(20)	1	0	0	1	Exclude file
Bin	(19)	0	1	0	1	Exclude file
Bin	(19)	1	0	0	1	Exclude file
Bin	(18)	0	1	0	1	Exclude file
Bin	(18)	1	0	0	1	Exclude file
Bin	(17)	0	1	0	1	Exclude file
Bin	(17)	1	0	0	1	Exclude file
Bin	(16)	0	1	0	1	Exclude file
Bin	(16)	1	0	0	1	Exclude file
Bin	(15)	0	1	0	1	Exclude file
Bin	(15)	1	0	0	1	Exclude file
Bin	(14)	0	1	0	1	Exclude file
Bin	(14)	1	0	0	1	Exclude file
Bin	(13)	0	1	0	1	Exclude file
Bin	(13)	1	0	0	1	Exclude file
Bin	(12)	0	1	0	1	Exclude file
Bin	(12)	1	0	0	1	Exclude file
Bin	(11)	0	1	0	1	Exclude file
Bin	(11)	1	0	0	1	Exclude file
Bin	(10)	0	1	0	1	Exclude file
Bin	(10)	1	0	0	1	Exclude file
Bin	(9)	0	1	0	1	Exclude file
Bin	(9)	1	0	0	1	Exclude file
Bin	(8)	0	1	0	1	Exclude file
Bin	(8)	1	0	0	1	Exclude file
Bin	(7)	0	1	0	1	Exclude file
Bin	(7)	1	0	0	1	Exclude file
Bin	(6)	0	1	0	1	Exclude file
Bin	(6)	1	0	0	1	Exclude file
Bin	(5)	0	1	0	1	Exclude file
Bin	(5)	1	0	0	1	Exclude file
Bin	(4)	0	1	0	1	Exclude file
Bin	(4)	1	0	0	1	Exclude file
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

---

Port:

 TXTB_PORT_A_PARITY

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 TXTB_PORT_A_WRITE

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 TXTB_PORT_A_BE

	Element	From	To	Count	Threshold	Excluded due to
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

---

Port:

 TXTB_PORT_B_ADDRESS

	Element	From	To	Count	Threshold	Excluded due to
Bin	(4)	0	1	0	1	Exclude file
Bin	(4)	1	0	0	1	Exclude file
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

Port:

 MR_TST_RDATA_TST_RDATA

	Element	From	To	Count	Threshold
Bin	(31)	0	1	480	1
Bin	(31)	1	0	1140	1
Bin	(30)	0	1	480	1
Bin	(30)	1	0	1140	1
Bin	(29)	0	1	456	1
Bin	(29)	1	0	1116	1
Bin	(28)	0	1	505	1
Bin	(28)	1	0	1165	1
Bin	(27)	0	1	503	1
Bin	(27)	1	0	1163	1
Bin	(26)	0	1	506	1
Bin	(26)	1	0	1166	1
Bin	(25)	0	1	509	1
Bin	(25)	1	0	1169	1
Bin	(24)	0	1	493	1
Bin	(24)	1	0	1153	1
Bin	(23)	0	1	515	1
Bin	(23)	1	0	1175	1
Bin	(22)	0	1	502	1
Bin	(22)	1	0	1162	1
Bin	(21)	0	1	531	1
Bin	(21)	1	0	1191	1
Bin	(20)	0	1	517	1
Bin	(20)	1	0	1177	1
Bin	(19)	0	1	512	1
Bin	(19)	1	0	1172	1
Bin	(18)	0	1	526	1
Bin	(18)	1	0	1186	1
Bin	(17)	0	1	493	1
Bin	(17)	1	0	1153	1
Bin	(16)	0	1	483	1
Bin	(16)	1	0	1143	1
Bin	(15)	0	1	512	1
Bin	(15)	1	0	1172	1
Bin	(14)	0	1	510	1
Bin	(14)	1	0	1170	1
Bin	(13)	0	1	512	1
Bin	(13)	1	0	1172	1
Bin	(12)	0	1	497	1
Bin	(12)	1	0	1157	1
Bin	(11)	0	1	498	1
Bin	(11)	1	0	1158	1
Bin	(10)	0	1	514	1
Bin	(10)	1	0	1174	1
Bin	(9)	0	1	507	1
Bin	(9)	1	0	1167	1
Bin	(8)	0	1	516	1
Bin	(8)	1	0	1176	1
Bin	(7)	0	1	519	1
Bin	(7)	1	0	1179	1
Bin	(6)	0	1	491	1
Bin	(6)	1	0	1151	1
Bin	(5)	0	1	507	1
Bin	(5)	1	0	1167	1
Bin	(4)	0	1	503	1
Bin	(4)	1	0	1163	1
Bin	(3)	0	1	501	1
Bin	(3)	1	0	1161	1
Bin	(2)	0	1	496	1
Bin	(2)	1	0	1156	1
Bin	(1)	0	1	512	1
Bin	(1)	1	0	1172	1
Bin	(0)	0	1	499	1
Bin	(0)	1	0	1159	1

---

Port:

 TXTB_PORT_B_DATA_OUT

	Element	From	To	Count	Threshold
Bin	(31)	0	1	885	1
Bin	(31)	1	0	1505	1
Bin	(30)	0	1	984	1
Bin	(30)	1	0	1604	1
Bin	(29)	0	1	847	1
Bin	(29)	1	0	1467	1
Bin	(28)	0	1	2160	1
Bin	(28)	1	0	2771	1
Bin	(27)	0	1	2417	1
Bin	(27)	1	0	3028	1
Bin	(26)	0	1	2077	1
Bin	(26)	1	0	2685	1
Bin	(25)	0	1	2315	1
Bin	(25)	1	0	2925	1
Bin	(24)	0	1	2240	1
Bin	(24)	1	0	2843	1
Bin	(23)	0	1	2433	1
Bin	(23)	1	0	3044	1
Bin	(22)	0	1	2383	1
Bin	(22)	1	0	2993	1
Bin	(21)	0	1	2495	1
Bin	(21)	1	0	3098	1
Bin	(20)	0	1	2487	1
Bin	(20)	1	0	3093	1
Bin	(19)	0	1	2547	1
Bin	(19)	1	0	3151	1
Bin	(18)	0	1	2396	1
Bin	(18)	1	0	3004	1
Bin	(17)	0	1	1628	1
Bin	(17)	1	0	2246	1
Bin	(16)	0	1	1683	1
Bin	(16)	1	0	2299	1
Bin	(15)	0	1	1775	1
Bin	(15)	1	0	2394	1
Bin	(14)	0	1	1982	1
Bin	(14)	1	0	2599	1
Bin	(13)	0	1	1839	1
Bin	(13)	1	0	2454	1
Bin	(12)	0	1	1509	1
Bin	(12)	1	0	2126	1
Bin	(11)	0	1	1491	1
Bin	(11)	1	0	2109	1
Bin	(10)	0	1	2125	1
Bin	(10)	1	0	2742	1
Bin	(9)	0	1	2310	1
Bin	(9)	1	0	2909	1
Bin	(8)	0	1	1913	1
Bin	(8)	1	0	2529	1
Bin	(7)	0	1	3053	1
Bin	(7)	1	0	3634	1
Bin	(6)	0	1	2921	1
Bin	(6)	1	0	3513	1
Bin	(5)	0	1	2760	1
Bin	(5)	1	0	3374	1
Bin	(4)	0	1	1997	1
Bin	(4)	1	0	2612	1
Bin	(3)	0	1	2193	1
Bin	(3)	1	0	2793	1
Bin	(2)	0	1	2128	1
Bin	(2)	1	0	2727	1
Bin	(1)	0	1	2225	1
Bin	(1)	1	0	2824	1
Bin	(0)	0	1	2520	1
Bin	(0)	1	0	3115	1

---

Port:

 PARITY_MISMATCH

	From	To	Count	Threshold
Bin	0	1	1353	1
Bin	1	0	2013	1

---

Signal:

 TXTB_PORT_A_ADDRESS_I

	Element	From	To	Count	Threshold
Bin	(4)	0	1	249441	1
Bin	(4)	1	0	24678062	1
Bin	(3)	0	1	406713	1
Bin	(3)	1	0	24520750	1
Bin	(2)	0	1	307679	1
Bin	(2)	1	0	24620202	1
Bin	(1)	0	1	24372838	1
Bin	(1)	1	0	555845	1
Bin	(0)	0	1	15907666	1
Bin	(0)	1	0	9022718	1

---

Signal:

 TXTB_PORT_A_WRITE_I

	From	To	Count	Threshold
Bin	0	1	45991	1
Bin	1	0	46757	1

---

Signal:

 TXTB_PORT_A_DATA_I

	Element	From	To	Count	Threshold
Bin	(31)	0	1	33089	1
Bin	(31)	1	0	762503	1
Bin	(30)	0	1	33816	1
Bin	(30)	1	0	761788	1
Bin	(29)	0	1	34888	1
Bin	(29)	1	0	760676	1
Bin	(28)	0	1	49317	1
Bin	(28)	1	0	746311	1
Bin	(27)	0	1	46966	1
Bin	(27)	1	0	748642	1
Bin	(26)	0	1	45381	1
Bin	(26)	1	0	750241	1
Bin	(25)	0	1	53053	1
Bin	(25)	1	0	742549	1
Bin	(24)	0	1	42801	1
Bin	(24)	1	0	752817	1
Bin	(23)	0	1	42226	1
Bin	(23)	1	0	753392	1
Bin	(22)	0	1	48293	1
Bin	(22)	1	0	747293	1
Bin	(21)	0	1	41271	1
Bin	(21)	1	0	754359	1
Bin	(20)	0	1	43566	1
Bin	(20)	1	0	752048	1
Bin	(19)	0	1	70825	1
Bin	(19)	1	0	724799	1
Bin	(18)	0	1	82590	1
Bin	(18)	1	0	713086	1
Bin	(17)	0	1	82527	1
Bin	(17)	1	0	713068	1
Bin	(16)	0	1	142179	1
Bin	(16)	1	0	653434	1
Bin	(15)	0	1	39416	1
Bin	(15)	1	0	756200	1
Bin	(14)	0	1	48801	1
Bin	(14)	1	0	746819	1
Bin	(13)	0	1	42504	1
Bin	(13)	1	0	753124	1
Bin	(12)	0	1	44445	1
Bin	(12)	1	0	751179	1
Bin	(11)	0	1	64928	1
Bin	(11)	1	0	730682	1
Bin	(10)	0	1	68660	1
Bin	(10)	1	0	726958	1
Bin	(9)	0	1	87586	1
Bin	(9)	1	0	708050	1
Bin	(8)	0	1	86099	1
Bin	(8)	1	0	709517	1
Bin	(7)	0	1	75332	1
Bin	(7)	1	0	720302	1
Bin	(6)	0	1	70772	1
Bin	(6)	1	0	724856	1
Bin	(5)	0	1	70529	1
Bin	(5)	1	0	725085	1
Bin	(4)	0	1	88228	1
Bin	(4)	1	0	707376	1
Bin	(3)	0	1	98272	1
Bin	(3)	1	0	697340	1
Bin	(2)	0	1	108025	1
Bin	(2)	1	0	687598	1
Bin	(1)	0	1	167798	1
Bin	(1)	1	0	627836	1
Bin	(0)	0	1	143165	1
Bin	(0)	1	0	652542	1

---

Signal:

 TXTB_PORT_B_ADDRESS_I

	Element	From	To	Count	Threshold
Bin	(4)	0	1	11005	1
Bin	(4)	1	0	11665	1
Bin	(3)	0	1	494	1
Bin	(3)	1	0	1154	1
Bin	(2)	0	1	16822	1
Bin	(2)	1	0	17482	1
Bin	(1)	0	1	13464	1
Bin	(1)	1	0	13465	1
Bin	(0)	0	1	37132	1
Bin	(0)	1	0	37791	1

---

Signal:

 TXTB_PORT_B_DATA_OUT_I

	Element	From	To	Count	Threshold
Bin	(31)	0	1	885	1
Bin	(31)	1	0	1505	1
Bin	(30)	0	1	984	1
Bin	(30)	1	0	1604	1
Bin	(29)	0	1	847	1
Bin	(29)	1	0	1467	1
Bin	(28)	0	1	2160	1
Bin	(28)	1	0	2771	1
Bin	(27)	0	1	2417	1
Bin	(27)	1	0	3028	1
Bin	(26)	0	1	2077	1
Bin	(26)	1	0	2685	1
Bin	(25)	0	1	2315	1
Bin	(25)	1	0	2925	1
Bin	(24)	0	1	2240	1
Bin	(24)	1	0	2843	1
Bin	(23)	0	1	2433	1
Bin	(23)	1	0	3044	1
Bin	(22)	0	1	2383	1
Bin	(22)	1	0	2993	1
Bin	(21)	0	1	2495	1
Bin	(21)	1	0	3098	1
Bin	(20)	0	1	2487	1
Bin	(20)	1	0	3093	1
Bin	(19)	0	1	2547	1
Bin	(19)	1	0	3151	1
Bin	(18)	0	1	2396	1
Bin	(18)	1	0	3004	1
Bin	(17)	0	1	1628	1
Bin	(17)	1	0	2246	1
Bin	(16)	0	1	1683	1
Bin	(16)	1	0	2299	1
Bin	(15)	0	1	1775	1
Bin	(15)	1	0	2394	1
Bin	(14)	0	1	1982	1
Bin	(14)	1	0	2599	1
Bin	(13)	0	1	1839	1
Bin	(13)	1	0	2454	1
Bin	(12)	0	1	1509	1
Bin	(12)	1	0	2126	1
Bin	(11)	0	1	1491	1
Bin	(11)	1	0	2109	1
Bin	(10)	0	1	2125	1
Bin	(10)	1	0	2742	1
Bin	(9)	0	1	2310	1
Bin	(9)	1	0	2909	1
Bin	(8)	0	1	1913	1
Bin	(8)	1	0	2529	1
Bin	(7)	0	1	3053	1
Bin	(7)	1	0	3634	1
Bin	(6)	0	1	2921	1
Bin	(6)	1	0	3513	1
Bin	(5)	0	1	2760	1
Bin	(5)	1	0	3374	1
Bin	(4)	0	1	1997	1
Bin	(4)	1	0	2612	1
Bin	(3)	0	1	2193	1
Bin	(3)	1	0	2793	1
Bin	(2)	0	1	2128	1
Bin	(2)	1	0	2727	1
Bin	(1)	0	1	2225	1
Bin	(1)	1	0	2824	1
Bin	(0)	0	1	2520	1
Bin	(0)	1	0	3115	1

---

Signal:

 TST_ENA

	From	To	Count	Threshold
Bin	0	1	242	1
Bin	1	0	902	1

---

Signal:

 PARITY_WORD

	Element	From	To	Count	Threshold
Bin	(20)	0	1	91	1
Bin	(20)	1	0	2990	1
Bin	(19)	0	1	4	1
Bin	(19)	1	0	3077	1
Bin	(18)	0	1	8	1
Bin	(18)	1	0	3073	1
Bin	(17)	0	1	13	1
Bin	(17)	1	0	3068	1
Bin	(16)	0	1	16	1
Bin	(16)	1	0	3065	1
Bin	(15)	0	1	22	1
Bin	(15)	1	0	3059	1
Bin	(14)	0	1	24	1
Bin	(14)	1	0	3057	1
Bin	(13)	0	1	31	1
Bin	(13)	1	0	3050	1
Bin	(12)	0	1	36	1
Bin	(12)	1	0	3045	1
Bin	(11)	0	1	61	1
Bin	(11)	1	0	3020	1
Bin	(10)	0	1	61	1
Bin	(10)	1	0	3020	1
Bin	(9)	0	1	79	1
Bin	(9)	1	0	3002	1
Bin	(8)	0	1	90	1
Bin	(8)	1	0	2991	1
Bin	(7)	0	1	145	1
Bin	(7)	1	0	2936	1
Bin	(6)	0	1	185	1
Bin	(6)	1	0	2896	1
Bin	(5)	0	1	292	1
Bin	(5)	1	0	2789	1
Bin	(4)	0	1	702	1
Bin	(4)	1	0	2379	1
Bin	(3)	0	1	1305	1
Bin	(3)	1	0	1776	1
Bin	(2)	0	1	1668	1
Bin	(2)	1	0	1413	1
Bin	(1)	0	1	1121	1
Bin	(1)	1	0	1960	1
Bin	(0)	0	1	1062	1
Bin	(0)	1	0	2019	1

---

Signal:

 PARITY_READ_REAL

	From	To	Count	Threshold
Bin	0	1	3696	1
Bin	1	0	3112	1

---

Signal:

 PARITY_READ_EXP

	From	To	Count	Threshold
Bin	0	1	3703	1
Bin	1	0	4363	1

"and" expression on lines 277 to 278:

 (mr_tst_control_tmaena = '1') and (mr_tst_dest_tst_mtgt = std_logic_vector(to_unsigned(G_ID + 2, 4))) 
  <-----------LHS----------->       <------------------------------RHS------------------------------>  

	LHS	RHS	Count	Threshold	Exclude Command
Bin	False	True	0	1	Copy to Clipboard

"and" expression on lines 277 to 278:

 (mr_tst_control_tmaena = '1') and (mr_tst_dest_tst_mtgt = std_logic_vector(to_unsigned(G_ID + 2, 4))) 
  <-----------LHS----------->       <------------------------------RHS------------------------------>  

	LHS	RHS	Count	Threshold
Bin	True	False	1509	1
Bin	True	True	242	1

---

"=" expression on line 277:

 mr_tst_control_tmaena = '1' 

	Evaluated to	Count	Threshold
Bin	False	2875	1
Bin	True	1751	1

---

"=" expression on line 283:

 tst_ena = '0' 

	Evaluated to	Count	Threshold
Bin	False	27008	1
Bin	True	49938174	1

---

"=" expression on line 287:

 tst_ena = '0' 

	Evaluated to	Count	Threshold
Bin	False	3825	1
Bin	True	185412	1

---

"=" expression on line 291:

 tst_ena = '0' 

	Evaluated to	Count	Threshold
Bin	False	16731	1
Bin	True	1597889	1

---

"=" expression on line 296:

 tst_ena = '0' 

	Evaluated to	Count	Threshold
Bin	False	3779	1
Bin	True	176048	1

---

"=" expression on line 300:

 tst_ena = '1' 

	Evaluated to	Count	Threshold
Bin	False	14753	1
Bin	True	2126	1