NVC code coverage report

Instance	Statement	Branch	Toggle	Expression	FSM state	Functional	Average
BIT_TIME_CFG_CAPTURE_INST	100.0 % (25/25)	100.0 % (14/14)	100.0 % (270/270)	100.0 % (20/20)	N.A.	N.A.	100.0 % (329/329)
SYNCHRONISATION_CHECKER_INST	100.0 % (27/27)	100.0 % (24/24)	100.0 % (34/34)	100.0 % (68/68)	N.A.	N.A.	100.0 % (153/153)
BIT_SEGMENT_METER_NBT_INST	100.0 % (66/66)	100.0 % (48/48)	100.0 % (96/96)	100.0 % (161/161)	N.A.	N.A.	100.0 % (371/371)
BIT_TIME_COUNTERS_NBT_INST	100.0 % (20/20)	100.0 % (20/20)	100.0 % (114/114)	100.0 % (29/29)	N.A.	N.A.	100.0 % (183/183)
BIT_SEGMENT_METER_DBT_INST	100.0 % (66/66)	100.0 % (48/48)	100.0 % (90/90)	100.0 % (161/161)	N.A.	N.A.	100.0 % (365/365)
BIT_TIME_COUNTERS_DBT_INST	100.0 % (20/20)	100.0 % (20/20)	100.0 % (108/108)	100.0 % (29/29)	N.A.	N.A.	100.0 % (177/177)
SEGMENT_END_DETECTOR_INST	100.0 % (56/56)	100.0 % (44/44)	100.0 % (72/72)	100.0 % (120/120)	N.A.	N.A.	100.0 % (292/292)
BIT_TIME_FSM_INST	100.0 % (29/29)	100.0 % (26/26)	100.0 % (18/18)	100.0 % (18/18)	100.0 % (6/6)	N.A.	100.0 % (97/97)
TRIGGER_GENERATOR_INST	100.0 % (14/14)	100.0 % (14/14)	100.0 % (22/22)	100.0 % (18/18)	N.A.	N.A.	100.0 % (68/68)

Instance	Statement	Branch	Toggle	Expression	FSM state	Functional	Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.PRESCALER_INST	100.0 % (3/3)	100.0 % (2/2)	100.0 % (314/314)	N.A.	N.A.	N.A.	100.0 % (319/319)

	Evaluated to	Count	Threshold
Bin	True	150311116	1
Bin	False	83953897	1

Uncovered toggles:

Excluded toggles:

Covered toggles:

Port:

CLK_SYS

	From	To	Count	Threshold
Bin	0	1	527578869	1
Bin	1	0	527580460	1

Port:

RES_N

	From	To	Count	Threshold
Bin	0	1	8082	1
Bin	1	0	8072	1

Port:

MR_SETTINGS_ENA

	From	To	Count	Threshold
Bin	0	1	6482	1
Bin	1	0	8072	1

Port:

MR_BTR_PROP(6)

	From	To	Count	Threshold
Bin	0	1	202	1
Bin	1	0	1800	1

Port:

MR_BTR_PROP(5)

	From	To	Count	Threshold
Bin	0	1	312	1
Bin	1	0	1909	1

Port:

MR_BTR_PROP(4)

	From	To	Count	Threshold
Bin	0	1	223	1
Bin	1	0	1820	1

Port:

MR_BTR_PROP(3)

	From	To	Count	Threshold
Bin	0	1	273	1
Bin	1	0	1870	1

Port:

MR_BTR_PROP(2)

	From	To	Count	Threshold
Bin	0	1	3820	1
Bin	1	0	2221	1

Port:

MR_BTR_PROP(1)

	From	To	Count	Threshold
Bin	0	1	261	1
Bin	1	0	1858	1

Port:

MR_BTR_PROP(0)

	From	To	Count	Threshold
Bin	0	1	1793	1
Bin	1	0	194	1

Port:

MR_BTR_PH1(5)

	From	To	Count	Threshold
Bin	0	1	316	1
Bin	1	0	1914	1

Port:

MR_BTR_PH1(4)

	From	To	Count	Threshold
Bin	0	1	250	1
Bin	1	0	1848	1

Port:

MR_BTR_PH1(3)

	From	To	Count	Threshold
Bin	0	1	259	1
Bin	1	0	1857	1

Port:

MR_BTR_PH1(2)

	From	To	Count	Threshold
Bin	0	1	1304	1
Bin	1	0	2896	1

Port:

MR_BTR_PH1(1)

	From	To	Count	Threshold
Bin	0	1	1927	1
Bin	1	0	328	1

Port:

MR_BTR_PH1(0)

	From	To	Count	Threshold
Bin	0	1	2088	1
Bin	1	0	490	1

Port:

MR_BTR_PH2(5)

	From	To	Count	Threshold
Bin	0	1	204	1
Bin	1	0	1802	1

Port:

MR_BTR_PH2(4)

	From	To	Count	Threshold
Bin	0	1	347	1
Bin	1	0	1944	1

Port:

MR_BTR_PH2(3)

	From	To	Count	Threshold
Bin	0	1	314	1
Bin	1	0	1912	1

Port:

MR_BTR_PH2(2)

	From	To	Count	Threshold
Bin	0	1	3872	1
Bin	1	0	2274	1

Port:

MR_BTR_PH2(1)

	From	To	Count	Threshold
Bin	0	1	3411	1
Bin	1	0	5003	1

Port:

MR_BTR_PH2(0)

	From	To	Count	Threshold
Bin	0	1	2161	1
Bin	1	0	561	1

Port:

MR_BTR_BRP(7)

	From	To	Count	Threshold
Bin	0	1	13	1
Bin	1	0	1613	1

Port:

MR_BTR_BRP(6)

	From	To	Count	Threshold
Bin	0	1	12	1
Bin	1	0	1612	1

Port:

MR_BTR_BRP(5)

	From	To	Count	Threshold
Bin	0	1	13	1
Bin	1	0	1613	1

Port:

MR_BTR_BRP(4)

	From	To	Count	Threshold
Bin	0	1	17	1
Bin	1	0	1617	1

Port:

MR_BTR_BRP(3)

	From	To	Count	Threshold
Bin	0	1	4831	1
Bin	1	0	3241	1

Port:

MR_BTR_BRP(2)

	From	To	Count	Threshold
Bin	0	1	928	1
Bin	1	0	2523	1

Port:

MR_BTR_BRP(1)

	From	To	Count	Threshold
Bin	0	1	4762	1
Bin	1	0	3169	1

Port:

MR_BTR_BRP(0)

	From	To	Count	Threshold
Bin	0	1	2315	1
Bin	1	0	3912	1

Port:

MR_BTR_SJW(4)

	From	To	Count	Threshold
Bin	0	1	205	1
Bin	1	0	1802	1

Port:

MR_BTR_SJW(3)

	From	To	Count	Threshold
Bin	0	1	269	1
Bin	1	0	1866	1

Port:

MR_BTR_SJW(2)

	From	To	Count	Threshold
Bin	0	1	966	1
Bin	1	0	2563	1

Port:

MR_BTR_SJW(1)

	From	To	Count	Threshold
Bin	0	1	2625	1
Bin	1	0	1032	1

Port:

MR_BTR_SJW(0)

	From	To	Count	Threshold
Bin	0	1	3116	1
Bin	1	0	4713	1

Port:

MR_BTR_FD_PROP_FD(5)

	From	To	Count	Threshold
Bin	0	1	243	1
Bin	1	0	1840	1

Port:

MR_BTR_FD_PROP_FD(4)

	From	To	Count	Threshold
Bin	0	1	286	1
Bin	1	0	1883	1

Port:

MR_BTR_FD_PROP_FD(3)

	From	To	Count	Threshold
Bin	0	1	275	1
Bin	1	0	1872	1

Port:

MR_BTR_FD_PROP_FD(2)

	From	To	Count	Threshold
Bin	0	1	1185	1
Bin	1	0	2775	1

Port:

MR_BTR_FD_PROP_FD(1)

	From	To	Count	Threshold
Bin	0	1	4706	1
Bin	1	0	3113	1

Port:

MR_BTR_FD_PROP_FD(0)

	From	To	Count	Threshold
Bin	0	1	3890	1
Bin	1	0	2290	1

Port:

MR_BTR_FD_PH1_FD(4)

	From	To	Count	Threshold
Bin	0	1	253	1
Bin	1	0	1851	1

Port:

MR_BTR_FD_PH1_FD(3)

	From	To	Count	Threshold
Bin	0	1	284	1
Bin	1	0	1882	1

Port:

MR_BTR_FD_PH1_FD(2)

	From	To	Count	Threshold
Bin	0	1	1179	1
Bin	1	0	2770	1

Port:

MR_BTR_FD_PH1_FD(1)

	From	To	Count	Threshold
Bin	0	1	1697	1
Bin	1	0	98	1

Port:

MR_BTR_FD_PH1_FD(0)

	From	To	Count	Threshold
Bin	0	1	3840	1
Bin	1	0	2241	1

Port:

MR_BTR_FD_PH2_FD(4)

	From	To	Count	Threshold
Bin	0	1	281	1
Bin	1	0	1879	1

Port:

MR_BTR_FD_PH2_FD(3)

	From	To	Count	Threshold
Bin	0	1	321	1
Bin	1	0	1919	1

Port:

MR_BTR_FD_PH2_FD(2)

	From	To	Count	Threshold
Bin	0	1	1212	1
Bin	1	0	2803	1

Port:

MR_BTR_FD_PH2_FD(1)

	From	To	Count	Threshold
Bin	0	1	1732	1
Bin	1	0	133	1

Port:

MR_BTR_FD_PH2_FD(0)

	From	To	Count	Threshold
Bin	0	1	3871	1
Bin	1	0	2271	1

Port:

MR_BTR_FD_BRP_FD(7)

	From	To	Count	Threshold
Bin	0	1	19	1
Bin	1	0	1619	1

Port:

MR_BTR_FD_BRP_FD(6)

	From	To	Count	Threshold
Bin	0	1	27	1
Bin	1	0	1627	1

Port:

MR_BTR_FD_BRP_FD(5)

	From	To	Count	Threshold
Bin	0	1	18	1
Bin	1	0	1618	1

Port:

MR_BTR_FD_BRP_FD(4)

	From	To	Count	Threshold
Bin	0	1	28	1
Bin	1	0	1628	1

Port:

MR_BTR_FD_BRP_FD(3)

	From	To	Count	Threshold
Bin	0	1	25	1
Bin	1	0	1625	1

Port:

MR_BTR_FD_BRP_FD(2)

	From	To	Count	Threshold
Bin	0	1	4843	1
Bin	1	0	3253	1

Port:

MR_BTR_FD_BRP_FD(1)

	From	To	Count	Threshold
Bin	0	1	758	1
Bin	1	0	2356	1

Port:

MR_BTR_FD_BRP_FD(0)

	From	To	Count	Threshold
Bin	0	1	2600	1
Bin	1	0	4192	1

Port:

MR_BTR_FD_SJW_FD(4)

	From	To	Count	Threshold
Bin	0	1	236	1
Bin	1	0	1833	1

Port:

MR_BTR_FD_SJW_FD(3)

	From	To	Count	Threshold
Bin	0	1	275	1
Bin	1	0	1872	1

Port:

MR_BTR_FD_SJW_FD(2)

	From	To	Count	Threshold
Bin	0	1	929	1
Bin	1	0	2526	1

Port:

MR_BTR_FD_SJW_FD(1)

	From	To	Count	Threshold
Bin	0	1	2558	1
Bin	1	0	965	1

Port:

MR_BTR_FD_SJW_FD(0)

	From	To	Count	Threshold
Bin	0	1	949	1
Bin	1	0	2546	1

Port:

SYNC_EDGE

	From	To	Count	Threshold
Bin	0	1	1555148	1
Bin	1	0	1556748	1

Port:

SP_CONTROL(1)

	From	To	Count	Threshold
Bin	0	1	4206	1
Bin	1	0	5806	1

Port:

SP_CONTROL(0)

	From	To	Count	Threshold
Bin	0	1	25548	1
Bin	1	0	27148	1

Port:

SYNC_CONTROL(1)

	From	To	Count	Threshold
Bin	0	1	99647	1
Bin	1	0	99642	1

Port:

SYNC_CONTROL(0)

	From	To	Count	Threshold
Bin	0	1	91759	1
Bin	1	0	91764	1

Port:

NO_POS_RESYNC

	From	To	Count	Threshold
Bin	0	1	633738	1
Bin	1	0	635336	1

Port:

NBT_CTRS_EN

	From	To	Count	Threshold
Bin	0	1	6482	1
Bin	1	0	8072	1

Port:

DBT_CTRS_EN

	From	To	Count	Threshold
Bin	0	1	66645	1
Bin	1	0	68245	1

Port:

RX_TRIGGERS(1)

	From	To	Count	Threshold
Bin	0	1	33119362	1
Bin	1	0	33122562	1

Port:

RX_TRIGGERS(0)

	From	To	Count	Threshold
Bin	0	1	22070470	1
Bin	1	0	44169854	1

Port:

TX_TRIGGER

	From	To	Count	Threshold
Bin	0	1	11044003	1
Bin	1	0	11045602	1

Port:

TQ_EDGE

	From	To	Count	Threshold
Bin	0	1	108871268	1
Bin	1	0	108872865	1

Signal:

TSEG1_NBT(7)

	From	To	Count	Threshold
Bin	0	1	456	1
Bin	1	0	2054	1

Signal:

TSEG1_NBT(6)

	From	To	Count	Threshold
Bin	0	1	1689	1
Bin	1	0	3289	1

Signal:

TSEG1_NBT(5)

	From	To	Count	Threshold
Bin	0	1	806	1
Bin	1	0	2404	1

Signal:

TSEG1_NBT(4)

	From	To	Count	Threshold
Bin	0	1	935	1
Bin	1	0	2533	1

Signal:

TSEG1_NBT(3)

	From	To	Count	Threshold
Bin	0	1	5981	1
Bin	1	0	4382	1

Signal:

TSEG1_NBT(2)

	From	To	Count	Threshold
Bin	0	1	4192	1
Bin	1	0	5784	1

Signal:

TSEG1_NBT(1)

	From	To	Count	Threshold
Bin	0	1	1067	1
Bin	1	0	2664	1

Signal:

TSEG1_NBT(0)

	From	To	Count	Threshold
Bin	0	1	3759	1
Bin	1	0	2159	1

Signal:

TSEG2_NBT(5)

	From	To	Count	Threshold
Bin	0	1	204	1
Bin	1	0	1802	1

Signal:

TSEG2_NBT(4)

	From	To	Count	Threshold
Bin	0	1	347	1
Bin	1	0	1944	1

Signal:

TSEG2_NBT(3)

	From	To	Count	Threshold
Bin	0	1	314	1
Bin	1	0	1912	1

Signal:

TSEG2_NBT(2)

	From	To	Count	Threshold
Bin	0	1	3872	1
Bin	1	0	2274	1

Signal:

TSEG2_NBT(1)

	From	To	Count	Threshold
Bin	0	1	3411	1
Bin	1	0	5003	1

Signal:

TSEG2_NBT(0)

	From	To	Count	Threshold
Bin	0	1	2161	1
Bin	1	0	561	1

Signal:

BRP_NBT(7)

	From	To	Count	Threshold
Bin	0	1	13	1
Bin	1	0	1613	1

Signal:

BRP_NBT(6)

	From	To	Count	Threshold
Bin	0	1	12	1
Bin	1	0	1612	1

Signal:

BRP_NBT(5)

	From	To	Count	Threshold
Bin	0	1	13	1
Bin	1	0	1613	1

Signal:

BRP_NBT(4)

	From	To	Count	Threshold
Bin	0	1	17	1
Bin	1	0	1617	1

Signal:

BRP_NBT(3)

	From	To	Count	Threshold
Bin	0	1	4831	1
Bin	1	0	3241	1

Signal:

BRP_NBT(2)

	From	To	Count	Threshold
Bin	0	1	928	1
Bin	1	0	2523	1

Signal:

BRP_NBT(1)

	From	To	Count	Threshold
Bin	0	1	4762	1
Bin	1	0	3169	1

Signal:

BRP_NBT(0)

	From	To	Count	Threshold
Bin	0	1	2315	1
Bin	1	0	3912	1

Signal:

SJW_NBT(4)

	From	To	Count	Threshold
Bin	0	1	205	1
Bin	1	0	1802	1

Signal:

SJW_NBT(3)

	From	To	Count	Threshold
Bin	0	1	269	1
Bin	1	0	1866	1

Signal:

SJW_NBT(2)

	From	To	Count	Threshold
Bin	0	1	966	1
Bin	1	0	2563	1

Signal:

SJW_NBT(1)

	From	To	Count	Threshold
Bin	0	1	2625	1
Bin	1	0	1032	1

Signal:

SJW_NBT(0)

	From	To	Count	Threshold
Bin	0	1	3116	1
Bin	1	0	4713	1

Signal:

TSEG1_DBT(6)

	From	To	Count	Threshold
Bin	0	1	2332	1
Bin	1	0	3930	1

Signal:

TSEG1_DBT(5)

	From	To	Count	Threshold
Bin	0	1	269	1
Bin	1	0	1869	1

Signal:

TSEG1_DBT(4)

	From	To	Count	Threshold
Bin	0	1	2406	1
Bin	1	0	4004	1

Signal:

TSEG1_DBT(3)

	From	To	Count	Threshold
Bin	0	1	3646	1
Bin	1	0	5237	1

Signal:

TSEG1_DBT(2)

	From	To	Count	Threshold
Bin	0	1	4395	1
Bin	1	0	2795	1

Signal:

TSEG1_DBT(1)

	From	To	Count	Threshold
Bin	0	1	3285	1
Bin	1	0	1692	1

Signal:

TSEG1_DBT(0)

	From	To	Count	Threshold
Bin	0	1	2074	1
Bin	1	0	474	1

Signal:

TSEG2_DBT(4)

	From	To	Count	Threshold
Bin	0	1	281	1
Bin	1	0	1879	1

Signal:

TSEG2_DBT(3)

	From	To	Count	Threshold
Bin	0	1	321	1
Bin	1	0	1919	1

Signal:

TSEG2_DBT(2)

	From	To	Count	Threshold
Bin	0	1	1212	1
Bin	1	0	2803	1

Signal:

TSEG2_DBT(1)

	From	To	Count	Threshold
Bin	0	1	1732	1
Bin	1	0	133	1

Signal:

TSEG2_DBT(0)

	From	To	Count	Threshold
Bin	0	1	3871	1
Bin	1	0	2271	1

Signal:

BRP_DBT(7)

	From	To	Count	Threshold
Bin	0	1	19	1
Bin	1	0	1619	1

Signal:

BRP_DBT(6)

	From	To	Count	Threshold
Bin	0	1	27	1
Bin	1	0	1627	1

Signal:

BRP_DBT(5)

	From	To	Count	Threshold
Bin	0	1	18	1
Bin	1	0	1618	1

Signal:

BRP_DBT(4)

	From	To	Count	Threshold
Bin	0	1	28	1
Bin	1	0	1628	1

Signal:

BRP_DBT(3)

	From	To	Count	Threshold
Bin	0	1	25	1
Bin	1	0	1625	1

Signal:

BRP_DBT(2)

	From	To	Count	Threshold
Bin	0	1	4843	1
Bin	1	0	3253	1

Signal:

BRP_DBT(1)

	From	To	Count	Threshold
Bin	0	1	758	1
Bin	1	0	2356	1

Signal:

BRP_DBT(0)

	From	To	Count	Threshold
Bin	0	1	2600	1
Bin	1	0	4192	1

Signal:

SJW_DBT(4)

	From	To	Count	Threshold
Bin	0	1	236	1
Bin	1	0	1833	1

Signal:

SJW_DBT(3)

	From	To	Count	Threshold
Bin	0	1	275	1
Bin	1	0	1872	1

Signal:

SJW_DBT(2)

	From	To	Count	Threshold
Bin	0	1	929	1
Bin	1	0	2526	1

Signal:

SJW_DBT(1)

	From	To	Count	Threshold
Bin	0	1	2558	1
Bin	1	0	965	1

Signal:

SJW_DBT(0)

	From	To	Count	Threshold
Bin	0	1	949	1
Bin	1	0	2546	1

Signal:

SEGMENT_END

	From	To	Count	Threshold
Bin	0	1	22084411	1
Bin	1	0	22086011	1

Signal:

H_SYNC_VALID

	From	To	Count	Threshold
Bin	0	1	55365	1
Bin	1	0	56965	1

Signal:

IS_TSEG1

	From	To	Count	Threshold
Bin	0	1	11041544	1
Bin	1	0	11041536	1

Signal:

IS_TSEG2

	From	To	Count	Threshold
Bin	0	1	11035219	1
Bin	1	0	11036818	1

Signal:

RESYNC_EDGE_VALID

	From	To	Count	Threshold
Bin	0	1	795345	1
Bin	1	0	796945	1

Signal:

H_SYNC_EDGE_VALID

	From	To	Count	Threshold
Bin	0	1	55371	1
Bin	1	0	56971	1

Signal:

SEGM_COUNTER_NBT(7)

	From	To	Count	Threshold
Bin	0	1	539581	1
Bin	1	0	541181	1

Signal:

SEGM_COUNTER_NBT(6)

	From	To	Count	Threshold
Bin	0	1	891264	1
Bin	1	0	892863	1

Signal:

SEGM_COUNTER_NBT(5)

	From	To	Count	Threshold
Bin	0	1	3071222	1
Bin	1	0	3072822	1

Signal:

SEGM_COUNTER_NBT(4)

	From	To	Count	Threshold
Bin	0	1	6644766	1
Bin	1	0	6646365	1

Signal:

SEGM_COUNTER_NBT(3)

	From	To	Count	Threshold
Bin	0	1	14781650	1
Bin	1	0	14783248	1

Signal:

SEGM_COUNTER_NBT(2)

	From	To	Count	Threshold
Bin	0	1	36114069	1
Bin	1	0	36115669	1

Signal:

SEGM_COUNTER_NBT(1)

	From	To	Count	Threshold
Bin	0	1	75947170	1
Bin	1	0	75948767	1

Signal:

SEGM_COUNTER_NBT(0)

	From	To	Count	Threshold
Bin	0	1	145561048	1
Bin	1	0	145562645	1

Signal:

SEGM_COUNTER_DBT(6)

	From	To	Count	Threshold
Bin	0	1	142554	1
Bin	1	0	144154	1

Signal:

SEGM_COUNTER_DBT(5)

	From	To	Count	Threshold
Bin	0	1	246745	1
Bin	1	0	248345	1

Signal:

SEGM_COUNTER_DBT(4)

	From	To	Count	Threshold
Bin	0	1	794895	1
Bin	1	0	796495	1

Signal:

SEGM_COUNTER_DBT(3)

	From	To	Count	Threshold
Bin	0	1	4519840	1
Bin	1	0	4521440	1

Signal:

SEGM_COUNTER_DBT(2)

	From	To	Count	Threshold
Bin	0	1	12002319	1
Bin	1	0	12003919	1

Signal:

SEGM_COUNTER_DBT(1)

	From	To	Count	Threshold
Bin	0	1	22876595	1
Bin	1	0	22878195	1

Signal:

SEGM_COUNTER_DBT(0)

	From	To	Count	Threshold
Bin	0	1	42573590	1
Bin	1	0	42575190	1

Signal:

EXIT_SEGM_REQ_NBT

	From	To	Count	Threshold
Bin	0	1	15761570	1
Bin	1	0	15763169	1

Signal:

EXIT_SEGM_REQ_DBT

	From	To	Count	Threshold
Bin	0	1	10030898	1
Bin	1	0	10032498	1

Signal:

TQ_EDGE_NBT

	From	To	Count	Threshold
Bin	0	1	96725568	1
Bin	1	0	96727165	1

Signal:

TQ_EDGE_DBT

	From	To	Count	Threshold
Bin	0	1	35091299	1
Bin	1	0	35092890	1

Signal:

RX_TRIG_REQ

	From	To	Count	Threshold
Bin	0	1	22084127	1
Bin	1	0	22085727	1

Signal:

TX_TRIG_REQ

	From	To	Count	Threshold
Bin	0	1	22078288	1
Bin	1	0	22079887	1

Signal:

START_EDGE

	From	To	Count	Threshold
Bin	0	1	6481	1
Bin	1	0	8081	1

Signal:

BT_CTR_CLEAR

	From	To	Count	Threshold
Bin	0	1	22118120	1
Bin	1	0	22119720	1

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.PRESCALER_INST

File: /__w/ctu-can-regression/ctu-can-regression/src/prescaler/prescaler.vhd

Sub-instances:

Current Instance:

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