NVC code coverage report

Signal assignment statement on line 608:

608:    test_probe.rx_trigger_nbs <= pc_rx_trigger; 
Count: 20722828
Threshold: 1

---

Signal assignment statement on line 609:

609:    test_probe.rx_trigger_wbs <= rx_triggers(0); 
Count: 22767676
Threshold: 1

---

Signal assignment statement on line 610:

610:    test_probe.tx_trigger <= tx_trigger; 
Count: 22785355
Threshold: 1

---

Signal assignment statement on line 624:

624:    res_n_out <= res_n_sync; 
Count: 15953
Threshold: 1

Port:

 CLK_SYS

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 RES_N

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 SCAN_ENABLE

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 DATA_IN

	Element	From	To	Count	Threshold	Excluded due to
Bin	(31)	0	1	0	1	Exclude file
Bin	(31)	1	0	0	1	Exclude file
Bin	(30)	0	1	0	1	Exclude file
Bin	(30)	1	0	0	1	Exclude file
Bin	(29)	0	1	0	1	Exclude file
Bin	(29)	1	0	0	1	Exclude file
Bin	(28)	0	1	0	1	Exclude file
Bin	(28)	1	0	0	1	Exclude file
Bin	(27)	0	1	0	1	Exclude file
Bin	(27)	1	0	0	1	Exclude file
Bin	(26)	0	1	0	1	Exclude file
Bin	(26)	1	0	0	1	Exclude file
Bin	(25)	0	1	0	1	Exclude file
Bin	(25)	1	0	0	1	Exclude file
Bin	(24)	0	1	0	1	Exclude file
Bin	(24)	1	0	0	1	Exclude file
Bin	(23)	0	1	0	1	Exclude file
Bin	(23)	1	0	0	1	Exclude file
Bin	(22)	0	1	0	1	Exclude file
Bin	(22)	1	0	0	1	Exclude file
Bin	(21)	0	1	0	1	Exclude file
Bin	(21)	1	0	0	1	Exclude file
Bin	(20)	0	1	0	1	Exclude file
Bin	(20)	1	0	0	1	Exclude file
Bin	(19)	0	1	0	1	Exclude file
Bin	(19)	1	0	0	1	Exclude file
Bin	(18)	0	1	0	1	Exclude file
Bin	(18)	1	0	0	1	Exclude file
Bin	(17)	0	1	0	1	Exclude file
Bin	(17)	1	0	0	1	Exclude file
Bin	(16)	0	1	0	1	Exclude file
Bin	(16)	1	0	0	1	Exclude file
Bin	(15)	0	1	0	1	Exclude file
Bin	(15)	1	0	0	1	Exclude file
Bin	(14)	0	1	0	1	Exclude file
Bin	(14)	1	0	0	1	Exclude file
Bin	(13)	0	1	0	1	Exclude file
Bin	(13)	1	0	0	1	Exclude file
Bin	(12)	0	1	0	1	Exclude file
Bin	(12)	1	0	0	1	Exclude file
Bin	(11)	0	1	0	1	Exclude file
Bin	(11)	1	0	0	1	Exclude file
Bin	(10)	0	1	0	1	Exclude file
Bin	(10)	1	0	0	1	Exclude file
Bin	(9)	0	1	0	1	Exclude file
Bin	(9)	1	0	0	1	Exclude file
Bin	(8)	0	1	0	1	Exclude file
Bin	(8)	1	0	0	1	Exclude file
Bin	(7)	0	1	0	1	Exclude file
Bin	(7)	1	0	0	1	Exclude file
Bin	(6)	0	1	0	1	Exclude file
Bin	(6)	1	0	0	1	Exclude file
Bin	(5)	0	1	0	1	Exclude file
Bin	(5)	1	0	0	1	Exclude file
Bin	(4)	0	1	0	1	Exclude file
Bin	(4)	1	0	0	1	Exclude file
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

---

Port:

 ADRESS

	Element	From	To	Count	Threshold	Excluded due to
Bin	(15)	0	1	0	1	Exclude file
Bin	(15)	1	0	0	1	Exclude file
Bin	(14)	0	1	0	1	Exclude file
Bin	(14)	1	0	0	1	Exclude file
Bin	(13)	0	1	0	1	Exclude file
Bin	(13)	1	0	0	1	Exclude file
Bin	(12)	0	1	0	1	Exclude file
Bin	(12)	1	0	0	1	Exclude file
Bin	(11)	0	1	0	1	Exclude file
Bin	(11)	1	0	0	1	Exclude file
Bin	(10)	0	1	0	1	Exclude file
Bin	(10)	1	0	0	1	Exclude file
Bin	(9)	0	1	0	1	Exclude file
Bin	(9)	1	0	0	1	Exclude file
Bin	(8)	0	1	0	1	Exclude file
Bin	(8)	1	0	0	1	Exclude file
Bin	(7)	0	1	0	1	Exclude file
Bin	(7)	1	0	0	1	Exclude file
Bin	(6)	0	1	0	1	Exclude file
Bin	(6)	1	0	0	1	Exclude file
Bin	(5)	0	1	0	1	Exclude file
Bin	(5)	1	0	0	1	Exclude file
Bin	(4)	0	1	0	1	Exclude file
Bin	(4)	1	0	0	1	Exclude file
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

---

Port:

 SCS

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 SRD

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 SWR

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 SBE

	Element	From	To	Count	Threshold	Excluded due to
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

---

Port:

 CAN_RX

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 TIMESTAMP

	Element	From	To	Count	Threshold	Excluded due to
Bin	(63)	0	1	0	1	Exclude file
Bin	(63)	1	0	0	1	Exclude file
Bin	(62)	0	1	0	1	Exclude file
Bin	(62)	1	0	0	1	Exclude file
Bin	(61)	0	1	0	1	Exclude file
Bin	(61)	1	0	0	1	Exclude file
Bin	(60)	0	1	0	1	Exclude file
Bin	(60)	1	0	0	1	Exclude file
Bin	(59)	0	1	0	1	Exclude file
Bin	(59)	1	0	0	1	Exclude file
Bin	(58)	0	1	0	1	Exclude file
Bin	(58)	1	0	0	1	Exclude file
Bin	(57)	0	1	0	1	Exclude file
Bin	(57)	1	0	0	1	Exclude file
Bin	(56)	0	1	0	1	Exclude file
Bin	(56)	1	0	0	1	Exclude file
Bin	(55)	0	1	0	1	Exclude file
Bin	(55)	1	0	0	1	Exclude file
Bin	(54)	0	1	0	1	Exclude file
Bin	(54)	1	0	0	1	Exclude file
Bin	(53)	0	1	0	1	Exclude file
Bin	(53)	1	0	0	1	Exclude file
Bin	(52)	0	1	0	1	Exclude file
Bin	(52)	1	0	0	1	Exclude file
Bin	(51)	0	1	0	1	Exclude file
Bin	(51)	1	0	0	1	Exclude file
Bin	(50)	0	1	0	1	Exclude file
Bin	(50)	1	0	0	1	Exclude file
Bin	(49)	0	1	0	1	Exclude file
Bin	(49)	1	0	0	1	Exclude file
Bin	(48)	0	1	0	1	Exclude file
Bin	(48)	1	0	0	1	Exclude file
Bin	(47)	0	1	0	1	Exclude file
Bin	(47)	1	0	0	1	Exclude file
Bin	(46)	0	1	0	1	Exclude file
Bin	(46)	1	0	0	1	Exclude file
Bin	(45)	0	1	0	1	Exclude file
Bin	(45)	1	0	0	1	Exclude file
Bin	(44)	0	1	0	1	Exclude file
Bin	(44)	1	0	0	1	Exclude file
Bin	(43)	0	1	0	1	Exclude file
Bin	(43)	1	0	0	1	Exclude file
Bin	(42)	0	1	0	1	Exclude file
Bin	(42)	1	0	0	1	Exclude file
Bin	(41)	0	1	0	1	Exclude file
Bin	(41)	1	0	0	1	Exclude file
Bin	(40)	0	1	0	1	Exclude file
Bin	(40)	1	0	0	1	Exclude file
Bin	(39)	0	1	0	1	Exclude file
Bin	(39)	1	0	0	1	Exclude file
Bin	(38)	0	1	0	1	Exclude file
Bin	(38)	1	0	0	1	Exclude file
Bin	(37)	0	1	0	1	Exclude file
Bin	(37)	1	0	0	1	Exclude file
Bin	(36)	0	1	0	1	Exclude file
Bin	(36)	1	0	0	1	Exclude file
Bin	(35)	0	1	0	1	Exclude file
Bin	(35)	1	0	0	1	Exclude file
Bin	(34)	0	1	0	1	Exclude file
Bin	(34)	1	0	0	1	Exclude file
Bin	(33)	0	1	0	1	Exclude file
Bin	(33)	1	0	0	1	Exclude file
Bin	(32)	0	1	0	1	Exclude file
Bin	(32)	1	0	0	1	Exclude file
Bin	(31)	0	1	0	1	Exclude file
Bin	(31)	1	0	0	1	Exclude file
Bin	(30)	0	1	0	1	Exclude file
Bin	(30)	1	0	0	1	Exclude file
Bin	(29)	0	1	0	1	Exclude file
Bin	(29)	1	0	0	1	Exclude file
Bin	(28)	0	1	0	1	Exclude file
Bin	(28)	1	0	0	1	Exclude file
Bin	(27)	0	1	0	1	Exclude file
Bin	(27)	1	0	0	1	Exclude file
Bin	(26)	0	1	0	1	Exclude file
Bin	(26)	1	0	0	1	Exclude file
Bin	(25)	0	1	0	1	Exclude file
Bin	(25)	1	0	0	1	Exclude file
Bin	(24)	0	1	0	1	Exclude file
Bin	(24)	1	0	0	1	Exclude file
Bin	(23)	0	1	0	1	Exclude file
Bin	(23)	1	0	0	1	Exclude file
Bin	(22)	0	1	0	1	Exclude file
Bin	(22)	1	0	0	1	Exclude file
Bin	(21)	0	1	0	1	Exclude file
Bin	(21)	1	0	0	1	Exclude file
Bin	(20)	0	1	0	1	Exclude file
Bin	(20)	1	0	0	1	Exclude file
Bin	(19)	0	1	0	1	Exclude file
Bin	(19)	1	0	0	1	Exclude file
Bin	(18)	0	1	0	1	Exclude file
Bin	(18)	1	0	0	1	Exclude file
Bin	(17)	0	1	0	1	Exclude file
Bin	(17)	1	0	0	1	Exclude file
Bin	(16)	0	1	0	1	Exclude file
Bin	(16)	1	0	0	1	Exclude file
Bin	(15)	0	1	0	1	Exclude file
Bin	(15)	1	0	0	1	Exclude file
Bin	(14)	0	1	0	1	Exclude file
Bin	(14)	1	0	0	1	Exclude file
Bin	(13)	0	1	0	1	Exclude file
Bin	(13)	1	0	0	1	Exclude file
Bin	(12)	0	1	0	1	Exclude file
Bin	(12)	1	0	0	1	Exclude file
Bin	(11)	0	1	0	1	Exclude file
Bin	(11)	1	0	0	1	Exclude file
Bin	(10)	0	1	0	1	Exclude file
Bin	(10)	1	0	0	1	Exclude file
Bin	(9)	0	1	0	1	Exclude file
Bin	(9)	1	0	0	1	Exclude file
Bin	(8)	0	1	0	1	Exclude file
Bin	(8)	1	0	0	1	Exclude file
Bin	(7)	0	1	0	1	Exclude file
Bin	(7)	1	0	0	1	Exclude file
Bin	(6)	0	1	0	1	Exclude file
Bin	(6)	1	0	0	1	Exclude file
Bin	(5)	0	1	0	1	Exclude file
Bin	(5)	1	0	0	1	Exclude file
Bin	(4)	0	1	0	1	Exclude file
Bin	(4)	1	0	0	1	Exclude file
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

Port:

 RES_N_OUT

	From	To	Count	Threshold
Bin	0	1	7176	1
Bin	1	0	7176	1

---

Port:

 DATA_OUT

	Element	From	To	Count	Threshold
Bin	(31)	0	1	23290	1
Bin	(31)	1	0	24891	1
Bin	(30)	0	1	24560	1
Bin	(30)	1	0	26161	1
Bin	(29)	0	1	24277	1
Bin	(29)	1	0	25878	1
Bin	(28)	0	1	31636	1
Bin	(28)	1	0	33237	1
Bin	(27)	0	1	34459	1
Bin	(27)	1	0	36060	1
Bin	(26)	0	1	31727	1
Bin	(26)	1	0	33328	1
Bin	(25)	0	1	51413	1
Bin	(25)	1	0	53014	1
Bin	(24)	0	1	38847	1
Bin	(24)	1	0	40448	1
Bin	(23)	0	1	50091	1
Bin	(23)	1	0	51692	1
Bin	(22)	0	1	124214	1
Bin	(22)	1	0	125815	1
Bin	(21)	0	1	40120	1
Bin	(21)	1	0	41721	1
Bin	(20)	0	1	52872	1
Bin	(20)	1	0	54473	1
Bin	(19)	0	1	50450	1
Bin	(19)	1	0	52051	1
Bin	(18)	0	1	301783	1
Bin	(18)	1	0	303384	1
Bin	(17)	0	1	119387	1
Bin	(17)	1	0	120988	1
Bin	(16)	0	1	132923	1
Bin	(16)	1	0	134524	1
Bin	(15)	0	1	170697	1
Bin	(15)	1	0	172298	1
Bin	(14)	0	1	576961	1
Bin	(14)	1	0	578562	1
Bin	(13)	0	1	132552	1
Bin	(13)	1	0	134153	1
Bin	(12)	0	1	193711	1
Bin	(12)	1	0	195312	1
Bin	(11)	0	1	146760	1
Bin	(11)	1	0	148361	1
Bin	(10)	0	1	1547924	1
Bin	(10)	1	0	1549525	1
Bin	(9)	0	1	360406	1
Bin	(9)	1	0	362007	1
Bin	(8)	0	1	3213616	1
Bin	(8)	1	0	3215217	1
Bin	(7)	0	1	969991	1
Bin	(7)	1	0	971592	1
Bin	(6)	0	1	3009906	1
Bin	(6)	1	0	3011507	1
Bin	(5)	0	1	1606600	1
Bin	(5)	1	0	1608201	1
Bin	(4)	0	1	3699908	1
Bin	(4)	1	0	3701509	1
Bin	(3)	0	1	4323474	1
Bin	(3)	1	0	4325075	1
Bin	(2)	0	1	642997	1
Bin	(2)	1	0	644597	1
Bin	(1)	0	1	1590029	1
Bin	(1)	1	0	1591629	1
Bin	(0)	0	1	1958762	1
Bin	(0)	1	0	1960362	1

---

Port:

 INT

	From	To	Count	Threshold
Bin	0	1	1840	1
Bin	1	0	1840	1

---

Port:

 CAN_TX

	From	To	Count	Threshold
Bin	0	1	633797	1
Bin	1	0	632200	1

---

Port:

 TEST_PROBE

	Element	From	To	Count	Threshold
Bin	RX_TRIGGER_NBS	0	1	10359813	1
Bin	RX_TRIGGER_NBS	1	0	10361414	1
Bin	RX_TRIGGER_WBS	0	1	11382237	1
Bin	RX_TRIGGER_WBS	1	0	11383838	1
Bin	TX_TRIGGER	0	1	11391077	1
Bin	TX_TRIGGER	1	0	11392677	1

---

Signal:

 RES_N_SYNC

	From	To	Count	Threshold
Bin	0	1	7176	1
Bin	1	0	7176	1

---

Signal:

 RES_CORE_N

	From	To	Count	Threshold
Bin	0	1	8084	1
Bin	1	0	8072	1

---

Signal:

 RES_SOFT_N

	From	To	Count	Threshold
Bin	0	1	9645	1
Bin	1	0	8044	1

---

Signal:

 SP_CONTROL

	Element	From	To	Count	Threshold
Bin	(1)	0	1	3434	1
Bin	(1)	1	0	5035	1
Bin	(0)	0	1	25858	1
Bin	(0)	1	0	27459	1

---

Signal:

 RX_FULL

	From	To	Count	Threshold
Bin	0	1	20	1
Bin	1	0	1621	1

---

Signal:

 RX_EMPTY

	From	To	Count	Threshold
Bin	0	1	8999	1
Bin	1	0	9001	1

---

Signal:

 RX_FRAME_COUNT

	Element	From	To	Count	Threshold
Bin	(10)	0	1	4	1
Bin	(10)	1	0	169	1
Bin	(9)	0	1	5	1
Bin	(9)	1	0	170	1
Bin	(8)	0	1	10	1
Bin	(8)	1	0	175	1
Bin	(7)	0	1	21	1
Bin	(7)	1	0	186	1
Bin	(6)	0	1	43	1
Bin	(6)	1	0	208	1
Bin	(5)	0	1	98	1
Bin	(5)	1	0	758	1
Bin	(4)	0	1	195	1
Bin	(4)	1	0	855	1
Bin	(3)	0	1	404	1
Bin	(3)	1	0	2005	1
Bin	(2)	0	1	846	1
Bin	(2)	1	0	2447	1
Bin	(1)	0	1	2538	1
Bin	(1)	1	0	4139	1
Bin	(0)	0	1	11478	1
Bin	(0)	1	0	13077	1

---

Signal:

 RX_MEM_FREE

	Element	From	To	Count	Threshold
Bin	(12)	0	1	1239	1
Bin	(12)	1	0	1074	1
Bin	(11)	0	1	1076	1
Bin	(11)	1	0	1241	1
Bin	(10)	0	1	1083	1
Bin	(10)	1	0	1248	1
Bin	(9)	0	1	1097	1
Bin	(9)	1	0	1262	1
Bin	(8)	0	1	1125	1
Bin	(8)	1	0	1290	1
Bin	(7)	0	1	4532	1
Bin	(7)	1	0	4202	1
Bin	(6)	0	1	4159	1
Bin	(6)	1	0	4819	1
Bin	(5)	0	1	8826	1
Bin	(5)	1	0	8547	1
Bin	(4)	0	1	8414	1
Bin	(4)	1	0	10013	1
Bin	(3)	0	1	10005	1
Bin	(3)	1	0	11604	1
Bin	(2)	0	1	12209	1
Bin	(2)	1	0	13808	1
Bin	(1)	0	1	16073	1
Bin	(1)	1	0	17674	1
Bin	(0)	0	1	27447	1
Bin	(0)	1	0	29048	1

---

Signal:

 RX_READ_POINTER

	Element	From	To	Count	Threshold
Bin	(11)	0	1	2	1
Bin	(11)	1	0	167	1
Bin	(10)	0	1	5	1
Bin	(10)	1	0	170	1
Bin	(9)	0	1	11	1
Bin	(9)	1	0	176	1
Bin	(8)	0	1	21	1
Bin	(8)	1	0	186	1
Bin	(7)	0	1	41	1
Bin	(7)	1	0	206	1
Bin	(6)	0	1	205	1
Bin	(6)	1	0	865	1
Bin	(5)	0	1	443	1
Bin	(5)	1	0	1103	1
Bin	(4)	0	1	1578	1
Bin	(4)	1	0	3179	1
Bin	(3)	0	1	3184	1
Bin	(3)	1	0	4785	1
Bin	(2)	0	1	6633	1
Bin	(2)	1	0	8234	1
Bin	(1)	0	1	13003	1
Bin	(1)	1	0	14604	1
Bin	(0)	0	1	25973	1
Bin	(0)	1	0	27574	1

---

Signal:

 RX_WRITE_POINTER

	Element	From	To	Count	Threshold
Bin	(11)	0	1	5	1
Bin	(11)	1	0	170	1
Bin	(10)	0	1	11	1
Bin	(10)	1	0	176	1
Bin	(9)	0	1	23	1
Bin	(9)	1	0	188	1
Bin	(8)	0	1	45	1
Bin	(8)	1	0	210	1
Bin	(7)	0	1	89	1
Bin	(7)	1	0	254	1
Bin	(6)	0	1	311	1
Bin	(6)	1	0	971	1
Bin	(5)	0	1	669	1
Bin	(5)	1	0	1329	1
Bin	(4)	0	1	1971	1
Bin	(4)	1	0	3572	1
Bin	(3)	0	1	3777	1
Bin	(3)	1	0	5378	1
Bin	(2)	0	1	6171	1
Bin	(2)	1	0	7770	1
Bin	(1)	0	1	1881	1
Bin	(1)	1	0	3482	1
Bin	(0)	0	1	1735	1
Bin	(0)	1	0	3336	1

---

Signal:

 RX_DATA_OVERRUN

	From	To	Count	Threshold
Bin	0	1	31	1
Bin	1	0	1632	1

---

Signal:

 RX_MOF

	From	To	Count	Threshold
Bin	0	1	10937	1
Bin	1	0	10937	1

---

Signal:

 RX_PARITY_ERROR

	From	To	Count	Threshold
Bin	0	1	9	1
Bin	1	0	1610	1

---

Signal:

 TXTB_PORT_A_DATA_IN

	Element	From	To	Count	Threshold
Bin	(31)	0	1	69559	1
Bin	(31)	1	0	1039240	1
Bin	(30)	0	1	73293	1
Bin	(30)	1	0	1035506	1
Bin	(29)	0	1	73366	1
Bin	(29)	1	0	1035433	1
Bin	(28)	0	1	99117	1
Bin	(28)	1	0	1009682	1
Bin	(27)	0	1	90358	1
Bin	(27)	1	0	1018441	1
Bin	(26)	0	1	88295	1
Bin	(26)	1	0	1020504	1
Bin	(25)	0	1	93286	1
Bin	(25)	1	0	1015513	1
Bin	(24)	0	1	86136	1
Bin	(24)	1	0	1022663	1
Bin	(23)	0	1	78398	1
Bin	(23)	1	0	1030401	1
Bin	(22)	0	1	112701	1
Bin	(22)	1	0	996098	1
Bin	(21)	0	1	78143	1
Bin	(21)	1	0	1030656	1
Bin	(20)	0	1	87507	1
Bin	(20)	1	0	1021292	1
Bin	(19)	0	1	117342	1
Bin	(19)	1	0	991457	1
Bin	(18)	0	1	134409	1
Bin	(18)	1	0	974390	1
Bin	(17)	0	1	128234	1
Bin	(17)	1	0	980565	1
Bin	(16)	0	1	198469	1
Bin	(16)	1	0	910330	1
Bin	(15)	0	1	78983	1
Bin	(15)	1	0	1029816	1
Bin	(14)	0	1	94254	1
Bin	(14)	1	0	1014545	1
Bin	(13)	0	1	83324	1
Bin	(13)	1	0	1025475	1
Bin	(12)	0	1	86320	1
Bin	(12)	1	0	1022479	1
Bin	(11)	0	1	105643	1
Bin	(11)	1	0	1003156	1
Bin	(10)	0	1	127120	1
Bin	(10)	1	0	981679	1
Bin	(9)	0	1	181819	1
Bin	(9)	1	0	926980	1
Bin	(8)	0	1	157890	1
Bin	(8)	1	0	950909	1
Bin	(7)	0	1	133793	1
Bin	(7)	1	0	975006	1
Bin	(6)	0	1	115658	1
Bin	(6)	1	0	993141	1
Bin	(5)	0	1	109105	1
Bin	(5)	1	0	999694	1
Bin	(4)	0	1	169955	1
Bin	(4)	1	0	938844	1
Bin	(3)	0	1	147742	1
Bin	(3)	1	0	961057	1
Bin	(2)	0	1	172490	1
Bin	(2)	1	0	936309	1
Bin	(1)	0	1	244111	1
Bin	(1)	1	0	864688	1
Bin	(0)	0	1	204311	1
Bin	(0)	1	0	904488	1

---

Signal:

 TXTB_PORT_A_PARITY

	From	To	Count	Threshold
Bin	0	1	649047	1
Bin	1	0	155051	1

---

Signal:

 TXTB_PORT_A_ADDRESS

	Element	From	To	Count	Threshold
Bin	(4)	0	1	328666	1
Bin	(4)	1	0	27198447	1
Bin	(3)	0	1	588207	1
Bin	(3)	1	0	26938906	1
Bin	(2)	0	1	445850	1
Bin	(2)	1	0	27081263	1
Bin	(1)	0	1	26740027	1
Bin	(1)	1	0	787086	1
Bin	(0)	0	1	17592114	1
Bin	(0)	1	0	9934999	1

---

Signal:

 TXTB_PORT_A_CS

	Element	From	To	Count	Threshold
Bin	(7)	0	1	11139	1
Bin	(7)	1	0	185020	1
Bin	(6)	0	1	11345	1
Bin	(6)	1	0	184814	1
Bin	(5)	0	1	11686	1
Bin	(5)	1	0	184473	1
Bin	(4)	0	1	11397	1
Bin	(4)	1	0	184762	1
Bin	(3)	0	1	45314	1
Bin	(3)	1	0	469970	1
Bin	(2)	0	1	45635	1
Bin	(2)	1	0	469649	1
Bin	(1)	0	1	128057	1
Bin	(1)	1	0	727220	1
Bin	(0)	0	1	162265	1
Bin	(0)	1	0	693012	1

---

Signal:

 TXTB_PORT_A_BE

	Element	From	To	Count	Threshold
Bin	(3)	0	1	27488021	1
Bin	(3)	1	0	37491	1
Bin	(2)	0	1	27488403	1
Bin	(2)	1	0	37109	1
Bin	(1)	0	1	27389228	1
Bin	(1)	1	0	136284	1
Bin	(0)	0	1	27390472	1
Bin	(0)	1	0	135040	1

---

Signal:

 TXTB_STATE

	Element	From	To	Count	Threshold
Bin	(7)(3)	0	1	9110	1
Bin	(7)(3)	1	0	231	1
Bin	(7)(2)	0	1	420	1
Bin	(7)(2)	1	0	9184	1
Bin	(7)(1)	0	1	273	1
Bin	(7)(1)	1	0	8452	1
Bin	(7)(0)	0	1	343	1
Bin	(7)(0)	1	0	7711	1
Bin	(6)(3)	0	1	8550	1
Bin	(6)(3)	1	0	255	1
Bin	(6)(2)	0	1	814	1
Bin	(6)(2)	1	0	8591	1
Bin	(6)(1)	0	1	335	1
Bin	(6)(1)	1	0	8249	1
Bin	(6)(0)	0	1	376	1
Bin	(6)(0)	1	0	7500	1
Bin	(5)(3)	0	1	8198	1
Bin	(5)(3)	1	0	165	1
Bin	(5)(2)	0	1	1285	1
Bin	(5)(2)	1	0	8316	1
Bin	(5)(1)	0	1	489	1
Bin	(5)(1)	1	0	7853	1
Bin	(5)(0)	0	1	329	1
Bin	(5)(0)	1	0	6962	1
Bin	(4)(3)	0	1	7715	1
Bin	(4)(3)	1	0	229	1
Bin	(4)(2)	0	1	1608	1
Bin	(4)(2)	1	0	7744	1
Bin	(4)(1)	0	1	526	1
Bin	(4)(1)	1	0	7406	1
Bin	(4)(0)	0	1	373	1
Bin	(4)(0)	1	0	6579	1
Bin	(3)(3)	0	1	28058	1
Bin	(3)(3)	1	0	809	1
Bin	(3)(2)	0	1	3211	1
Bin	(3)(2)	1	0	28416	1
Bin	(3)(1)	0	1	1502	1
Bin	(3)(1)	1	0	26818	1
Bin	(3)(0)	0	1	1296	1
Bin	(3)(0)	1	0	24530	1
Bin	(2)(3)	0	1	26415	1
Bin	(2)(3)	1	0	659	1
Bin	(2)(2)	0	1	4699	1
Bin	(2)(2)	1	0	26563	1
Bin	(2)(1)	0	1	1695	1
Bin	(2)(1)	1	0	26635	1
Bin	(2)(0)	0	1	1212	1
Bin	(2)(0)	1	0	24460	1
Bin	(1)(3)	0	1	38380	1
Bin	(1)(3)	1	0	3385	1
Bin	(1)(2)	0	1	23365	1
Bin	(1)(2)	1	0	42946	1
Bin	(1)(1)	0	1	9872	1
Bin	(1)(1)	1	0	43412	1
Bin	(1)(0)	0	1	9916	1
Bin	(1)(0)	1	0	34129	1
Bin	(0)(3)	0	1	15528	1
Bin	(0)(3)	1	0	3769	1
Bin	(0)(2)	0	1	33858	1
Bin	(0)(2)	1	0	24797	1
Bin	(0)(1)	0	1	16238	1
Bin	(0)(1)	1	0	29631	1
Bin	(0)(0)	0	1	15953	1
Bin	(0)(0)	1	0	18737	1

---

Signal:

 TXTB_IS_BB

	Element	From	To	Count	Threshold
Bin	(3)	0	1	7	1
Bin	(3)	1	0	234	1
Bin	(2)	0	1	6	1
Bin	(2)	1	0	235	1
Bin	(1)	0	1	39	1
Bin	(1)	1	0	875	1
Bin	(0)	0	1	87	1
Bin	(0)	1	0	1792	1

---

Signal:

 REC_IDENT

	Element	From	To	Count	Threshold
Bin	(28)	0	1	37958	1
Bin	(28)	1	0	31904	1
Bin	(27)	0	1	23451	1
Bin	(27)	1	0	18485	1
Bin	(26)	0	1	35197	1
Bin	(26)	1	0	30734	1
Bin	(25)	0	1	23455	1
Bin	(25)	1	0	18907	1
Bin	(24)	0	1	35024	1
Bin	(24)	1	0	30140	1
Bin	(23)	0	1	28038	1
Bin	(23)	1	0	22073	1
Bin	(22)	0	1	38177	1
Bin	(22)	1	0	32473	1
Bin	(21)	0	1	26666	1
Bin	(21)	1	0	21346	1
Bin	(20)	0	1	34372	1
Bin	(20)	1	0	29680	1
Bin	(19)	0	1	26814	1
Bin	(19)	1	0	21432	1
Bin	(18)	0	1	36475	1
Bin	(18)	1	0	31537	1
Bin	(17)	0	1	6354	1
Bin	(17)	1	0	73134	1
Bin	(16)	0	1	7666	1
Bin	(16)	1	0	76181	1
Bin	(15)	0	1	8076	1
Bin	(15)	1	0	76311	1
Bin	(14)	0	1	8012	1
Bin	(14)	1	0	76870	1
Bin	(13)	0	1	6090	1
Bin	(13)	1	0	73160	1
Bin	(12)	0	1	6063	1
Bin	(12)	1	0	72708	1
Bin	(11)	0	1	6784	1
Bin	(11)	1	0	74963	1
Bin	(10)	0	1	7457	1
Bin	(10)	1	0	75754	1
Bin	(9)	0	1	6222	1
Bin	(9)	1	0	72961	1
Bin	(8)	0	1	7533	1
Bin	(8)	1	0	75953	1
Bin	(7)	0	1	8151	1
Bin	(7)	1	0	77151	1
Bin	(6)	0	1	6815	1
Bin	(6)	1	0	74206	1
Bin	(5)	0	1	6928	1
Bin	(5)	1	0	74300	1
Bin	(4)	0	1	7556	1
Bin	(4)	1	0	76575	1
Bin	(3)	0	1	7327	1
Bin	(3)	1	0	75514	1
Bin	(2)	0	1	8887	1
Bin	(2)	1	0	78980	1
Bin	(1)	0	1	7701	1
Bin	(1)	1	0	76297	1
Bin	(0)	0	1	6473	1
Bin	(0)	1	0	73851	1

---

Signal:

 REC_DLC

	Element	From	To	Count	Threshold
Bin	(3)	0	1	21342	1
Bin	(3)	1	0	59508	1
Bin	(2)	0	1	22108	1
Bin	(2)	1	0	28071	1
Bin	(1)	0	1	21797	1
Bin	(1)	1	0	27434	1
Bin	(0)	0	1	28542	1
Bin	(0)	1	0	34415	1

---

Signal:

 REC_IDENT_TYPE

	From	To	Count	Threshold
Bin	0	1	17628	1
Bin	1	0	19226	1

---

Signal:

 REC_FRAME_TYPE

	From	To	Count	Threshold
Bin	0	1	28884	1
Bin	1	0	30480	1

---

Signal:

 REC_LBPF

	From	To	Count	Threshold
Bin	0	1	180	1
Bin	1	0	1781	1

---

Signal:

 REC_IS_RTR

	From	To	Count	Threshold
Bin	0	1	21837	1
Bin	1	0	23436	1

---

Signal:

 REC_BRS

	From	To	Count	Threshold
Bin	0	1	20399	1
Bin	1	0	21995	1

---

Signal:

 REC_ESI

	From	To	Count	Threshold
Bin	0	1	2524	1
Bin	1	0	4123	1

---

Signal:

 REC_IVLD

	From	To	Count	Threshold
Bin	0	1	50926	1
Bin	1	0	52518	1

---

Signal:

 STORE_DATA_WORD

	Element	From	To	Count	Threshold
Bin	(31)	0	1	240582	1
Bin	(31)	1	0	242180	1
Bin	(30)	0	1	247304	1
Bin	(30)	1	0	248901	1
Bin	(29)	0	1	258514	1
Bin	(29)	1	0	260108	1
Bin	(28)	0	1	265752	1
Bin	(28)	1	0	267351	1
Bin	(27)	0	1	276396	1
Bin	(27)	1	0	277993	1
Bin	(26)	0	1	284428	1
Bin	(26)	1	0	286025	1
Bin	(25)	0	1	292258	1
Bin	(25)	1	0	293853	1
Bin	(24)	0	1	300482	1
Bin	(24)	1	0	302081	1
Bin	(23)	0	1	288578	1
Bin	(23)	1	0	290176	1
Bin	(22)	0	1	295744	1
Bin	(22)	1	0	297345	1
Bin	(21)	0	1	304275	1
Bin	(21)	1	0	305870	1
Bin	(20)	0	1	311864	1
Bin	(20)	1	0	313464	1
Bin	(19)	0	1	322864	1
Bin	(19)	1	0	324460	1
Bin	(18)	0	1	331611	1
Bin	(18)	1	0	333207	1
Bin	(17)	0	1	337780	1
Bin	(17)	1	0	339379	1
Bin	(16)	0	1	344233	1
Bin	(16)	1	0	345833	1
Bin	(15)	0	1	385458	1
Bin	(15)	1	0	387057	1
Bin	(14)	0	1	399109	1
Bin	(14)	1	0	400706	1
Bin	(13)	0	1	408432	1
Bin	(13)	1	0	410028	1
Bin	(12)	0	1	419557	1
Bin	(12)	1	0	421153	1
Bin	(11)	0	1	431918	1
Bin	(11)	1	0	433513	1
Bin	(10)	0	1	443737	1
Bin	(10)	1	0	445331	1
Bin	(9)	0	1	453415	1
Bin	(9)	1	0	455012	1
Bin	(8)	0	1	465347	1
Bin	(8)	1	0	466943	1
Bin	(7)	0	1	511984	1
Bin	(7)	1	0	513578	1
Bin	(6)	0	1	523026	1
Bin	(6)	1	0	524619	1
Bin	(5)	0	1	534226	1
Bin	(5)	1	0	535822	1
Bin	(4)	0	1	544724	1
Bin	(4)	1	0	546318	1
Bin	(3)	0	1	554817	1
Bin	(3)	1	0	556410	1
Bin	(2)	0	1	566357	1
Bin	(2)	1	0	567950	1
Bin	(1)	0	1	577627	1
Bin	(1)	1	0	579219	1
Bin	(0)	0	1	586771	1
Bin	(0)	1	0	588363	1

---

Signal:

 SOF_PULSE

	From	To	Count	Threshold
Bin	0	1	80686	1
Bin	1	0	82287	1

---

Signal:

 STORE_METADATA

	From	To	Count	Threshold
Bin	0	1	28539	1
Bin	1	0	30140	1

---

Signal:

 STORE_DATA

	From	To	Count	Threshold
Bin	0	1	88436	1
Bin	1	0	90037	1

---

Signal:

 REC_VALID

	From	To	Count	Threshold
Bin	0	1	15178	1
Bin	1	0	16779	1

---

Signal:

 REC_ABORT

	From	To	Count	Threshold
Bin	0	1	31302	1
Bin	1	0	32903	1

---

Signal:

 STORE_METADATA_F

	From	To	Count	Threshold
Bin	0	1	26419	1
Bin	1	0	28020	1

---

Signal:

 STORE_DATA_F

	From	To	Count	Threshold
Bin	0	1	86097	1
Bin	1	0	87698	1

---

Signal:

 REC_VALID_F

	From	To	Count	Threshold
Bin	0	1	13062	1
Bin	1	0	14663	1

---

Signal:

 REC_ABORT_F

	From	To	Count	Threshold
Bin	0	1	31298	1
Bin	1	0	32899	1

---

Signal:

 TXTB_HW_CMD_INT

	Element	From	To	Count	Threshold
Bin	(7)	0	1	149	1
Bin	(7)	1	0	5308	1
Bin	(6)	0	1	164	1
Bin	(6)	1	0	5293	1
Bin	(5)	0	1	207	1
Bin	(5)	1	0	5250	1
Bin	(4)	0	1	184	1
Bin	(4)	1	0	5273	1
Bin	(3)	0	1	715	1
Bin	(3)	1	0	18057	1
Bin	(2)	0	1	707	1
Bin	(2)	1	0	18065	1
Bin	(1)	0	1	6339	1
Bin	(1)	1	0	36696	1
Bin	(0)	0	1	12368	1
Bin	(0)	1	0	30667	1

---

Signal:

 TXTB_HW_CMD

	Element	From	To	Count	Threshold
Bin	LOCK	0	1	25275	1
Bin	LOCK	1	0	26876	1
Bin	VALID	0	1	11112	1
Bin	VALID	1	0	12713	1
Bin	ERR	0	1	4262	1
Bin	ERR	1	0	5863	1
Bin	ARBL	0	1	455	1
Bin	ARBL	1	0	2056	1
Bin	FAILED	0	1	9436	1
Bin	FAILED	1	0	11037	1

---

Signal:

 TXTB_HW_CMD_CS

	Element	From	To	Count	Threshold
Bin	(7)	0	1	72	1
Bin	(7)	1	0	867	1
Bin	(6)	0	1	74	1
Bin	(6)	1	0	865	1
Bin	(5)	0	1	72	1
Bin	(5)	1	0	867	1
Bin	(4)	0	1	77	1
Bin	(4)	1	0	862	1
Bin	(3)	0	1	363	1
Bin	(3)	1	0	2729	1
Bin	(2)	0	1	306	1
Bin	(2)	1	0	2786	1
Bin	(1)	0	1	5601	1
Bin	(1)	1	0	8382	1
Bin	(0)	0	1	7418	1
Bin	(0)	1	0	6565	1

---

Signal:

 TXTB_AVAILABLE

	Element	From	To	Count	Threshold
Bin	(7)	0	1	314	1
Bin	(7)	1	0	6516	1
Bin	(6)	0	1	322	1
Bin	(6)	1	0	6508	1
Bin	(5)	0	1	331	1
Bin	(5)	1	0	6499	1
Bin	(4)	0	1	333	1
Bin	(4)	1	0	6497	1
Bin	(3)	0	1	1291	1
Bin	(3)	1	0	21167	1
Bin	(2)	0	1	1165	1
Bin	(2)	1	0	21293	1
Bin	(1)	0	1	9518	1
Bin	(1)	1	0	44455	1
Bin	(0)	0	1	15277	1
Bin	(0)	1	0	38696	1

---

Signal:

 TXTB_ALLOW_BB

	Element	From	To	Count	Threshold
Bin	(7)	0	1	257	1
Bin	(7)	1	0	5773	1
Bin	(6)	0	1	281	1
Bin	(6)	1	0	5749	1
Bin	(5)	0	1	281	1
Bin	(5)	1	0	5749	1
Bin	(4)	0	1	289	1
Bin	(4)	1	0	5741	1
Bin	(3)	0	1	1083	1
Bin	(3)	1	0	19275	1
Bin	(2)	0	1	1004	1
Bin	(2)	1	0	19354	1
Bin	(1)	0	1	7518	1
Bin	(1)	1	0	37268	1
Bin	(0)	0	1	13338	1
Bin	(0)	1	0	31448	1

---

Signal:

 TXTB_PORT_B_DATA_OUT

	Element	From	To	Count	Threshold
Bin	(7)(31)	0	1	124	1
Bin	(7)(31)	1	0	12363	1
Bin	(7)(30)	0	1	45	1
Bin	(7)(30)	1	0	12271	1
Bin	(7)(29)	0	1	77	1
Bin	(7)(29)	1	0	12288	1
Bin	(7)(28)	0	1	256	1
Bin	(7)(28)	1	0	12928	1
Bin	(7)(27)	0	1	262	1
Bin	(7)(27)	1	0	13516	1
Bin	(7)(26)	0	1	200	1
Bin	(7)(26)	1	0	13198	1
Bin	(7)(25)	0	1	255	1
Bin	(7)(25)	1	0	13144	1
Bin	(7)(24)	0	1	223	1
Bin	(7)(24)	1	0	13053	1
Bin	(7)(23)	0	1	292	1
Bin	(7)(23)	1	0	13321	1
Bin	(7)(22)	0	1	278	1
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Bin	(0)(16)	0	1	8135	1
Bin	(0)(16)	1	0	19354	1
Bin	(0)(15)	0	1	8150	1
Bin	(0)(15)	1	0	18934	1
Bin	(0)(14)	0	1	8577	1
Bin	(0)(14)	1	0	18901	1
Bin	(0)(13)	0	1	8362	1
Bin	(0)(13)	1	0	19679	1
Bin	(0)(12)	0	1	8852	1
Bin	(0)(12)	1	0	19339	1
Bin	(0)(11)	0	1	9024	1
Bin	(0)(11)	1	0	18802	1
Bin	(0)(10)	0	1	9436	1
Bin	(0)(10)	1	0	22596	1
Bin	(0)(9)	0	1	13180	1
Bin	(0)(9)	1	0	36702	1
Bin	(0)(8)	0	1	8658	1
Bin	(0)(8)	1	0	19541	1
Bin	(0)(7)	0	1	19407	1
Bin	(0)(7)	1	0	50493	1
Bin	(0)(6)	0	1	14753	1
Bin	(0)(6)	1	0	42693	1
Bin	(0)(5)	0	1	10471	1
Bin	(0)(5)	1	0	24438	1
Bin	(0)(4)	0	1	9761	1
Bin	(0)(4)	1	0	20940	1
Bin	(0)(3)	0	1	14484	1
Bin	(0)(3)	1	0	38397	1
Bin	(0)(2)	0	1	15013	1
Bin	(0)(2)	1	0	39199	1
Bin	(0)(1)	0	1	15788	1
Bin	(0)(1)	1	0	40625	1
Bin	(0)(0)	0	1	19136	1
Bin	(0)(0)	1	0	56731	1

---

Signal:

 TXTB_PORT_B_ADDRESS

	Element	From	To	Count	Threshold
Bin	(4)	0	1	27262	1
Bin	(4)	1	0	28863	1
Bin	(3)	0	1	3825	1
Bin	(3)	1	0	5426	1
Bin	(2)	0	1	46672	1
Bin	(2)	1	0	48273	1
Bin	(1)	0	1	38173	1
Bin	(1)	1	0	38177	1
Bin	(0)	0	1	102582	1
Bin	(0)	1	0	104179	1

---

Signal:

 TXTB_PORT_B_CLK_EN

	From	To	Count	Threshold
Bin	0	1	106192	1
Bin	1	0	107793	1

---

Signal:

 TXTB_PARITY_CHECK_VALID

	From	To	Count	Threshold
Bin	0	1	183809	1
Bin	1	0	185410	1

---

Signal:

 TXTB_PARITY_MISMATCH

	Element	From	To	Count	Threshold
Bin	(7)	0	1	1867	1
Bin	(7)	1	0	1296	1
Bin	(6)	0	1	1889	1
Bin	(6)	1	0	1274	1
Bin	(5)	0	1	1752	1
Bin	(5)	1	0	1411	1
Bin	(4)	0	1	1561	1
Bin	(4)	1	0	1602	1
Bin	(3)	0	1	4228	1
Bin	(3)	1	0	4253	1
Bin	(2)	0	1	4084	1
Bin	(2)	1	0	4397	1
Bin	(1)	0	1	3086	1
Bin	(1)	1	0	6336	1
Bin	(0)	0	1	3665	1
Bin	(0)	1	0	5757	1

---

Signal:

 TXTB_PARITY_ERROR_VALID

	Element	From	To	Count	Threshold
Bin	(7)	0	1	77	1
Bin	(7)	1	0	1466	1
Bin	(6)	0	1	91	1
Bin	(6)	1	0	1452	1
Bin	(5)	0	1	91	1
Bin	(5)	1	0	1452	1
Bin	(4)	0	1	82	1
Bin	(4)	1	0	1461	1
Bin	(3)	0	1	342	1
Bin	(3)	1	0	3950	1
Bin	(2)	0	1	415	1
Bin	(2)	1	0	3877	1
Bin	(1)	0	1	307	1
Bin	(1)	1	0	4926	1
Bin	(0)	0	1	411	1
Bin	(0)	1	0	4822	1

---

Signal:

 TXTB_BB_PARITY_ERROR

	Element	From	To	Count	Threshold
Bin	(3)	0	1	22	1
Bin	(3)	1	0	419	1
Bin	(2)	0	1	38	1
Bin	(2)	1	0	403	1
Bin	(1)	0	1	166	1
Bin	(1)	1	0	1248	1
Bin	(0)	0	1	151	1
Bin	(0)	1	0	2204	1

---

Signal:

 TRAN_DLC

	Element	From	To	Count	Threshold
Bin	(3)	0	1	1588	1
Bin	(3)	1	0	3188	1
Bin	(2)	0	1	2002	1
Bin	(2)	1	0	3601	1
Bin	(1)	0	1	1972	1
Bin	(1)	1	0	3571	1
Bin	(0)	0	1	3613	1
Bin	(0)	1	0	5214	1

---

Signal:

 TRAN_IS_RTR

	From	To	Count	Threshold
Bin	0	1	1146	1
Bin	1	0	2745	1

---

Signal:

 TRAN_IDENT_TYPE

	From	To	Count	Threshold
Bin	0	1	2544	1
Bin	1	0	4144	1

---

Signal:

 TRAN_FRAME_TYPE

	From	To	Count	Threshold
Bin	0	1	2743	1
Bin	1	0	4344	1

---

Signal:

 TRAN_BRS

	From	To	Count	Threshold
Bin	0	1	1983	1
Bin	1	0	3584	1

---

Signal:

 TRAN_IDENTIFIER

	Element	From	To	Count	Threshold
Bin	(28)	0	1	3910	1
Bin	(28)	1	0	5449	1
Bin	(27)	0	1	3888	1
Bin	(27)	1	0	5508	1
Bin	(26)	0	1	3909	1
Bin	(26)	1	0	5442	1
Bin	(25)	0	1	4137	1
Bin	(25)	1	0	5757	1
Bin	(24)	0	1	3899	1
Bin	(24)	1	0	5435	1
Bin	(23)	0	1	4144	1
Bin	(23)	1	0	5757	1
Bin	(22)	0	1	3834	1
Bin	(22)	1	0	5450	1
Bin	(21)	0	1	4219	1
Bin	(21)	1	0	5769	1
Bin	(20)	0	1	3872	1
Bin	(20)	1	0	5494	1
Bin	(19)	0	1	4249	1
Bin	(19)	1	0	5796	1
Bin	(18)	0	1	3780	1
Bin	(18)	1	0	5402	1
Bin	(17)	0	1	1690	1
Bin	(17)	1	0	9492	1
Bin	(16)	0	1	1685	1
Bin	(16)	1	0	9549	1
Bin	(15)	0	1	1736	1
Bin	(15)	1	0	9638	1
Bin	(14)	0	1	1640	1
Bin	(14)	1	0	9457	1
Bin	(13)	0	1	1691	1
Bin	(13)	1	0	9563	1
Bin	(12)	0	1	1656	1
Bin	(12)	1	0	9537	1
Bin	(11)	0	1	1722	1
Bin	(11)	1	0	9686	1
Bin	(10)	0	1	1652	1
Bin	(10)	1	0	9432	1
Bin	(9)	0	1	1690	1
Bin	(9)	1	0	9552	1
Bin	(8)	0	1	1672	1
Bin	(8)	1	0	9517	1
Bin	(7)	0	1	1722	1
Bin	(7)	1	0	9503	1
Bin	(6)	0	1	1638	1
Bin	(6)	1	0	9444	1
Bin	(5)	0	1	1684	1
Bin	(5)	1	0	9459	1
Bin	(4)	0	1	1710	1
Bin	(4)	1	0	9634	1
Bin	(3)	0	1	1706	1
Bin	(3)	1	0	9610	1
Bin	(2)	0	1	1690	1
Bin	(2)	1	0	9572	1
Bin	(1)	0	1	1707	1
Bin	(1)	1	0	9621	1
Bin	(0)	0	1	1658	1
Bin	(0)	1	0	9460	1

---

Signal:

 TRAN_FRAME_TEST

	Element	From	To	Count	Threshold
Bin	FSTC	0	1	270	1
Bin	FSTC	1	0	1871	1
Bin	FCRC	0	1	100	1
Bin	FCRC	1	0	1701	1
Bin	SDLC	0	1	270	1
Bin	SDLC	1	0	1871	1
Bin	TPRM(4)	0	1	74	1
Bin	TPRM(4)	1	0	3283	1
Bin	TPRM(3)	0	1	169	1
Bin	TPRM(3)	1	0	1814	1
Bin	TPRM(2)	0	1	246	1
Bin	TPRM(2)	1	0	1891	1
Bin	TPRM(1)	0	1	458	1
Bin	TPRM(1)	1	0	2103	1
Bin	TPRM(0)	0	1	645	1
Bin	TPRM(0)	1	0	2290	1

---

Signal:

 TRAN_WORD

	Element	From	To	Count	Threshold
Bin	(31)	0	1	8376	1
Bin	(31)	1	0	9977	1
Bin	(30)	0	1	8561	1
Bin	(30)	1	0	10162	1
Bin	(29)	0	1	8142	1
Bin	(29)	1	0	9743	1
Bin	(28)	0	1	26007	1
Bin	(28)	1	0	27608	1
Bin	(27)	0	1	21693	1
Bin	(27)	1	0	23294	1
Bin	(26)	0	1	25772	1
Bin	(26)	1	0	27373	1
Bin	(25)	0	1	21893	1
Bin	(25)	1	0	23494	1
Bin	(24)	0	1	26638	1
Bin	(24)	1	0	28239	1
Bin	(23)	0	1	22559	1
Bin	(23)	1	0	24160	1
Bin	(22)	0	1	26443	1
Bin	(22)	1	0	28044	1
Bin	(21)	0	1	22115	1
Bin	(21)	1	0	23716	1
Bin	(20)	0	1	26193	1
Bin	(20)	1	0	27794	1
Bin	(19)	0	1	23117	1
Bin	(19)	1	0	24718	1
Bin	(18)	0	1	26236	1
Bin	(18)	1	0	27837	1
Bin	(17)	0	1	15043	1
Bin	(17)	1	0	16644	1
Bin	(16)	0	1	15226	1
Bin	(16)	1	0	16827	1
Bin	(15)	0	1	15010	1
Bin	(15)	1	0	16611	1
Bin	(14)	0	1	15577	1
Bin	(14)	1	0	17178	1
Bin	(13)	0	1	15548	1
Bin	(13)	1	0	17149	1
Bin	(12)	0	1	15770	1
Bin	(12)	1	0	17371	1
Bin	(11)	0	1	16048	1
Bin	(11)	1	0	17649	1
Bin	(10)	0	1	17948	1
Bin	(10)	1	0	19549	1
Bin	(9)	0	1	25142	1
Bin	(9)	1	0	26743	1
Bin	(8)	0	1	16245	1
Bin	(8)	1	0	17846	1
Bin	(7)	0	1	35636	1
Bin	(7)	1	0	37237	1
Bin	(6)	0	1	26492	1
Bin	(6)	1	0	28093	1
Bin	(5)	0	1	19634	1
Bin	(5)	1	0	21235	1
Bin	(4)	0	1	18379	1
Bin	(4)	1	0	19980	1
Bin	(3)	0	1	26281	1
Bin	(3)	1	0	27882	1
Bin	(2)	0	1	27751	1
Bin	(2)	1	0	29352	1
Bin	(1)	0	1	29032	1
Bin	(1)	1	0	30633	1
Bin	(0)	0	1	36401	1
Bin	(0)	1	0	38002	1

---

Signal:

 TRAN_FRAME_VALID

	From	To	Count	Threshold
Bin	0	1	25532	1
Bin	1	0	27133	1

---

Signal:

 TRAN_FRAME_PARITY_ERROR

	From	To	Count	Threshold
Bin	0	1	728	1
Bin	1	0	2329	1

---

Signal:

 TXTB_CHANGED

	From	To	Count	Threshold
Bin	0	1	10020	1
Bin	1	0	11621	1

---

Signal:

 TXTB_CLK_EN

	From	To	Count	Threshold
Bin	0	1	79820	1
Bin	1	0	81421	1

---

Signal:

 CURR_TXTB_INDEX

	Element	From	To	Count	Threshold
Bin	(2)	0	1	124	1
Bin	(2)	1	0	1725	1
Bin	(1)	0	1	521	1
Bin	(1)	1	0	2122	1
Bin	(0)	0	1	6025	1
Bin	(0)	1	0	7626	1

---

Signal:

 ERR_DETECTED

	From	To	Count	Threshold
Bin	0	1	124470	1
Bin	1	0	126071	1

---

Signal:

 FCS_CHANGED

	From	To	Count	Threshold
Bin	0	1	15983	1
Bin	1	0	17584	1

---

Signal:

 ERR_WARNING_LIMIT_PULSE

	From	To	Count	Threshold
Bin	0	1	3156	1
Bin	1	0	4757	1

---

Signal:

 ARBITRATION_LOST

	From	To	Count	Threshold
Bin	0	1	1171	1
Bin	1	0	2772	1

---

Signal:

 TRAN_VALID

	From	To	Count	Threshold
Bin	0	1	11112	1
Bin	1	0	12713	1

---

Signal:

 BR_SHIFTED

	From	To	Count	Threshold
Bin	0	1	47648	1
Bin	1	0	49249	1

---

Signal:

 RX_TRIGGERS

	Element	From	To	Count	Threshold
Bin	(1)	0	1	34160725	1
Bin	(1)	1	0	34163927	1
Bin	(0)	0	1	22764474	1
Bin	(0)	1	0	45558577	1

---

Signal:

 TX_TRIGGER

	From	To	Count	Threshold
Bin	0	1	11391077	1
Bin	1	0	11392677	1

---

Signal:

 SYNC_CONTROL

	Element	From	To	Count	Threshold
Bin	(1)	0	1	100230	1
Bin	(1)	1	0	100223	1
Bin	(0)	0	1	92680	1
Bin	(0)	1	0	92687	1

---

Signal:

 NO_POS_RESYNC

	From	To	Count	Threshold
Bin	0	1	632200	1
Bin	1	0	633797	1

---

Signal:

 NBT_CTRS_EN

	From	To	Count	Threshold
Bin	0	1	6483	1
Bin	1	0	8072	1

---

Signal:

 DBT_CTRS_EN

	From	To	Count	Threshold
Bin	0	1	67597	1
Bin	1	0	69198	1

---

Signal:

 TRV_DELAY

	Element	From	To	Count	Threshold
Bin	(7)	0	1	19	1
Bin	(7)	1	0	1620	1
Bin	(6)	0	1	40	1
Bin	(6)	1	0	1641	1
Bin	(5)	0	1	73	1
Bin	(5)	1	0	1674	1
Bin	(4)	0	1	86	1
Bin	(4)	1	0	1687	1
Bin	(3)	0	1	75	1
Bin	(3)	1	0	1676	1
Bin	(2)	0	1	79	1
Bin	(2)	1	0	1680	1
Bin	(1)	0	1	2145	1
Bin	(1)	1	0	3746	1
Bin	(0)	0	1	56	1
Bin	(0)	1	0	1657	1

---

Signal:

 RX_DATA_WBS

	From	To	Count	Threshold
Bin	0	1	1402528	1
Bin	1	0	1400928	1

---

Signal:

 TX_DATA_WBS

	From	To	Count	Threshold
Bin	0	1	633797	1
Bin	1	0	632200	1

---

Signal:

 SSP_RESET

	From	To	Count	Threshold
Bin	0	1	33156	1
Bin	1	0	34757	1

---

Signal:

 TRAN_DELAY_MEAS

	From	To	Count	Threshold
Bin	0	1	37191	1
Bin	1	0	38792	1

---

Signal:

 BIT_ERR

	From	To	Count	Threshold
Bin	0	1	9785	1
Bin	1	0	11386	1

---

Signal:

 BTMC_RESET

	From	To	Count	Threshold
Bin	0	1	28575	1
Bin	1	0	30176	1

---

Signal:

 DBT_MEASURE_START

	From	To	Count	Threshold
Bin	0	1	1993	1
Bin	1	0	3594	1

---

Signal:

 GEN_FIRST_SSP

	From	To	Count	Threshold
Bin	0	1	1993	1
Bin	1	0	3594	1

---

Signal:

 SYNC_EDGE

	From	To	Count	Threshold
Bin	0	1	1555192	1
Bin	1	0	1556793	1

---

Signal:

 BIT_ERR_ENABLE

	From	To	Count	Threshold
Bin	0	1	67374	1
Bin	1	0	65781	1

---

Signal:

 TQ_EDGE

	From	To	Count	Threshold
Bin	0	1	110674758	1
Bin	1	0	110676356	1

---

Signal:

 MR_CTRL_OUT

	Element	From	To	Count	Threshold
Bin	MODE_RST	0	1	868	1
Bin	MODE_RST	1	0	32879	1
Bin	MODE_BMM	0	1	15	1
Bin	MODE_BMM	1	0	1616	1
Bin	MODE_STM	0	1	160	1
Bin	MODE_STM	1	0	1761	1
Bin	MODE_AFM	0	1	68	1
Bin	MODE_AFM	1	0	1669	1
Bin	MODE_FDE	0	1	1801	1
Bin	MODE_FDE	1	0	200	1
Bin	MODE_TTTM	0	1	55	1
Bin	MODE_TTTM	1	0	1656	1
Bin	MODE_ROM	0	1	51	1
Bin	MODE_ROM	1	0	1652	1
Bin	MODE_ACF	0	1	19	1
Bin	MODE_ACF	1	0	1620	1
Bin	MODE_TSTM	0	1	1027	1
Bin	MODE_TSTM	1	0	2627	1
Bin	MODE_RXBAM	0	1	1731	1
Bin	MODE_RXBAM	1	0	130	1
Bin	MODE_TXBBM	0	1	33	1
Bin	MODE_TXBBM	1	0	1634	1
Bin	MODE_SAM	0	1	55	1
Bin	MODE_SAM	1	0	1656	1
Bin	MODE_ERFM	0	1	153	1
Bin	MODE_ERFM	1	0	1754	1
Bin	SETTINGS_RTRLE	0	1	2454	1
Bin	SETTINGS_RTRLE	1	0	4054	1
Bin	SETTINGS_RTRTH(3)	0	1	22	1
Bin	SETTINGS_RTRTH(3)	1	0	1623	1
Bin	SETTINGS_RTRTH(2)	0	1	54	1
Bin	SETTINGS_RTRTH(2)	1	0	1655	1
Bin	SETTINGS_RTRTH(1)	0	1	22	1
Bin	SETTINGS_RTRTH(1)	1	0	1623	1
Bin	SETTINGS_RTRTH(0)	0	1	59	1
Bin	SETTINGS_RTRTH(0)	1	0	1660	1
Bin	SETTINGS_ILBP	0	1	130	1
Bin	SETTINGS_ILBP	1	0	1731	1
Bin	SETTINGS_ENA	0	1	6483	1
Bin	SETTINGS_ENA	1	0	8072	1
Bin	SETTINGS_NISOFD	0	1	130	1
Bin	SETTINGS_NISOFD	1	0	1731	1
Bin	SETTINGS_PEX	0	1	72	1
Bin	SETTINGS_PEX	1	0	1673	1
Bin	SETTINGS_TBFBO	0	1	2534	1
Bin	SETTINGS_TBFBO	1	0	944	1
Bin	SETTINGS_FDRF	0	1	4	1
Bin	SETTINGS_FDRF	1	0	1605	1
Bin	SETTINGS_PCHKE	0	1	112	1
Bin	SETTINGS_PCHKE	1	0	1713	1
Bin	COMMAND_RXRPMV	0	1	25	1
Bin	COMMAND_RXRPMV	1	0	3068	1
Bin	COMMAND_RRB	0	1	460	1
Bin	COMMAND_RRB	1	0	3068	1
Bin	COMMAND_CDO	0	1	20	1
Bin	COMMAND_CDO	1	0	3068	1
Bin	COMMAND_ERCRST	0	1	170	1
Bin	COMMAND_ERCRST	1	0	3068	1
Bin	COMMAND_RXFCRST	0	1	124	1
Bin	COMMAND_RXFCRST	1	0	3068	1
Bin	COMMAND_TXFCRST	0	1	124	1
Bin	COMMAND_TXFCRST	1	0	3068	1
Bin	COMMAND_CPEXS	0	1	60	1
Bin	COMMAND_CPEXS	1	0	3068	1
Bin	COMMAND_CRXPE	0	1	40	1
Bin	COMMAND_CRXPE	1	0	3068	1
Bin	COMMAND_CTXPE	0	1	440	1
Bin	COMMAND_CTXPE	1	0	3068	1
Bin	COMMAND_CTXDPE	0	1	40	1
Bin	COMMAND_CTXDPE	1	0	3068	1
Bin	INT_STAT_RXI	0	1	40	1
Bin	INT_STAT_RXI	1	0	1748	1
Bin	INT_STAT_TXI	0	1	42	1
Bin	INT_STAT_TXI	1	0	1748	1
Bin	INT_STAT_EWLI	0	1	30	1
Bin	INT_STAT_EWLI	1	0	1748	1
Bin	INT_STAT_DOI	0	1	16	1
Bin	INT_STAT_DOI	1	0	1748	1
Bin	INT_STAT_FCSI	0	1	80	1
Bin	INT_STAT_FCSI	1	0	1748	1
Bin	INT_STAT_ALI	0	1	5	1
Bin	INT_STAT_ALI	1	0	1748	1
Bin	INT_STAT_BEI	0	1	15	1
Bin	INT_STAT_BEI	1	0	1748	1
Bin	INT_STAT_OFI	0	1	5	1
Bin	INT_STAT_OFI	1	0	1748	1
Bin	INT_STAT_RXFI	0	1	15	1
Bin	INT_STAT_RXFI	1	0	1748	1
Bin	INT_STAT_BSI	0	1	34	1
Bin	INT_STAT_BSI	1	0	1748	1
Bin	INT_STAT_RBNEI	0	1	50	1
Bin	INT_STAT_RBNEI	1	0	1748	1
Bin	INT_STAT_TXBHCI	0	1	52	1
Bin	INT_STAT_TXBHCI	1	0	1748	1
Bin	INT_ENA_SET_INT_ENA_SET(11)	0	1	66	1
Bin	INT_ENA_SET_INT_ENA_SET(11)	1	0	2373	1
Bin	INT_ENA_SET_INT_ENA_SET(10)	0	1	30	1
Bin	INT_ENA_SET_INT_ENA_SET(10)	1	0	2409	1
Bin	INT_ENA_SET_INT_ENA_SET(9)	0	1	50	1
Bin	INT_ENA_SET_INT_ENA_SET(9)	1	0	2389	1
Bin	INT_ENA_SET_INT_ENA_SET(8)	0	1	15	1
Bin	INT_ENA_SET_INT_ENA_SET(8)	1	0	2424	1
Bin	INT_ENA_SET_INT_ENA_SET(7)	0	1	15	1
Bin	INT_ENA_SET_INT_ENA_SET(7)	1	0	2424	1
Bin	INT_ENA_SET_INT_ENA_SET(6)	0	1	15	1
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Bin	FILTER_A_VAL_BIT_VAL_A_VAL(20)	0	1	763	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(20)	1	0	2364	1
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Bin	FILTER_A_VAL_BIT_VAL_A_VAL(17)	0	1	395	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(17)	1	0	1996	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(16)	0	1	429	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(16)	1	0	2030	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(15)	0	1	403	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(15)	1	0	2004	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(14)	0	1	405	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(14)	1	0	2006	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(13)	0	1	415	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(13)	1	0	2016	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(12)	0	1	405	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(12)	1	0	2006	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(11)	0	1	415	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(11)	1	0	2016	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(10)	0	1	413	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(10)	1	0	2014	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(9)	0	1	397	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(9)	1	0	1998	1
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Bin	FILTER_A_VAL_BIT_VAL_A_VAL(8)	1	0	1999	1
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Bin	FILTER_A_VAL_BIT_VAL_A_VAL(7)	1	0	2003	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(6)	0	1	394	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(6)	1	0	1995	1
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Bin	FILTER_A_VAL_BIT_VAL_A_VAL(5)	1	0	2006	1
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Bin	FILTER_A_VAL_BIT_VAL_A_VAL(4)	1	0	2022	1
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Bin	FILTER_A_VAL_BIT_VAL_A_VAL(3)	1	0	1997	1
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Bin	FILTER_A_VAL_BIT_VAL_A_VAL(2)	1	0	2024	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(1)	0	1	378	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(1)	1	0	1979	1
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Bin	FILTER_A_VAL_BIT_VAL_A_VAL(0)	1	0	2011	1
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Bin	FILTER_B_MASK_BIT_MASK_B_VAL(27)	0	1	96	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(27)	1	0	1697	1
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Bin	FILTER_B_MASK_BIT_MASK_B_VAL(26)	1	0	1681	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(25)	0	1	93	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(25)	1	0	1694	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(24)	0	1	102	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(24)	1	0	1703	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(23)	0	1	93	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(23)	1	0	1694	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(22)	0	1	91	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(22)	1	0	1692	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(21)	0	1	82	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(21)	1	0	1683	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(20)	0	1	105	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(20)	1	0	1706	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(19)	0	1	93	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(19)	1	0	1694	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(18)	0	1	89	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(18)	1	0	1690	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(17)	0	1	22	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(17)	1	0	1623	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(16)	0	1	15	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(16)	1	0	1616	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(15)	0	1	33	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(15)	1	0	1634	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(14)	0	1	22	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(14)	1	0	1623	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(13)	0	1	36	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(13)	1	0	1637	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(12)	0	1	35	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(12)	1	0	1636	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(11)	0	1	34	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(11)	1	0	1635	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(10)	0	1	63	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(10)	1	0	1664	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(9)	0	1	66	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(9)	1	0	1667	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(8)	0	1	62	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(8)	1	0	1663	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(7)	0	1	71	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(7)	1	0	1672	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(6)	0	1	62	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(6)	1	0	1663	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(5)	0	1	71	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(5)	1	0	1672	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(4)	0	1	65	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(4)	1	0	1666	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(3)	0	1	62	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(3)	1	0	1663	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(2)	0	1	68	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(2)	1	0	1669	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(1)	0	1	67	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(1)	1	0	1668	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(0)	0	1	59	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(0)	1	0	1660	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(28)	0	1	186	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(28)	1	0	1787	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(27)	0	1	191	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(27)	1	0	1792	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(26)	0	1	195	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(26)	1	0	1796	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(25)	0	1	200	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(25)	1	0	1801	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(24)	0	1	198	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(24)	1	0	1799	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(23)	0	1	204	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(23)	1	0	1805	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(22)	0	1	206	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(22)	1	0	1807	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(21)	0	1	198	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(21)	1	0	1799	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(20)	0	1	202	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(20)	1	0	1803	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(19)	0	1	213	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(19)	1	0	1814	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(18)	0	1	212	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(18)	1	0	1813	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(17)	0	1	100	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(17)	1	0	1701	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(16)	0	1	106	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(16)	1	0	1707	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(15)	0	1	105	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(15)	1	0	1706	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(14)	0	1	92	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(14)	1	0	1693	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(13)	0	1	111	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(13)	1	0	1712	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(12)	0	1	101	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(12)	1	0	1702	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(11)	0	1	91	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(11)	1	0	1692	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(10)	0	1	103	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(10)	1	0	1704	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(9)	0	1	101	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(9)	1	0	1702	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(8)	0	1	97	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(8)	1	0	1698	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(7)	0	1	104	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(7)	1	0	1705	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(6)	0	1	95	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(6)	1	0	1696	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(5)	0	1	102	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(5)	1	0	1703	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(4)	0	1	106	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(4)	1	0	1707	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(3)	0	1	105	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(3)	1	0	1706	1
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Bin	FILTER_B_VAL_BIT_VAL_B_VAL(2)	1	0	1701	1
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Bin	FILTER_B_VAL_BIT_VAL_B_VAL(1)	1	0	1708	1
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Bin	FILTER_B_VAL_BIT_VAL_B_VAL(0)	1	0	1695	1
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Bin	FILTER_C_MASK_BIT_MASK_C_VAL(28)	1	0	1695	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(27)	0	1	100	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(27)	1	0	1701	1
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Bin	FILTER_C_MASK_BIT_MASK_C_VAL(26)	1	0	1687	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(25)	0	1	100	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(25)	1	0	1701	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(24)	0	1	104	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(24)	1	0	1705	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(23)	0	1	93	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(23)	1	0	1694	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(22)	0	1	98	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(22)	1	0	1699	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(21)	0	1	88	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(21)	1	0	1689	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(20)	0	1	97	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(20)	1	0	1698	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(19)	0	1	79	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(19)	1	0	1680	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(18)	0	1	87	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(18)	1	0	1688	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(17)	0	1	22	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(17)	1	0	1623	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(16)	0	1	17	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(16)	1	0	1618	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(15)	0	1	30	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(15)	1	0	1631	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(14)	0	1	21	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(14)	1	0	1622	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(13)	0	1	37	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(13)	1	0	1638	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(12)	0	1	34	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(12)	1	0	1635	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(11)	0	1	34	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(11)	1	0	1635	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(10)	0	1	66	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(10)	1	0	1667	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(9)	0	1	71	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(9)	1	0	1672	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(8)	0	1	63	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(8)	1	0	1664	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(7)	0	1	69	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(7)	1	0	1670	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(6)	0	1	62	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(6)	1	0	1663	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(5)	0	1	71	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(5)	1	0	1672	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(4)	0	1	69	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(4)	1	0	1670	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(3)	0	1	62	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(3)	1	0	1663	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(2)	0	1	67	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(2)	1	0	1668	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(1)	0	1	66	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(1)	1	0	1667	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(0)	0	1	58	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(0)	1	0	1659	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(28)	0	1	184	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(28)	1	0	1785	1
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Bin	FILTER_C_VAL_BIT_VAL_C_VAL(27)	1	0	1783	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(26)	0	1	199	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(26)	1	0	1800	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(25)	0	1	193	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(25)	1	0	1794	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(24)	0	1	190	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(24)	1	0	1791	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(23)	0	1	207	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(23)	1	0	1808	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(22)	0	1	213	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(22)	1	0	1814	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(21)	0	1	198	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(21)	1	0	1799	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(20)	0	1	198	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(20)	1	0	1799	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(19)	0	1	203	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(19)	1	0	1804	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(18)	0	1	214	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(18)	1	0	1815	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(17)	0	1	100	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(17)	1	0	1701	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(16)	0	1	103	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(16)	1	0	1704	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(15)	0	1	100	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(15)	1	0	1701	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(14)	0	1	99	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(14)	1	0	1700	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(13)	0	1	108	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(13)	1	0	1709	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(12)	0	1	105	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(12)	1	0	1706	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(11)	0	1	86	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(11)	1	0	1687	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(10)	0	1	98	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(10)	1	0	1699	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(9)	0	1	104	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(9)	1	0	1705	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(8)	0	1	102	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(8)	1	0	1703	1
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Bin	FILTER_C_VAL_BIT_VAL_C_VAL(7)	1	0	1696	1
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Bin	FILTER_C_VAL_BIT_VAL_C_VAL(6)	1	0	1697	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(5)	0	1	108	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(5)	1	0	1709	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(4)	0	1	105	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(4)	1	0	1706	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(3)	0	1	110	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(3)	1	0	1711	1
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Bin	FILTER_C_VAL_BIT_VAL_C_VAL(2)	1	0	1699	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(1)	0	1	108	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(1)	1	0	1709	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(0)	0	1	95	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(0)	1	0	1696	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(28)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(28)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(27)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(27)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(26)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(26)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(25)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(25)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(24)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(24)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(23)	0	1	2	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(23)	1	0	1603	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(22)	0	1	2	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(22)	1	0	1603	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(21)	0	1	2	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(21)	1	0	1603	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(20)	0	1	2	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(20)	1	0	1603	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(19)	0	1	2	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(19)	1	0	1603	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(18)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(18)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(17)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(17)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(16)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(16)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(15)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(15)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(14)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(14)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(13)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(13)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(12)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(12)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(11)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(11)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(10)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(10)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(9)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(9)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(8)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(8)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(7)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(7)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(6)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(6)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(5)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(5)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(4)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(4)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(3)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(3)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(2)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(2)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(1)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(1)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(0)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(0)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(28)	0	1	2	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(28)	1	0	1603	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(27)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(27)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(26)	0	1	2	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(26)	1	0	1603	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(25)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(25)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(24)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(24)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(23)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(23)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(22)	0	1	2	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(22)	1	0	1603	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(21)	0	1	2	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(21)	1	0	1603	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(20)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(20)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(19)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(19)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(18)	0	1	2	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(18)	1	0	1603	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(17)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(17)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(16)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(16)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(15)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(15)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(14)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(14)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(13)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(13)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(12)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(12)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(11)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(11)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(10)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(10)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(9)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(9)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(8)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(8)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(7)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(7)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(6)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(6)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(5)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(5)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(4)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(4)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(3)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(3)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(2)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(2)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(1)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(1)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(0)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(0)	1	0	1602	1
Bin	FILTER_CONTROL_FANB	0	1	2052	1
Bin	FILTER_CONTROL_FANB	1	0	451	1
Bin	FILTER_CONTROL_FANE	0	1	2029	1
Bin	FILTER_CONTROL_FANE	1	0	428	1
Bin	FILTER_CONTROL_FAFB	0	1	2060	1
Bin	FILTER_CONTROL_FAFB	1	0	459	1
Bin	FILTER_CONTROL_FAFE	0	1	2029	1
Bin	FILTER_CONTROL_FAFE	1	0	428	1
Bin	FILTER_CONTROL_FBNB	0	1	106	1
Bin	FILTER_CONTROL_FBNB	1	0	1707	1
Bin	FILTER_CONTROL_FBNE	0	1	105	1
Bin	FILTER_CONTROL_FBNE	1	0	1706	1
Bin	FILTER_CONTROL_FBFB	0	1	107	1
Bin	FILTER_CONTROL_FBFB	1	0	1708	1
Bin	FILTER_CONTROL_FBFE	0	1	105	1
Bin	FILTER_CONTROL_FBFE	1	0	1706	1
Bin	FILTER_CONTROL_FCNB	0	1	106	1
Bin	FILTER_CONTROL_FCNB	1	0	1707	1
Bin	FILTER_CONTROL_FCNE	0	1	105	1
Bin	FILTER_CONTROL_FCNE	1	0	1706	1
Bin	FILTER_CONTROL_FCFB	0	1	107	1
Bin	FILTER_CONTROL_FCFB	1	0	1708	1
Bin	FILTER_CONTROL_FCFE	0	1	105	1
Bin	FILTER_CONTROL_FCFE	1	0	1706	1
Bin	FILTER_CONTROL_FRNB	0	1	6	1
Bin	FILTER_CONTROL_FRNB	1	0	1607	1
Bin	FILTER_CONTROL_FRNE	0	1	5	1
Bin	FILTER_CONTROL_FRNE	1	0	1606	1
Bin	FILTER_CONTROL_FRFB	0	1	6	1
Bin	FILTER_CONTROL_FRFB	1	0	1607	1
Bin	FILTER_CONTROL_FRFE	0	1	5	1
Bin	FILTER_CONTROL_FRFE	1	0	1606	1
Bin	RX_SETTINGS_RTSOP	0	1	5	1
Bin	RX_SETTINGS_RTSOP	1	0	1606	1
Bin	RX_DATA_READ	0	1	51790	1
Bin	RX_DATA_READ	1	0	53391	1
Bin	TX_COMMAND_TXCE	0	1	354	1
Bin	TX_COMMAND_TXCE	1	0	25076	1
Bin	TX_COMMAND_TXCR	0	1	21387	1
Bin	TX_COMMAND_TXCR	1	0	25076	1
Bin	TX_COMMAND_TXCA	0	1	1734	1
Bin	TX_COMMAND_TXCA	1	0	25076	1
Bin	TX_COMMAND_TXB1	0	1	6553	1
Bin	TX_COMMAND_TXB1	1	0	8149	1
Bin	TX_COMMAND_TXB2	0	1	5587	1
Bin	TX_COMMAND_TXB2	1	0	7188	1
Bin	TX_COMMAND_TXB3	0	1	332	1
Bin	TX_COMMAND_TXB3	1	0	1933	1
Bin	TX_COMMAND_TXB4	0	1	345	1
Bin	TX_COMMAND_TXB4	1	0	1946	1
Bin	TX_COMMAND_TXB5	0	1	91	1
Bin	TX_COMMAND_TXB5	1	0	1692	1
Bin	TX_COMMAND_TXB6	0	1	73	1
Bin	TX_COMMAND_TXB6	1	0	1674	1
Bin	TX_COMMAND_TXB7	0	1	87	1
Bin	TX_COMMAND_TXB7	1	0	1688	1
Bin	TX_COMMAND_TXB8	0	1	74	1
Bin	TX_COMMAND_TXB8	1	0	1675	1
Bin	TX_PRIORITY_TXT1P(2)	0	1	105	1
Bin	TX_PRIORITY_TXT1P(2)	1	0	1706	1
Bin	TX_PRIORITY_TXT1P(1)	0	1	111	1
Bin	TX_PRIORITY_TXT1P(1)	1	0	1712	1
Bin	TX_PRIORITY_TXT1P(0)	0	1	1723	1
Bin	TX_PRIORITY_TXT1P(0)	1	0	122	1
Bin	TX_PRIORITY_TXT2P(2)	0	1	94	1
Bin	TX_PRIORITY_TXT2P(2)	1	0	1695	1
Bin	TX_PRIORITY_TXT2P(1)	0	1	131	1
Bin	TX_PRIORITY_TXT2P(1)	1	0	1732	1
Bin	TX_PRIORITY_TXT2P(0)	0	1	124	1
Bin	TX_PRIORITY_TXT2P(0)	1	0	1725	1
Bin	TX_PRIORITY_TXT3P(2)	0	1	72	1
Bin	TX_PRIORITY_TXT3P(2)	1	0	1673	1
Bin	TX_PRIORITY_TXT3P(1)	0	1	103	1
Bin	TX_PRIORITY_TXT3P(1)	1	0	1704	1
Bin	TX_PRIORITY_TXT3P(0)	0	1	96	1
Bin	TX_PRIORITY_TXT3P(0)	1	0	1697	1
Bin	TX_PRIORITY_TXT4P(2)	0	1	77	1
Bin	TX_PRIORITY_TXT4P(2)	1	0	1678	1
Bin	TX_PRIORITY_TXT4P(1)	0	1	91	1
Bin	TX_PRIORITY_TXT4P(1)	1	0	1692	1
Bin	TX_PRIORITY_TXT4P(0)	0	1	99	1
Bin	TX_PRIORITY_TXT4P(0)	1	0	1700	1
Bin	TX_PRIORITY_TXT5P(2)	0	1	23	1
Bin	TX_PRIORITY_TXT5P(2)	1	0	1624	1
Bin	TX_PRIORITY_TXT5P(1)	0	1	33	1
Bin	TX_PRIORITY_TXT5P(1)	1	0	1634	1
Bin	TX_PRIORITY_TXT5P(0)	0	1	29	1
Bin	TX_PRIORITY_TXT5P(0)	1	0	1630	1
Bin	TX_PRIORITY_TXT6P(2)	0	1	28	1
Bin	TX_PRIORITY_TXT6P(2)	1	0	1629	1
Bin	TX_PRIORITY_TXT6P(1)	0	1	31	1
Bin	TX_PRIORITY_TXT6P(1)	1	0	1632	1
Bin	TX_PRIORITY_TXT6P(0)	0	1	33	1
Bin	TX_PRIORITY_TXT6P(0)	1	0	1634	1
Bin	TX_PRIORITY_TXT7P(2)	0	1	26	1
Bin	TX_PRIORITY_TXT7P(2)	1	0	1627	1
Bin	TX_PRIORITY_TXT7P(1)	0	1	27	1
Bin	TX_PRIORITY_TXT7P(1)	1	0	1628	1
Bin	TX_PRIORITY_TXT7P(0)	0	1	31	1
Bin	TX_PRIORITY_TXT7P(0)	1	0	1632	1
Bin	TX_PRIORITY_TXT8P(2)	0	1	27	1
Bin	TX_PRIORITY_TXT8P(2)	1	0	1628	1
Bin	TX_PRIORITY_TXT8P(1)	0	1	31	1
Bin	TX_PRIORITY_TXT8P(1)	1	0	1632	1
Bin	TX_PRIORITY_TXT8P(0)	0	1	28	1
Bin	TX_PRIORITY_TXT8P(0)	1	0	1629	1
Bin	SSP_CFG_SSP_OFFSET(7)	0	1	24	1
Bin	SSP_CFG_SSP_OFFSET(7)	1	0	1625	1
Bin	SSP_CFG_SSP_OFFSET(6)	0	1	23	1
Bin	SSP_CFG_SSP_OFFSET(6)	1	0	1624	1
Bin	SSP_CFG_SSP_OFFSET(5)	0	1	48	1
Bin	SSP_CFG_SSP_OFFSET(5)	1	0	1649	1
Bin	SSP_CFG_SSP_OFFSET(4)	0	1	50	1
Bin	SSP_CFG_SSP_OFFSET(4)	1	0	1651	1
Bin	SSP_CFG_SSP_OFFSET(3)	0	1	4306	1
Bin	SSP_CFG_SSP_OFFSET(3)	1	0	2716	1
Bin	SSP_CFG_SSP_OFFSET(2)	0	1	535	1
Bin	SSP_CFG_SSP_OFFSET(2)	1	0	2135	1
Bin	SSP_CFG_SSP_OFFSET(1)	0	1	2902	1
Bin	SSP_CFG_SSP_OFFSET(1)	1	0	1313	1
Bin	SSP_CFG_SSP_OFFSET(0)	0	1	2397	1
Bin	SSP_CFG_SSP_OFFSET(0)	1	0	3997	1
Bin	SSP_CFG_SSP_SRC(1)	0	1	45	1
Bin	SSP_CFG_SSP_SRC(1)	1	0	1646	1
Bin	SSP_CFG_SSP_SRC(0)	0	1	815	1
Bin	SSP_CFG_SSP_SRC(0)	1	0	2405	1

---

Signal:

 MR_TST_OUT

	Element	From	To	Count	Threshold
Bin	TST_CONTROL_TMAENA	0	1	648	1
Bin	TST_CONTROL_TMAENA	1	0	2249	1
Bin	TST_CONTROL_TWRSTB	0	1	32343	1
Bin	TST_CONTROL_TWRSTB	1	0	35235	1
Bin	TST_DEST_TST_ADDR(15)	0	1	5	1
Bin	TST_DEST_TST_ADDR(15)	1	0	47044	1
Bin	TST_DEST_TST_ADDR(14)	0	1	5	1
Bin	TST_DEST_TST_ADDR(14)	1	0	47044	1
Bin	TST_DEST_TST_ADDR(13)	0	1	5	1
Bin	TST_DEST_TST_ADDR(13)	1	0	47044	1
Bin	TST_DEST_TST_ADDR(12)	0	1	5	1
Bin	TST_DEST_TST_ADDR(12)	1	0	47044	1
Bin	TST_DEST_TST_ADDR(11)	0	1	325	1
Bin	TST_DEST_TST_ADDR(11)	1	0	47333	1
Bin	TST_DEST_TST_ADDR(10)	0	1	645	1
Bin	TST_DEST_TST_ADDR(10)	1	0	47653	1
Bin	TST_DEST_TST_ADDR(9)	0	1	1285	1
Bin	TST_DEST_TST_ADDR(9)	1	0	48293	1
Bin	TST_DEST_TST_ADDR(8)	0	1	2565	1
Bin	TST_DEST_TST_ADDR(8)	1	0	49573	1
Bin	TST_DEST_TST_ADDR(7)	0	1	5125	1
Bin	TST_DEST_TST_ADDR(7)	1	0	52133	1
Bin	TST_DEST_TST_ADDR(6)	0	1	11205	1
Bin	TST_DEST_TST_ADDR(6)	1	0	58120	1
Bin	TST_DEST_TST_ADDR(5)	0	1	22405	1
Bin	TST_DEST_TST_ADDR(5)	1	0	69320	1
Bin	TST_DEST_TST_ADDR(4)	0	1	3617	1
Bin	TST_DEST_TST_ADDR(4)	1	0	5218	1
Bin	TST_DEST_TST_ADDR(3)	0	1	5036	1
Bin	TST_DEST_TST_ADDR(3)	1	0	6637	1
Bin	TST_DEST_TST_ADDR(2)	0	1	10348	1
Bin	TST_DEST_TST_ADDR(2)	1	0	11949	1
Bin	TST_DEST_TST_ADDR(1)	0	1	22453	1
Bin	TST_DEST_TST_ADDR(1)	1	0	24054	1
Bin	TST_DEST_TST_ADDR(0)	0	1	44900	1
Bin	TST_DEST_TST_ADDR(0)	1	0	46501	1
Bin	TST_DEST_TST_MTGT(3)	0	1	236	1
Bin	TST_DEST_TST_MTGT(3)	1	0	1837	1
Bin	TST_DEST_TST_MTGT(2)	0	1	373	1
Bin	TST_DEST_TST_MTGT(2)	1	0	1974	1
Bin	TST_DEST_TST_MTGT(1)	0	1	514	1
Bin	TST_DEST_TST_MTGT(1)	1	0	2115	1
Bin	TST_DEST_TST_MTGT(0)	0	1	979	1
Bin	TST_DEST_TST_MTGT(0)	1	0	2580	1
Bin	TST_WDATA_TST_WDATA(31)	0	1	1524	1
Bin	TST_WDATA_TST_WDATA(31)	1	0	3125	1
Bin	TST_WDATA_TST_WDATA(30)	0	1	1474	1
Bin	TST_WDATA_TST_WDATA(30)	1	0	3075	1
Bin	TST_WDATA_TST_WDATA(29)	0	1	1522	1
Bin	TST_WDATA_TST_WDATA(29)	1	0	3123	1
Bin	TST_WDATA_TST_WDATA(28)	0	1	1636	1
Bin	TST_WDATA_TST_WDATA(28)	1	0	3237	1
Bin	TST_WDATA_TST_WDATA(27)	0	1	1638	1
Bin	TST_WDATA_TST_WDATA(27)	1	0	3239	1
Bin	TST_WDATA_TST_WDATA(26)	0	1	1628	1
Bin	TST_WDATA_TST_WDATA(26)	1	0	3229	1
Bin	TST_WDATA_TST_WDATA(25)	0	1	1652	1
Bin	TST_WDATA_TST_WDATA(25)	1	0	3253	1
Bin	TST_WDATA_TST_WDATA(24)	0	1	1686	1
Bin	TST_WDATA_TST_WDATA(24)	1	0	3287	1
Bin	TST_WDATA_TST_WDATA(23)	0	1	1580	1
Bin	TST_WDATA_TST_WDATA(23)	1	0	3181	1
Bin	TST_WDATA_TST_WDATA(22)	0	1	1529	1
Bin	TST_WDATA_TST_WDATA(22)	1	0	3130	1
Bin	TST_WDATA_TST_WDATA(21)	0	1	1580	1
Bin	TST_WDATA_TST_WDATA(21)	1	0	3181	1
Bin	TST_WDATA_TST_WDATA(20)	0	1	1659	1
Bin	TST_WDATA_TST_WDATA(20)	1	0	3260	1
Bin	TST_WDATA_TST_WDATA(19)	0	1	1673	1
Bin	TST_WDATA_TST_WDATA(19)	1	0	3274	1
Bin	TST_WDATA_TST_WDATA(18)	0	1	1660	1
Bin	TST_WDATA_TST_WDATA(18)	1	0	3261	1
Bin	TST_WDATA_TST_WDATA(17)	0	1	1624	1
Bin	TST_WDATA_TST_WDATA(17)	1	0	3225	1
Bin	TST_WDATA_TST_WDATA(16)	0	1	1658	1
Bin	TST_WDATA_TST_WDATA(16)	1	0	3259	1
Bin	TST_WDATA_TST_WDATA(15)	0	1	1598	1
Bin	TST_WDATA_TST_WDATA(15)	1	0	3199	1
Bin	TST_WDATA_TST_WDATA(14)	0	1	1523	1
Bin	TST_WDATA_TST_WDATA(14)	1	0	3124	1
Bin	TST_WDATA_TST_WDATA(13)	0	1	1588	1
Bin	TST_WDATA_TST_WDATA(13)	1	0	3189	1
Bin	TST_WDATA_TST_WDATA(12)	0	1	1665	1
Bin	TST_WDATA_TST_WDATA(12)	1	0	3266	1
Bin	TST_WDATA_TST_WDATA(11)	0	1	1665	1
Bin	TST_WDATA_TST_WDATA(11)	1	0	3266	1
Bin	TST_WDATA_TST_WDATA(10)	0	1	1644	1
Bin	TST_WDATA_TST_WDATA(10)	1	0	3245	1
Bin	TST_WDATA_TST_WDATA(9)	0	1	1680	1
Bin	TST_WDATA_TST_WDATA(9)	1	0	3281	1
Bin	TST_WDATA_TST_WDATA(8)	0	1	1711	1
Bin	TST_WDATA_TST_WDATA(8)	1	0	3312	1
Bin	TST_WDATA_TST_WDATA(7)	0	1	1605	1
Bin	TST_WDATA_TST_WDATA(7)	1	0	3206	1
Bin	TST_WDATA_TST_WDATA(6)	0	1	1553	1
Bin	TST_WDATA_TST_WDATA(6)	1	0	3154	1
Bin	TST_WDATA_TST_WDATA(5)	0	1	1586	1
Bin	TST_WDATA_TST_WDATA(5)	1	0	3187	1
Bin	TST_WDATA_TST_WDATA(4)	0	1	1660	1
Bin	TST_WDATA_TST_WDATA(4)	1	0	3261	1
Bin	TST_WDATA_TST_WDATA(3)	0	1	1643	1
Bin	TST_WDATA_TST_WDATA(3)	1	0	3244	1
Bin	TST_WDATA_TST_WDATA(2)	0	1	1661	1
Bin	TST_WDATA_TST_WDATA(2)	1	0	3262	1
Bin	TST_WDATA_TST_WDATA(1)	0	1	1697	1
Bin	TST_WDATA_TST_WDATA(1)	1	0	3298	1
Bin	TST_WDATA_TST_WDATA(0)	0	1	1695	1
Bin	TST_WDATA_TST_WDATA(0)	1	0	3296	1

---

Signal:

 CC_STAT

	Element	From	To	Count	Threshold
Bin	IS_ERR_ACTIVE	0	1	8426	1
Bin	IS_ERR_ACTIVE	1	0	8415	1
Bin	IS_ERR_PASSIVE	0	1	761	1
Bin	IS_ERR_PASSIVE	1	0	2362	1
Bin	IS_BUS_OFF	0	1	8227	1
Bin	IS_BUS_OFF	1	0	8238	1
Bin	IS_TRANSMITTER	0	1	20317	1
Bin	IS_TRANSMITTER	1	0	21917	1
Bin	IS_RECEIVER	0	1	30908	1
Bin	IS_RECEIVER	1	0	32502	1
Bin	IS_IDLE	0	1	55892	1
Bin	IS_IDLE	1	0	57490	1
Bin	TX_ERR_CTR(8)	0	1	246	1
Bin	TX_ERR_CTR(8)	1	0	1847	1
Bin	TX_ERR_CTR(7)	0	1	506	1
Bin	TX_ERR_CTR(7)	1	0	2107	1
Bin	TX_ERR_CTR(6)	0	1	504	1
Bin	TX_ERR_CTR(6)	1	0	2105	1
Bin	TX_ERR_CTR(5)	0	1	787	1
Bin	TX_ERR_CTR(5)	1	0	2388	1
Bin	TX_ERR_CTR(4)	0	1	1957	1
Bin	TX_ERR_CTR(4)	1	0	3557	1
Bin	TX_ERR_CTR(3)	0	1	12521	1
Bin	TX_ERR_CTR(3)	1	0	14122	1
Bin	TX_ERR_CTR(2)	0	1	2978	1
Bin	TX_ERR_CTR(2)	1	0	4579	1
Bin	TX_ERR_CTR(1)	0	1	3314	1
Bin	TX_ERR_CTR(1)	1	0	4915	1
Bin	TX_ERR_CTR(0)	0	1	3548	1
Bin	TX_ERR_CTR(0)	1	0	5149	1
Bin	RX_ERR_CTR(8)	0	1	126	1
Bin	RX_ERR_CTR(8)	1	0	1727	1
Bin	RX_ERR_CTR(7)	0	1	344	1
Bin	RX_ERR_CTR(7)	1	0	1945	1
Bin	RX_ERR_CTR(6)	0	1	262	1
Bin	RX_ERR_CTR(6)	1	0	1860	1
Bin	RX_ERR_CTR(5)	0	1	343	1
Bin	RX_ERR_CTR(5)	1	0	1943	1
Bin	RX_ERR_CTR(4)	0	1	501	1
Bin	RX_ERR_CTR(4)	1	0	2101	1
Bin	RX_ERR_CTR(3)	0	1	680	1
Bin	RX_ERR_CTR(3)	1	0	2280	1
Bin	RX_ERR_CTR(2)	0	1	639	1
Bin	RX_ERR_CTR(2)	1	0	2240	1
Bin	RX_ERR_CTR(1)	0	1	1198	1
Bin	RX_ERR_CTR(1)	1	0	2799	1
Bin	RX_ERR_CTR(0)	0	1	11242	1
Bin	RX_ERR_CTR(0)	1	0	12836	1
Bin	STATUS_PEXS	0	1	75	1
Bin	STATUS_PEXS	1	0	1676	1
Bin	NORM_ERR_CTR(15)	0	1	67	1
Bin	NORM_ERR_CTR(15)	1	0	1665	1
Bin	NORM_ERR_CTR(14)	0	1	65	1
Bin	NORM_ERR_CTR(14)	1	0	1663	1
Bin	NORM_ERR_CTR(13)	0	1	66	1
Bin	NORM_ERR_CTR(13)	1	0	1662	1
Bin	NORM_ERR_CTR(12)	0	1	61	1
Bin	NORM_ERR_CTR(12)	1	0	1659	1
Bin	NORM_ERR_CTR(11)	0	1	71	1
Bin	NORM_ERR_CTR(11)	1	0	1670	1
Bin	NORM_ERR_CTR(10)	0	1	67	1
Bin	NORM_ERR_CTR(10)	1	0	1665	1
Bin	NORM_ERR_CTR(9)	0	1	54	1
Bin	NORM_ERR_CTR(9)	1	0	1654	1
Bin	NORM_ERR_CTR(8)	0	1	71	1
Bin	NORM_ERR_CTR(8)	1	0	1668	1
Bin	NORM_ERR_CTR(7)	0	1	83	1
Bin	NORM_ERR_CTR(7)	1	0	1682	1
Bin	NORM_ERR_CTR(6)	0	1	97	1
Bin	NORM_ERR_CTR(6)	1	0	1695	1
Bin	NORM_ERR_CTR(5)	0	1	150	1
Bin	NORM_ERR_CTR(5)	1	0	1747	1
Bin	NORM_ERR_CTR(4)	0	1	271	1
Bin	NORM_ERR_CTR(4)	1	0	1869	1
Bin	NORM_ERR_CTR(3)	0	1	605	1
Bin	NORM_ERR_CTR(3)	1	0	2200	1
Bin	NORM_ERR_CTR(2)	0	1	1369	1
Bin	NORM_ERR_CTR(2)	1	0	2967	1
Bin	NORM_ERR_CTR(1)	0	1	3083	1
Bin	NORM_ERR_CTR(1)	1	0	4677	1
Bin	NORM_ERR_CTR(0)	0	1	11506	1
Bin	NORM_ERR_CTR(0)	1	0	13100	1
Bin	DATA_ERR_CTR(15)	0	1	59	1
Bin	DATA_ERR_CTR(15)	1	0	1657	1
Bin	DATA_ERR_CTR(14)	0	1	68	1
Bin	DATA_ERR_CTR(14)	1	0	1666	1
Bin	DATA_ERR_CTR(13)	0	1	70	1
Bin	DATA_ERR_CTR(13)	1	0	1669	1
Bin	DATA_ERR_CTR(12)	0	1	66	1
Bin	DATA_ERR_CTR(12)	1	0	1665	1
Bin	DATA_ERR_CTR(11)	0	1	63	1
Bin	DATA_ERR_CTR(11)	1	0	1663	1
Bin	DATA_ERR_CTR(10)	0	1	68	1
Bin	DATA_ERR_CTR(10)	1	0	1666	1
Bin	DATA_ERR_CTR(9)	0	1	77	1
Bin	DATA_ERR_CTR(9)	1	0	1674	1
Bin	DATA_ERR_CTR(8)	0	1	90	1
Bin	DATA_ERR_CTR(8)	1	0	1688	1
Bin	DATA_ERR_CTR(7)	0	1	99	1
Bin	DATA_ERR_CTR(7)	1	0	1698	1
Bin	DATA_ERR_CTR(6)	0	1	126	1
Bin	DATA_ERR_CTR(6)	1	0	1723	1
Bin	DATA_ERR_CTR(5)	0	1	212	1
Bin	DATA_ERR_CTR(5)	1	0	1809	1
Bin	DATA_ERR_CTR(4)	0	1	363	1
Bin	DATA_ERR_CTR(4)	1	0	1962	1
Bin	DATA_ERR_CTR(3)	0	1	679	1
Bin	DATA_ERR_CTR(3)	1	0	2278	1
Bin	DATA_ERR_CTR(2)	0	1	1288	1
Bin	DATA_ERR_CTR(2)	1	0	2888	1
Bin	DATA_ERR_CTR(1)	0	1	2512	1
Bin	DATA_ERR_CTR(1)	1	0	4112	1
Bin	DATA_ERR_CTR(0)	0	1	5598	1
Bin	DATA_ERR_CTR(0)	1	0	7196	1
Bin	ERR_TYPE(2)	0	1	964	1
Bin	ERR_TYPE(2)	1	0	2564	1
Bin	ERR_TYPE(1)	0	1	1234	1
Bin	ERR_TYPE(1)	1	0	2833	1
Bin	ERR_TYPE(0)	0	1	336	1
Bin	ERR_TYPE(0)	1	0	1936	1
Bin	ERR_ERP	0	1	290	1
Bin	ERR_ERP	1	0	1891	1
Bin	ERR_POS(3)	0	1	4188	1
Bin	ERR_POS(3)	1	0	2595	1
Bin	ERR_POS(2)	0	1	4421	1
Bin	ERR_POS(2)	1	0	2821	1
Bin	ERR_POS(1)	0	1	3743	1
Bin	ERR_POS(1)	1	0	2146	1
Bin	ERR_POS(0)	0	1	2941	1
Bin	ERR_POS(0)	1	0	1341	1
Bin	RETR_CTR(3)	0	1	54	1
Bin	RETR_CTR(3)	1	0	1655	1
Bin	RETR_CTR(2)	0	1	140	1
Bin	RETR_CTR(2)	1	0	1741	1
Bin	RETR_CTR(1)	0	1	257	1
Bin	RETR_CTR(1)	1	0	1858	1
Bin	RETR_CTR(0)	0	1	642	1
Bin	RETR_CTR(0)	1	0	2242	1
Bin	ALC_BIT(4)	0	1	68	1
Bin	ALC_BIT(4)	1	0	1667	1
Bin	ALC_BIT(3)	0	1	89	1
Bin	ALC_BIT(3)	1	0	1688	1
Bin	ALC_BIT(2)	0	1	102	1
Bin	ALC_BIT(2)	1	0	1701	1
Bin	ALC_BIT(1)	0	1	170	1
Bin	ALC_BIT(1)	1	0	1769	1
Bin	ALC_BIT(0)	0	1	297	1
Bin	ALC_BIT(0)	1	0	1896	1
Bin	ALC_ID_FIELD(2)	0	1	35	1
Bin	ALC_ID_FIELD(2)	1	0	1636	1
Bin	ALC_ID_FIELD(1)	0	1	41	1
Bin	ALC_ID_FIELD(1)	1	0	1640	1
Bin	ALC_ID_FIELD(0)	0	1	92	1
Bin	ALC_ID_FIELD(0)	1	0	1693	1
Bin	RX_FRAME_CTR(31)	0	1	53	1
Bin	RX_FRAME_CTR(31)	1	0	1652	1
Bin	RX_FRAME_CTR(30)	0	1	56	1
Bin	RX_FRAME_CTR(30)	1	0	1656	1
Bin	RX_FRAME_CTR(29)	0	1	51	1
Bin	RX_FRAME_CTR(29)	1	0	1650	1
Bin	RX_FRAME_CTR(28)	0	1	50	1
Bin	RX_FRAME_CTR(28)	1	0	1648	1
Bin	RX_FRAME_CTR(27)	0	1	53	1
Bin	RX_FRAME_CTR(27)	1	0	1652	1
Bin	RX_FRAME_CTR(26)	0	1	49	1
Bin	RX_FRAME_CTR(26)	1	0	1650	1
Bin	RX_FRAME_CTR(25)	0	1	49	1
Bin	RX_FRAME_CTR(25)	1	0	1647	1
Bin	RX_FRAME_CTR(24)	0	1	57	1
Bin	RX_FRAME_CTR(24)	1	0	1656	1
Bin	RX_FRAME_CTR(23)	0	1	49	1
Bin	RX_FRAME_CTR(23)	1	0	1650	1
Bin	RX_FRAME_CTR(22)	0	1	49	1
Bin	RX_FRAME_CTR(22)	1	0	1650	1
Bin	RX_FRAME_CTR(21)	0	1	54	1
Bin	RX_FRAME_CTR(21)	1	0	1653	1
Bin	RX_FRAME_CTR(20)	0	1	57	1
Bin	RX_FRAME_CTR(20)	1	0	1656	1
Bin	RX_FRAME_CTR(19)	0	1	53	1
Bin	RX_FRAME_CTR(19)	1	0	1651	1
Bin	RX_FRAME_CTR(18)	0	1	53	1
Bin	RX_FRAME_CTR(18)	1	0	1652	1
Bin	RX_FRAME_CTR(17)	0	1	55	1
Bin	RX_FRAME_CTR(17)	1	0	1654	1
Bin	RX_FRAME_CTR(16)	0	1	54	1
Bin	RX_FRAME_CTR(16)	1	0	1653	1
Bin	RX_FRAME_CTR(15)	0	1	54	1
Bin	RX_FRAME_CTR(15)	1	0	1651	1
Bin	RX_FRAME_CTR(14)	0	1	47	1
Bin	RX_FRAME_CTR(14)	1	0	1647	1
Bin	RX_FRAME_CTR(13)	0	1	57	1
Bin	RX_FRAME_CTR(13)	1	0	1656	1
Bin	RX_FRAME_CTR(12)	0	1	61	1
Bin	RX_FRAME_CTR(12)	1	0	1660	1
Bin	RX_FRAME_CTR(11)	0	1	50	1
Bin	RX_FRAME_CTR(11)	1	0	1648	1
Bin	RX_FRAME_CTR(10)	0	1	54	1
Bin	RX_FRAME_CTR(10)	1	0	1652	1
Bin	RX_FRAME_CTR(9)	0	1	53	1
Bin	RX_FRAME_CTR(9)	1	0	1651	1
Bin	RX_FRAME_CTR(8)	0	1	66	1
Bin	RX_FRAME_CTR(8)	1	0	1665	1
Bin	RX_FRAME_CTR(7)	0	1	87	1
Bin	RX_FRAME_CTR(7)	1	0	1686	1
Bin	RX_FRAME_CTR(6)	0	1	113	1
Bin	RX_FRAME_CTR(6)	1	0	1712	1
Bin	RX_FRAME_CTR(5)	0	1	215	1
Bin	RX_FRAME_CTR(5)	1	0	1814	1
Bin	RX_FRAME_CTR(4)	0	1	353	1
Bin	RX_FRAME_CTR(4)	1	0	1953	1
Bin	RX_FRAME_CTR(3)	0	1	747	1
Bin	RX_FRAME_CTR(3)	1	0	2345	1
Bin	RX_FRAME_CTR(2)	0	1	1493	1
Bin	RX_FRAME_CTR(2)	1	0	3092	1
Bin	RX_FRAME_CTR(1)	0	1	2963	1
Bin	RX_FRAME_CTR(1)	1	0	4561	1
Bin	RX_FRAME_CTR(0)	0	1	5921	1
Bin	RX_FRAME_CTR(0)	1	0	7521	1
Bin	TX_FRAME_CTR(31)	0	1	101	1
Bin	TX_FRAME_CTR(31)	1	0	1702	1
Bin	TX_FRAME_CTR(30)	0	1	106	1
Bin	TX_FRAME_CTR(30)	1	0	1707	1
Bin	TX_FRAME_CTR(29)	0	1	110	1
Bin	TX_FRAME_CTR(29)	1	0	1711	1
Bin	TX_FRAME_CTR(28)	0	1	98	1
Bin	TX_FRAME_CTR(28)	1	0	1699	1
Bin	TX_FRAME_CTR(27)	0	1	105	1
Bin	TX_FRAME_CTR(27)	1	0	1706	1
Bin	TX_FRAME_CTR(26)	0	1	101	1
Bin	TX_FRAME_CTR(26)	1	0	1702	1
Bin	TX_FRAME_CTR(25)	0	1	99	1
Bin	TX_FRAME_CTR(25)	1	0	1700	1
Bin	TX_FRAME_CTR(24)	0	1	97	1
Bin	TX_FRAME_CTR(24)	1	0	1698	1
Bin	TX_FRAME_CTR(23)	0	1	102	1
Bin	TX_FRAME_CTR(23)	1	0	1703	1
Bin	TX_FRAME_CTR(22)	0	1	100	1
Bin	TX_FRAME_CTR(22)	1	0	1701	1
Bin	TX_FRAME_CTR(21)	0	1	105	1
Bin	TX_FRAME_CTR(21)	1	0	1706	1
Bin	TX_FRAME_CTR(20)	0	1	108	1
Bin	TX_FRAME_CTR(20)	1	0	1709	1
Bin	TX_FRAME_CTR(19)	0	1	97	1
Bin	TX_FRAME_CTR(19)	1	0	1698	1
Bin	TX_FRAME_CTR(18)	0	1	98	1
Bin	TX_FRAME_CTR(18)	1	0	1699	1
Bin	TX_FRAME_CTR(17)	0	1	105	1
Bin	TX_FRAME_CTR(17)	1	0	1706	1
Bin	TX_FRAME_CTR(16)	0	1	111	1
Bin	TX_FRAME_CTR(16)	1	0	1712	1
Bin	TX_FRAME_CTR(15)	0	1	102	1
Bin	TX_FRAME_CTR(15)	1	0	1703	1
Bin	TX_FRAME_CTR(14)	0	1	105	1
Bin	TX_FRAME_CTR(14)	1	0	1706	1
Bin	TX_FRAME_CTR(13)	0	1	91	1
Bin	TX_FRAME_CTR(13)	1	0	1692	1
Bin	TX_FRAME_CTR(12)	0	1	99	1
Bin	TX_FRAME_CTR(12)	1	0	1700	1
Bin	TX_FRAME_CTR(11)	0	1	98	1
Bin	TX_FRAME_CTR(11)	1	0	1699	1
Bin	TX_FRAME_CTR(10)	0	1	96	1
Bin	TX_FRAME_CTR(10)	1	0	1697	1
Bin	TX_FRAME_CTR(9)	0	1	106	1
Bin	TX_FRAME_CTR(9)	1	0	1707	1
Bin	TX_FRAME_CTR(8)	0	1	104	1
Bin	TX_FRAME_CTR(8)	1	0	1705	1
Bin	TX_FRAME_CTR(7)	0	1	103	1
Bin	TX_FRAME_CTR(7)	1	0	1704	1
Bin	TX_FRAME_CTR(6)	0	1	108	1
Bin	TX_FRAME_CTR(6)	1	0	1709	1
Bin	TX_FRAME_CTR(5)	0	1	109	1
Bin	TX_FRAME_CTR(5)	1	0	1710	1
Bin	TX_FRAME_CTR(4)	0	1	152	1
Bin	TX_FRAME_CTR(4)	1	0	1753	1
Bin	TX_FRAME_CTR(3)	0	1	258	1
Bin	TX_FRAME_CTR(3)	1	0	1859	1
Bin	TX_FRAME_CTR(2)	0	1	619	1
Bin	TX_FRAME_CTR(2)	1	0	2220	1
Bin	TX_FRAME_CTR(1)	0	1	1052	1
Bin	TX_FRAME_CTR(1)	1	0	2653	1
Bin	TX_FRAME_CTR(0)	0	1	2203	1
Bin	TX_FRAME_CTR(0)	1	0	3804	1
Bin	BST_CTR(2)	0	1	33452	1
Bin	BST_CTR(2)	1	0	35053	1
Bin	BST_CTR(1)	0	1	70940	1
Bin	BST_CTR(1)	1	0	72538	1
Bin	BST_CTR(0)	0	1	141315	1
Bin	BST_CTR(0)	1	0	142914	1
Bin	DST_CTR(2)	0	1	117682	1
Bin	DST_CTR(2)	1	0	119283	1
Bin	DST_CTR(1)	0	1	242662	1
Bin	DST_CTR(1)	1	0	244257	1
Bin	DST_CTR(0)	0	1	484884	1
Bin	DST_CTR(0)	1	0	486480	1
Bin	STATUS_EWL	0	1	778	1
Bin	STATUS_EWL	1	0	2378	1

---

Signal:

 PC_DBG

	Element	From	To	Count	Threshold
Bin	IS_SOF	0	1	24924	1
Bin	IS_SOF	1	0	26525	1
Bin	IS_ARBITRATION	0	1	55723	1
Bin	IS_ARBITRATION	1	0	57324	1
Bin	IS_CONTROL	0	1	50970	1
Bin	IS_CONTROL	1	0	52571	1
Bin	IS_DATA	0	1	36820	1
Bin	IS_DATA	1	0	38421	1
Bin	IS_STUFF_COUNT	0	1	13502	1
Bin	IS_STUFF_COUNT	1	0	15103	1
Bin	IS_CRC	0	1	31213	1
Bin	IS_CRC	1	0	32814	1
Bin	IS_CRC_DELIM	0	1	29735	1
Bin	IS_CRC_DELIM	1	0	31336	1
Bin	IS_ACK	0	1	29588	1
Bin	IS_ACK	1	0	31189	1
Bin	IS_ACK_DELIM	0	1	28165	1
Bin	IS_ACK_DELIM	1	0	29766	1
Bin	IS_EOF	0	1	27273	1
Bin	IS_EOF	1	0	28874	1
Bin	IS_OVERLOAD	0	1	529	1
Bin	IS_OVERLOAD	1	0	2130	1
Bin	IS_ERR	0	1	27135	1
Bin	IS_ERR	1	0	28729	1
Bin	IS_INTERMISSION	0	1	51716	1
Bin	IS_INTERMISSION	1	0	53316	1
Bin	IS_SUSPEND	0	1	2779	1
Bin	IS_SUSPEND	1	0	4380	1

---

Signal:

 MR_INT_STAT_RXI_O

	From	To	Count	Threshold
Bin	0	1	808	1
Bin	1	0	2407	1

---

Signal:

 MR_INT_STAT_TXI_O

	From	To	Count	Threshold
Bin	0	1	1215	1
Bin	1	0	2812	1

---

Signal:

 MR_INT_STAT_EWLI_O

	From	To	Count	Threshold
Bin	0	1	587	1
Bin	1	0	2187	1

---

Signal:

 MR_INT_STAT_DOI_O

	From	To	Count	Threshold
Bin	0	1	21	1
Bin	1	0	1622	1

---

Signal:

 MR_INT_STAT_FCSI_O

	From	To	Count	Threshold
Bin	0	1	3304	1
Bin	1	0	4893	1

---

Signal:

 MR_INT_STAT_ALI_O

	From	To	Count	Threshold
Bin	0	1	99	1
Bin	1	0	1698	1

---

Signal:

 MR_INT_STAT_BEI_O

	From	To	Count	Threshold
Bin	0	1	1417	1
Bin	1	0	3010	1

---

Signal:

 MR_INT_STAT_OFI_O

	From	To	Count	Threshold
Bin	0	1	152	1
Bin	1	0	1753	1

---

Signal:

 MR_INT_STAT_RXFI_O

	From	To	Count	Threshold
Bin	0	1	20	1
Bin	1	0	1621	1

---

Signal:

 MR_INT_STAT_BSI_O

	From	To	Count	Threshold
Bin	0	1	1299	1
Bin	1	0	2894	1

---

Signal:

 MR_INT_STAT_RBNEI_O

	From	To	Count	Threshold
Bin	0	1	936	1
Bin	1	0	2535	1

---

Signal:

 MR_INT_STAT_TXBHCI_O

	From	To	Count	Threshold
Bin	0	1	1680	1
Bin	1	0	3276	1

---

Signal:

 MR_INT_ENA_SET_INT_ENA_SET_O

	Element	From	To	Count	Threshold
Bin	(11)	0	1	66	1
Bin	(11)	1	0	1667	1
Bin	(10)	0	1	30	1
Bin	(10)	1	0	1631	1
Bin	(9)	0	1	50	1
Bin	(9)	1	0	1651	1
Bin	(8)	0	1	15	1
Bin	(8)	1	0	1616	1
Bin	(7)	0	1	15	1
Bin	(7)	1	0	1616	1
Bin	(6)	0	1	15	1
Bin	(6)	1	0	1616	1
Bin	(5)	0	1	15	1
Bin	(5)	1	0	1616	1
Bin	(4)	0	1	15	1
Bin	(4)	1	0	1616	1
Bin	(3)	0	1	15	1
Bin	(3)	1	0	1616	1
Bin	(2)	0	1	20	1
Bin	(2)	1	0	1621	1
Bin	(1)	0	1	15	1
Bin	(1)	1	0	1616	1
Bin	(0)	0	1	15	1
Bin	(0)	1	0	1616	1

---

Signal:

 MR_INT_MASK_SET_INT_MASK_SET_O

	Element	From	To	Count	Threshold
Bin	(11)	0	1	22	1
Bin	(11)	1	0	1813	1
Bin	(10)	0	1	20	1
Bin	(10)	1	0	1815	1
Bin	(9)	0	1	20	1
Bin	(9)	1	0	1815	1
Bin	(8)	0	1	5	1
Bin	(8)	1	0	1830	1
Bin	(7)	0	1	5	1
Bin	(7)	1	0	1830	1
Bin	(6)	0	1	5	1
Bin	(6)	1	0	1830	1
Bin	(5)	0	1	5	1
Bin	(5)	1	0	1830	1
Bin	(4)	0	1	5	1
Bin	(4)	1	0	1830	1
Bin	(3)	0	1	5	1
Bin	(3)	1	0	1830	1
Bin	(2)	0	1	5	1
Bin	(2)	1	0	1830	1
Bin	(1)	0	1	10	1
Bin	(1)	1	0	1825	1
Bin	(0)	0	1	10	1
Bin	(0)	1	0	1825	1

---

Signal:

 MR_TST_RDATA_TST_RDATA_RXB

	Element	From	To	Count	Threshold
Bin	(31)	0	1	21367	1
Bin	(31)	1	0	18461	1
Bin	(30)	0	1	12412	1
Bin	(30)	1	0	18525	1
Bin	(29)	0	1	16815	1
Bin	(29)	1	0	13909	1
Bin	(28)	0	1	16940	1
Bin	(28)	1	0	23053	1
Bin	(27)	0	1	17060	1
Bin	(27)	1	0	14154	1
Bin	(26)	0	1	16978	1
Bin	(26)	1	0	23091	1
Bin	(25)	0	1	21620	1
Bin	(25)	1	0	18714	1
Bin	(24)	0	1	12671	1
Bin	(24)	1	0	18784	1
Bin	(23)	0	1	21389	1
Bin	(23)	1	0	18483	1
Bin	(22)	0	1	12434	1
Bin	(22)	1	0	18547	1
Bin	(21)	0	1	16860	1
Bin	(21)	1	0	13954	1
Bin	(20)	0	1	16980	1
Bin	(20)	1	0	23093	1
Bin	(19)	0	1	17095	1
Bin	(19)	1	0	14189	1
Bin	(18)	0	1	17033	1
Bin	(18)	1	0	23146	1
Bin	(17)	0	1	21613	1
Bin	(17)	1	0	18707	1
Bin	(16)	0	1	12579	1
Bin	(16)	1	0	18692	1
Bin	(15)	0	1	21406	1
Bin	(15)	1	0	18500	1
Bin	(14)	0	1	12438	1
Bin	(14)	1	0	18551	1
Bin	(13)	0	1	16915	1
Bin	(13)	1	0	14009	1
Bin	(12)	0	1	17003	1
Bin	(12)	1	0	23116	1
Bin	(11)	0	1	17136	1
Bin	(11)	1	0	14230	1
Bin	(10)	0	1	17017	1
Bin	(10)	1	0	23130	1
Bin	(9)	0	1	21690	1
Bin	(9)	1	0	18784	1
Bin	(8)	0	1	12630	1
Bin	(8)	1	0	18743	1
Bin	(7)	0	1	21426	1
Bin	(7)	1	0	18520	1
Bin	(6)	0	1	12456	1
Bin	(6)	1	0	18569	1
Bin	(5)	0	1	16872	1
Bin	(5)	1	0	13966	1
Bin	(4)	0	1	16991	1
Bin	(4)	1	0	23104	1
Bin	(3)	0	1	17100	1
Bin	(3)	1	0	14194	1
Bin	(2)	0	1	17032	1
Bin	(2)	1	0	23145	1
Bin	(1)	0	1	21693	1
Bin	(1)	1	0	18787	1
Bin	(0)	0	1	12639	1
Bin	(0)	1	0	18752	1

---

Signal:

 MR_TST_RDATA_TST_RDATA_TXB

	Element	From	To	Count	Threshold
Bin	(7)(31)	0	1	121	1
Bin	(7)(31)	1	0	3961	1
Bin	(7)(30)	0	1	116	1
Bin	(7)(30)	1	0	3956	1
Bin	(7)(29)	0	1	115	1
Bin	(7)(29)	1	0	3955	1
Bin	(7)(28)	0	1	122	1
Bin	(7)(28)	1	0	3962	1
Bin	(7)(27)	0	1	124	1
Bin	(7)(27)	1	0	3964	1
Bin	(7)(26)	0	1	117	1
Bin	(7)(26)	1	0	3957	1
Bin	(7)(25)	0	1	123	1
Bin	(7)(25)	1	0	3963	1
Bin	(7)(24)	0	1	120	1
Bin	(7)(24)	1	0	3960	1
Bin	(7)(23)	0	1	131	1
Bin	(7)(23)	1	0	3971	1
Bin	(7)(22)	0	1	126	1
Bin	(7)(22)	1	0	3966	1
Bin	(7)(21)	0	1	128	1
Bin	(7)(21)	1	0	3968	1
Bin	(7)(20)	0	1	123	1
Bin	(7)(20)	1	0	3963	1
Bin	(7)(19)	0	1	112	1
Bin	(7)(19)	1	0	3952	1
Bin	(7)(18)	0	1	128	1
Bin	(7)(18)	1	0	3968	1
Bin	(7)(17)	0	1	128	1
Bin	(7)(17)	1	0	3968	1
Bin	(7)(16)	0	1	113	1
Bin	(7)(16)	1	0	3953	1
Bin	(7)(15)	0	1	122	1
Bin	(7)(15)	1	0	3962	1
Bin	(7)(14)	0	1	122	1
Bin	(7)(14)	1	0	3962	1
Bin	(7)(13)	0	1	124	1
Bin	(7)(13)	1	0	3984	1
Bin	(7)(12)	0	1	122	1
Bin	(7)(12)	1	0	3962	1
Bin	(7)(11)	0	1	123	1
Bin	(7)(11)	1	0	3963	1
Bin	(7)(10)	0	1	121	1
Bin	(7)(10)	1	0	3961	1
Bin	(7)(9)	0	1	118	1
Bin	(7)(9)	1	0	4272	1
Bin	(7)(8)	0	1	110	1
Bin	(7)(8)	1	0	3950	1
Bin	(7)(7)	0	1	122	1
Bin	(7)(7)	1	0	4276	1
Bin	(7)(6)	0	1	117	1
Bin	(7)(6)	1	0	4271	1
Bin	(7)(5)	0	1	123	1
Bin	(7)(5)	1	0	3963	1
Bin	(7)(4)	0	1	127	1
Bin	(7)(4)	1	0	3967	1
Bin	(7)(3)	0	1	124	1
Bin	(7)(3)	1	0	4278	1
Bin	(7)(2)	0	1	121	1
Bin	(7)(2)	1	0	3961	1
Bin	(7)(1)	0	1	121	1
Bin	(7)(1)	1	0	3964	1
Bin	(7)(0)	0	1	126	1
Bin	(7)(0)	1	0	3966	1
Bin	(6)(31)	0	1	122	1
Bin	(6)(31)	1	0	3303	1
Bin	(6)(30)	0	1	124	1
Bin	(6)(30)	1	0	3753	1
Bin	(6)(29)	0	1	119	1
Bin	(6)(29)	1	0	3748	1
Bin	(6)(28)	0	1	131	1
Bin	(6)(28)	1	0	3788	1
Bin	(6)(27)	0	1	131	1
Bin	(6)(27)	1	0	3369	1
Bin	(6)(26)	0	1	134	1
Bin	(6)(26)	1	0	3787	1
Bin	(6)(25)	0	1	137	1
Bin	(6)(25)	1	0	3842	1
Bin	(6)(24)	0	1	134	1
Bin	(6)(24)	1	0	3787	1
Bin	(6)(23)	0	1	143	1
Bin	(6)(23)	1	0	3853	1
Bin	(6)(22)	0	1	130	1
Bin	(6)(22)	1	0	3335	1
Bin	(6)(21)	0	1	135	1
Bin	(6)(21)	1	0	3764	1
Bin	(6)(20)	0	1	143	1
Bin	(6)(20)	1	0	3801	1
Bin	(6)(19)	0	1	131	1
Bin	(6)(19)	1	0	3841	1
Bin	(6)(18)	0	1	138	1
Bin	(6)(18)	1	0	3824	1
Bin	(6)(17)	0	1	134	1
Bin	(6)(17)	1	0	3763	1
Bin	(6)(16)	0	1	115	1
Bin	(6)(16)	1	0	3296	1
Bin	(6)(15)	0	1	135	1
Bin	(6)(15)	1	0	3359	1
Bin	(6)(14)	0	1	113	1
Bin	(6)(14)	1	0	3337	1
Bin	(6)(13)	0	1	125	1
Bin	(6)(13)	1	0	3797	1
Bin	(6)(12)	0	1	122	1
Bin	(6)(12)	1	0	3346	1
Bin	(6)(11)	0	1	126	1
Bin	(6)(11)	1	0	3307	1
Bin	(6)(10)	0	1	125	1
Bin	(6)(10)	1	0	3754	1
Bin	(6)(9)	0	1	129	1
Bin	(6)(9)	1	0	3333	1
Bin	(6)(8)	0	1	131	1
Bin	(6)(8)	1	0	3827	1
Bin	(6)(7)	0	1	135	1
Bin	(6)(7)	1	0	3787	1
Bin	(6)(6)	0	1	132	1
Bin	(6)(6)	1	0	3813	1
Bin	(6)(5)	0	1	129	1
Bin	(6)(5)	1	0	3804	1
Bin	(6)(4)	0	1	123	1
Bin	(6)(4)	1	0	3754	1
Bin	(6)(3)	0	1	127	1
Bin	(6)(3)	1	0	3785	1
Bin	(6)(2)	0	1	123	1
Bin	(6)(2)	1	0	4042	1
Bin	(6)(1)	0	1	134	1
Bin	(6)(1)	1	0	3648	1
Bin	(6)(0)	0	1	120	1
Bin	(6)(0)	1	0	3324	1
Bin	(5)(31)	0	1	128	1
Bin	(5)(31)	1	0	3050	1
Bin	(5)(30)	0	1	122	1
Bin	(5)(30)	1	0	3044	1
Bin	(5)(29)	0	1	124	1
Bin	(5)(29)	1	0	3055	1
Bin	(5)(28)	0	1	119	1
Bin	(5)(28)	1	0	3046	1
Bin	(5)(27)	0	1	123	1
Bin	(5)(27)	1	0	3951	1
Bin	(5)(26)	0	1	125	1
Bin	(5)(26)	1	0	3867	1
Bin	(5)(25)	0	1	136	1
Bin	(5)(25)	1	0	2972	1
Bin	(5)(24)	0	1	125	1
Bin	(5)(24)	1	0	2961	1
Bin	(5)(23)	0	1	132	1
Bin	(5)(23)	1	0	3926	1
Bin	(5)(22)	0	1	118	1
Bin	(5)(22)	1	0	2954	1
Bin	(5)(21)	0	1	117	1
Bin	(5)(21)	1	0	3945	1
Bin	(5)(20)	0	1	126	1
Bin	(5)(20)	1	0	2962	1
Bin	(5)(19)	0	1	131	1
Bin	(5)(19)	1	0	3873	1
Bin	(5)(18)	0	1	126	1
Bin	(5)(18)	1	0	2962	1
Bin	(5)(17)	0	1	123	1
Bin	(5)(17)	1	0	2959	1
Bin	(5)(16)	0	1	131	1
Bin	(5)(16)	1	0	3873	1
Bin	(5)(15)	0	1	113	1
Bin	(5)(15)	1	0	3855	1
Bin	(5)(14)	0	1	130	1
Bin	(5)(14)	1	0	2966	1
Bin	(5)(13)	0	1	124	1
Bin	(5)(13)	1	0	3046	1
Bin	(5)(12)	0	1	120	1
Bin	(5)(12)	1	0	3042	1
Bin	(5)(11)	0	1	113	1
Bin	(5)(11)	1	0	3035	1
Bin	(5)(10)	0	1	120	1
Bin	(5)(10)	1	0	2956	1
Bin	(5)(9)	0	1	134	1
Bin	(5)(9)	1	0	3881	1
Bin	(5)(8)	0	1	124	1
Bin	(5)(8)	1	0	3866	1
Bin	(5)(7)	0	1	134	1
Bin	(5)(7)	1	0	3324	1
Bin	(5)(6)	0	1	120	1
Bin	(5)(6)	1	0	2956	1
Bin	(5)(5)	0	1	120	1
Bin	(5)(5)	1	0	3948	1
Bin	(5)(4)	0	1	122	1
Bin	(5)(4)	1	0	3950	1
Bin	(5)(3)	0	1	131	1
Bin	(5)(3)	1	0	3878	1
Bin	(5)(2)	0	1	131	1
Bin	(5)(2)	1	0	3316	1
Bin	(5)(1)	0	1	128	1
Bin	(5)(1)	1	0	3227	1
Bin	(5)(0)	0	1	128	1
Bin	(5)(0)	1	0	4219	1
Bin	(4)(31)	0	1	124	1
Bin	(4)(31)	1	0	2288	1
Bin	(4)(30)	0	1	123	1
Bin	(4)(30)	1	0	3635	1
Bin	(4)(29)	0	1	113	1
Bin	(4)(29)	1	0	2330	1
Bin	(4)(28)	0	1	132	1
Bin	(4)(28)	1	0	2327	1
Bin	(4)(27)	0	1	139	1
Bin	(4)(27)	1	0	2323	1
Bin	(4)(26)	0	1	132	1
Bin	(4)(26)	1	0	3660	1
Bin	(4)(25)	0	1	134	1
Bin	(4)(25)	1	0	2313	1
Bin	(4)(24)	0	1	134	1
Bin	(4)(24)	1	0	3701	1
Bin	(4)(23)	0	1	135	1
Bin	(4)(23)	1	0	3708	1
Bin	(4)(22)	0	1	139	1
Bin	(4)(22)	1	0	2358	1
Bin	(4)(21)	0	1	142	1
Bin	(4)(21)	1	0	3676	1
Bin	(4)(20)	0	1	134	1
Bin	(4)(20)	1	0	3662	1
Bin	(4)(19)	0	1	128	1
Bin	(4)(19)	1	0	3670	1
Bin	(4)(18)	0	1	140	1
Bin	(4)(18)	1	0	3942	1
Bin	(4)(17)	0	1	133	1
Bin	(4)(17)	1	0	2303	1
Bin	(4)(16)	0	1	134	1
Bin	(4)(16)	1	0	2328	1
Bin	(4)(15)	0	1	123	1
Bin	(4)(15)	1	0	2271	1
Bin	(4)(14)	0	1	133	1
Bin	(4)(14)	1	0	3645	1
Bin	(4)(13)	0	1	134	1
Bin	(4)(13)	1	0	3652	1
Bin	(4)(12)	0	1	131	1
Bin	(4)(12)	1	0	3659	1
Bin	(4)(11)	0	1	135	1
Bin	(4)(11)	1	0	2289	1
Bin	(4)(10)	0	1	137	1
Bin	(4)(10)	1	0	3671	1
Bin	(4)(9)	0	1	133	1
Bin	(4)(9)	1	0	2429	1
Bin	(4)(8)	0	1	132	1
Bin	(4)(8)	1	0	2302	1
Bin	(4)(7)	0	1	135	1
Bin	(4)(7)	1	0	3801	1
Bin	(4)(6)	0	1	137	1
Bin	(4)(6)	1	0	3691	1
Bin	(4)(5)	0	1	138	1
Bin	(4)(5)	1	0	3692	1
Bin	(4)(4)	0	1	124	1
Bin	(4)(4)	1	0	2288	1
Bin	(4)(3)	0	1	127	1
Bin	(4)(3)	1	0	2275	1
Bin	(4)(2)	0	1	132	1
Bin	(4)(2)	1	0	2280	1
Bin	(4)(1)	0	1	134	1
Bin	(4)(1)	1	0	3672	1
Bin	(4)(0)	0	1	134	1
Bin	(4)(0)	1	0	2414	1
Bin	(3)(31)	0	1	480	1
Bin	(3)(31)	1	0	9403	1
Bin	(3)(30)	0	1	480	1
Bin	(3)(30)	1	0	9403	1
Bin	(3)(29)	0	1	456	1
Bin	(3)(29)	1	0	7599	1
Bin	(3)(28)	0	1	505	1
Bin	(3)(28)	1	0	9696	1
Bin	(3)(27)	0	1	503	1
Bin	(3)(27)	1	0	10062	1
Bin	(3)(26)	0	1	506	1
Bin	(3)(26)	1	0	7761	1
Bin	(3)(25)	0	1	509	1
Bin	(3)(25)	1	0	9899	1
Bin	(3)(24)	0	1	493	1
Bin	(3)(24)	1	0	9446	1
Bin	(3)(23)	0	1	515	1
Bin	(3)(23)	1	0	9717	1
Bin	(3)(22)	0	1	502	1
Bin	(3)(22)	1	0	9788	1
Bin	(3)(21)	0	1	531	1
Bin	(3)(21)	1	0	9725	1
Bin	(3)(20)	0	1	517	1
Bin	(3)(20)	1	0	8015	1
Bin	(3)(19)	0	1	512	1
Bin	(3)(19)	1	0	7964	1
Bin	(3)(18)	0	1	526	1
Bin	(3)(18)	1	0	7957	1
Bin	(3)(17)	0	1	493	1
Bin	(3)(17)	1	0	9424	1
Bin	(3)(16)	0	1	483	1
Bin	(3)(16)	1	0	9644	1
Bin	(3)(15)	0	1	512	1
Bin	(3)(15)	1	0	9658	1
Bin	(3)(14)	0	1	510	1
Bin	(3)(14)	1	0	9931	1
Bin	(3)(13)	0	1	512	1
Bin	(3)(13)	1	0	9922	1
Bin	(3)(12)	0	1	497	1
Bin	(3)(12)	1	0	9434	1
Bin	(3)(11)	0	1	498	1
Bin	(3)(11)	1	0	9423	1
Bin	(3)(10)	0	1	514	1
Bin	(3)(10)	1	0	7885	1
Bin	(3)(9)	0	1	507	1
Bin	(3)(9)	1	0	7612	1
Bin	(3)(8)	0	1	516	1
Bin	(3)(8)	1	0	9942	1
Bin	(3)(7)	0	1	519	1
Bin	(3)(7)	1	0	9946	1
Bin	(3)(6)	0	1	491	1
Bin	(3)(6)	1	0	8085	1
Bin	(3)(5)	0	1	507	1
Bin	(3)(5)	1	0	9917	1
Bin	(3)(4)	0	1	503	1
Bin	(3)(4)	1	0	9664	1
Bin	(3)(3)	0	1	501	1
Bin	(3)(3)	1	0	9748	1
Bin	(3)(2)	0	1	496	1
Bin	(3)(2)	1	0	9423	1
Bin	(3)(1)	0	1	512	1
Bin	(3)(1)	1	0	9489	1
Bin	(3)(0)	0	1	499	1
Bin	(3)(0)	1	0	9623	1
Bin	(2)(31)	0	1	493	1
Bin	(2)(31)	1	0	6491	1
Bin	(2)(30)	0	1	492	1
Bin	(2)(30)	1	0	8862	1
Bin	(2)(29)	0	1	482	1
Bin	(2)(29)	1	0	8305	1
Bin	(2)(28)	0	1	560	1
Bin	(2)(28)	1	0	5933	1
Bin	(2)(27)	0	1	533	1
Bin	(2)(27)	1	0	6252	1
Bin	(2)(26)	0	1	552	1
Bin	(2)(26)	1	0	8613	1
Bin	(2)(25)	0	1	552	1
Bin	(2)(25)	1	0	5767	1
Bin	(2)(24)	0	1	565	1
Bin	(2)(24)	1	0	8734	1
Bin	(2)(23)	0	1	572	1
Bin	(2)(23)	1	0	6029	1
Bin	(2)(22)	0	1	537	1
Bin	(2)(22)	1	0	8622	1
Bin	(2)(21)	0	1	560	1
Bin	(2)(21)	1	0	8103	1
Bin	(2)(20)	0	1	540	1
Bin	(2)(20)	1	0	8053	1
Bin	(2)(19)	0	1	573	1
Bin	(2)(19)	1	0	6314	1
Bin	(2)(18)	0	1	574	1
Bin	(2)(18)	1	0	6798	1
Bin	(2)(17)	0	1	519	1
Bin	(2)(17)	1	0	8612	1
Bin	(2)(16)	0	1	527	1
Bin	(2)(16)	1	0	6252	1
Bin	(2)(15)	0	1	525	1
Bin	(2)(15)	1	0	8091	1
Bin	(2)(14)	0	1	529	1
Bin	(2)(14)	1	0	8173	1
Bin	(2)(13)	0	1	516	1
Bin	(2)(13)	1	0	5753	1
Bin	(2)(12)	0	1	524	1
Bin	(2)(12)	1	0	7995	1
Bin	(2)(11)	0	1	525	1
Bin	(2)(11)	1	0	5777	1
Bin	(2)(10)	0	1	506	1
Bin	(2)(10)	1	0	6648	1
Bin	(2)(9)	0	1	528	1
Bin	(2)(9)	1	0	8489	1
Bin	(2)(8)	0	1	518	1
Bin	(2)(8)	1	0	6315	1
Bin	(2)(7)	0	1	573	1
Bin	(2)(7)	1	0	8457	1
Bin	(2)(6)	0	1	554	1
Bin	(2)(6)	1	0	6734	1
Bin	(2)(5)	0	1	510	1
Bin	(2)(5)	1	0	6024	1
Bin	(2)(4)	0	1	529	1
Bin	(2)(4)	1	0	8297	1
Bin	(2)(3)	0	1	536	1
Bin	(2)(3)	1	0	7213	1
Bin	(2)(2)	0	1	549	1
Bin	(2)(2)	1	0	8647	1
Bin	(2)(1)	0	1	562	1
Bin	(2)(1)	1	0	6931	1
Bin	(2)(0)	0	1	528	1
Bin	(2)(0)	1	0	8035	1
Bin	(1)(31)	0	1	592	1
Bin	(1)(31)	1	0	7959	1
Bin	(1)(30)	0	1	585	1
Bin	(1)(30)	1	0	7300	1
Bin	(1)(29)	0	1	591	1
Bin	(1)(29)	1	0	10042	1
Bin	(1)(28)	0	1	622	1
Bin	(1)(28)	1	0	8265	1
Bin	(1)(27)	0	1	629	1
Bin	(1)(27)	1	0	9927	1
Bin	(1)(26)	0	1	625	1
Bin	(1)(26)	1	0	7354	1
Bin	(1)(25)	0	1	608	1
Bin	(1)(25)	1	0	8309	1
Bin	(1)(24)	0	1	649	1
Bin	(1)(24)	1	0	5725	1
Bin	(1)(23)	0	1	605	1
Bin	(1)(23)	1	0	6528	1
Bin	(1)(22)	0	1	634	1
Bin	(1)(22)	1	0	9384	1
Bin	(1)(21)	0	1	623	1
Bin	(1)(21)	1	0	10088	1
Bin	(1)(20)	0	1	616	1
Bin	(1)(20)	1	0	7428	1
Bin	(1)(19)	0	1	626	1
Bin	(1)(19)	1	0	8427	1
Bin	(1)(18)	0	1	624	1
Bin	(1)(18)	1	0	9260	1
Bin	(1)(17)	0	1	614	1
Bin	(1)(17)	1	0	9002	1
Bin	(1)(16)	0	1	588	1
Bin	(1)(16)	1	0	7384	1
Bin	(1)(15)	0	1	624	1
Bin	(1)(15)	1	0	7293	1
Bin	(1)(14)	0	1	601	1
Bin	(1)(14)	1	0	7994	1
Bin	(1)(13)	0	1	611	1
Bin	(1)(13)	1	0	9924	1
Bin	(1)(12)	0	1	613	1
Bin	(1)(12)	1	0	10088	1
Bin	(1)(11)	0	1	608	1
Bin	(1)(11)	1	0	8143	1
Bin	(1)(10)	0	1	615	1
Bin	(1)(10)	1	0	6513	1
Bin	(1)(9)	0	1	630	1
Bin	(1)(9)	1	0	10934	1
Bin	(1)(8)	0	1	595	1
Bin	(1)(8)	1	0	6201	1
Bin	(1)(7)	0	1	627	1
Bin	(1)(7)	1	0	10188	1
Bin	(1)(6)	0	1	628	1
Bin	(1)(6)	1	0	8546	1
Bin	(1)(5)	0	1	610	1
Bin	(1)(5)	1	0	8501	1
Bin	(1)(4)	0	1	614	1
Bin	(1)(4)	1	0	7500	1
Bin	(1)(3)	0	1	614	1
Bin	(1)(3)	1	0	10417	1
Bin	(1)(2)	0	1	616	1
Bin	(1)(2)	1	0	8999	1
Bin	(1)(1)	0	1	618	1
Bin	(1)(1)	1	0	7360	1
Bin	(1)(0)	0	1	608	1
Bin	(1)(0)	1	0	7512	1
Bin	(0)(31)	0	1	584	1
Bin	(0)(31)	1	0	8478	1
Bin	(0)(30)	0	1	577	1
Bin	(0)(30)	1	0	7555	1
Bin	(0)(29)	0	1	579	1
Bin	(0)(29)	1	0	7304	1
Bin	(0)(28)	0	1	648	1
Bin	(0)(28)	1	0	7446	1
Bin	(0)(27)	0	1	636	1
Bin	(0)(27)	1	0	7437	1
Bin	(0)(26)	0	1	655	1
Bin	(0)(26)	1	0	7747	1
Bin	(0)(25)	0	1	646	1
Bin	(0)(25)	1	0	2370	1
Bin	(0)(24)	0	1	635	1
Bin	(0)(24)	1	0	9025	1
Bin	(0)(23)	0	1	656	1
Bin	(0)(23)	1	0	7471	1
Bin	(0)(22)	0	1	637	1
Bin	(0)(22)	1	0	8691	1
Bin	(0)(21)	0	1	659	1
Bin	(0)(21)	1	0	3236	1
Bin	(0)(20)	0	1	654	1
Bin	(0)(20)	1	0	4067	1
Bin	(0)(19)	0	1	662	1
Bin	(0)(19)	1	0	5433	1
Bin	(0)(18)	0	1	663	1
Bin	(0)(18)	1	0	4537	1
Bin	(0)(17)	0	1	634	1
Bin	(0)(17)	1	0	9037	1
Bin	(0)(16)	0	1	600	1
Bin	(0)(16)	1	0	4426	1
Bin	(0)(15)	0	1	629	1
Bin	(0)(15)	1	0	6953	1
Bin	(0)(14)	0	1	625	1
Bin	(0)(14)	1	0	7333	1
Bin	(0)(13)	0	1	619	1
Bin	(0)(13)	1	0	3045	1
Bin	(0)(12)	0	1	633	1
Bin	(0)(12)	1	0	5822	1
Bin	(0)(11)	0	1	609	1
Bin	(0)(11)	1	0	8278	1
Bin	(0)(10)	0	1	624	1
Bin	(0)(10)	1	0	5889	1
Bin	(0)(9)	0	1	625	1
Bin	(0)(9)	1	0	8630	1
Bin	(0)(8)	0	1	614	1
Bin	(0)(8)	1	0	4719	1
Bin	(0)(7)	0	1	648	1
Bin	(0)(7)	1	0	9229	1
Bin	(0)(6)	0	1	646	1
Bin	(0)(6)	1	0	7671	1
Bin	(0)(5)	0	1	644	1
Bin	(0)(5)	1	0	8745	1
Bin	(0)(4)	0	1	608	1
Bin	(0)(4)	1	0	3695	1
Bin	(0)(3)	0	1	641	1
Bin	(0)(3)	1	0	8015	1
Bin	(0)(2)	0	1	630	1
Bin	(0)(2)	1	0	6029	1
Bin	(0)(1)	0	1	642	1
Bin	(0)(1)	1	0	9100	1
Bin	(0)(0)	0	1	625	1
Bin	(0)(0)	1	0	8748	1

---

Signal:

 RXB_PORT_B_DATA_OUT

	Element	From	To	Count	Threshold
Bin	(31)	0	1	3622	1
Bin	(31)	1	0	6824	1
Bin	(30)	0	1	3306	1
Bin	(30)	1	0	6508	1
Bin	(29)	0	1	3453	1
Bin	(29)	1	0	6655	1
Bin	(28)	0	1	7017	1
Bin	(28)	1	0	10219	1
Bin	(27)	0	1	6562	1
Bin	(27)	1	0	9764	1
Bin	(26)	0	1	7325	1
Bin	(26)	1	0	10527	1
Bin	(25)	0	1	7564	1
Bin	(25)	1	0	10766	1
Bin	(24)	0	1	12948	1
Bin	(24)	1	0	16148	1
Bin	(23)	0	1	7608	1
Bin	(23)	1	0	10810	1
Bin	(22)	0	1	7278	1
Bin	(22)	1	0	10480	1
Bin	(21)	0	1	7292	1
Bin	(21)	1	0	10494	1
Bin	(20)	0	1	6896	1
Bin	(20)	1	0	10098	1
Bin	(19)	0	1	8986	1
Bin	(19)	1	0	12188	1
Bin	(18)	0	1	9864	1
Bin	(18)	1	0	13066	1
Bin	(17)	0	1	8008	1
Bin	(17)	1	0	11210	1
Bin	(16)	0	1	8013	1
Bin	(16)	1	0	11215	1
Bin	(15)	0	1	8684	1
Bin	(15)	1	0	11886	1
Bin	(14)	0	1	9472	1
Bin	(14)	1	0	12674	1
Bin	(13)	0	1	13026	1
Bin	(13)	1	0	16228	1
Bin	(12)	0	1	13730	1
Bin	(12)	1	0	16930	1
Bin	(11)	0	1	15194	1
Bin	(11)	1	0	18394	1
Bin	(10)	0	1	10533	1
Bin	(10)	1	0	13735	1
Bin	(9)	0	1	12104	1
Bin	(9)	1	0	15306	1
Bin	(8)	0	1	9815	1
Bin	(8)	1	0	13017	1
Bin	(7)	0	1	13100	1
Bin	(7)	1	0	16302	1
Bin	(6)	0	1	11654	1
Bin	(6)	1	0	14856	1
Bin	(5)	0	1	11411	1
Bin	(5)	1	0	14613	1
Bin	(4)	0	1	10162	1
Bin	(4)	1	0	13364	1
Bin	(3)	0	1	11069	1
Bin	(3)	1	0	14271	1
Bin	(2)	0	1	11737	1
Bin	(2)	1	0	14939	1
Bin	(1)	0	1	12343	1
Bin	(1)	1	0	15545	1
Bin	(0)	0	1	12286	1
Bin	(0)	1	0	15488	1

---

Signal:

 PC_RX_TRIGGER

	From	To	Count	Threshold
Bin	0	1	10359813	1
Bin	1	0	10361414	1

---

Signal:

 MR_TX_COMMAND_TXBI

	Element	From	To	Count	Threshold
Bin	(7)	0	1	76	1
Bin	(7)	1	0	1130	1
Bin	(6)	0	1	79	1
Bin	(6)	1	0	1127	1
Bin	(5)	0	1	75	1
Bin	(5)	1	0	1131	1
Bin	(4)	0	1	83	1
Bin	(4)	1	0	1123	1
Bin	(3)	0	1	392	1
Bin	(3)	1	0	4053	1
Bin	(2)	0	1	330	1
Bin	(2)	1	0	4115	1
Bin	(1)	0	1	5642	1
Bin	(1)	1	0	10511	1
Bin	(0)	0	1	6553	1
Bin	(0)	1	0	9600	1

---

Signal:

 MR_TX_PRIORITY

	Element	From	To	Count	Threshold
Bin	(7)(2)	0	1	136	1
Bin	(7)(2)	1	0	403	1
Bin	(7)(1)	0	1	138	1
Bin	(7)(1)	1	0	431	1
Bin	(7)(0)	0	1	126	1
Bin	(7)(0)	1	0	402	1
Bin	(6)(2)	0	1	122	1
Bin	(6)(2)	1	0	351	1
Bin	(6)(1)	0	1	136	1
Bin	(6)(1)	1	0	346	1
Bin	(6)(0)	0	1	129	1
Bin	(6)(0)	1	0	373	1
Bin	(5)(2)	0	1	115	1
Bin	(5)(2)	1	0	373	1
Bin	(5)(1)	0	1	161	1
Bin	(5)(1)	1	0	383	1
Bin	(5)(0)	0	1	144	1
Bin	(5)(0)	1	0	414	1
Bin	(4)(2)	0	1	119	1
Bin	(4)(2)	1	0	319	1
Bin	(4)(1)	0	1	129	1
Bin	(4)(1)	1	0	343	1
Bin	(4)(0)	0	1	152	1
Bin	(4)(0)	1	0	326	1
Bin	(3)(2)	0	1	261	1
Bin	(3)(2)	1	0	1104	1
Bin	(3)(1)	0	1	292	1
Bin	(3)(1)	1	0	1167	1
Bin	(3)(0)	0	1	354	1
Bin	(3)(0)	1	0	1173	1
Bin	(2)(2)	0	1	259	1
Bin	(2)(2)	1	0	1003	1
Bin	(2)(1)	0	1	348	1
Bin	(2)(1)	1	0	1136	1
Bin	(2)(0)	0	1	394	1
Bin	(2)(0)	1	0	1061	1
Bin	(1)(2)	0	1	332	1
Bin	(1)(2)	1	0	1912	1
Bin	(1)(1)	0	1	469	1
Bin	(1)(1)	1	0	2069	1
Bin	(1)(0)	0	1	428	1
Bin	(1)(0)	1	0	1961	1
Bin	(0)(2)	0	1	446	1
Bin	(0)(2)	1	0	1942	1
Bin	(0)(1)	0	1	419	1
Bin	(0)(1)	1	0	2037	1
Bin	(0)(0)	0	1	2056	1
Bin	(0)(0)	1	0	464	1