NVC code coverage report

File: /__w/ctu-can-regression/ctu-can-regression/src/frame_filters/frame_filters.vhd

Nested Instances	Statement	Branch	Toggle	Expression	FSM state	Functional	Average
GEN_FILT_POS	100.0 % (3/3)	100.0 % (2/2)	N.A.	100.0 % (5/5)	N.A.	N.A.	100.0 % (10/10)
GEN_FILT_NEG	100.0 % (1/1)	N.A.	N.A.	N.A.	N.A.	N.A.	100.0 % (1/1)

Nested Instances

Statement

Branch

Toggle

Expression

FSM state

Functional

Average

GEN_FILT_POS

100.0 % (3/3)

100.0 % (2/2)

N.A.

100.0 % (5/5)

N.A.

100.0 % (10/10)

GEN_FILT_NEG

100.0 % (1/1)

N.A.

100.0 % (1/1)

Current Instance	Statement	Branch	Toggle	Expression	FSM state	Functional	Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.FRAME_FILTERS_INST.BIT_FILTER_B_INST	100.0 % (2/2)	N.A.	100.0 % (294/294)	N.A.	N.A.	N.A.	100.0 % (296/296)

Current Instance

Statement

Branch

Toggle

Expression

FSM state

Functional

Average

CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.FRAME_FILTERS_INST.BIT_FILTER_B_INST

100.0 % (2/2)

N.A.

100.0 % (294/294)

N.A.

100.0 % (296/296)

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.

Statement

Branch

Toggle

Expression

FSM state

Functional

Uncovered statements:

Excluded statements:

Covered statements:

Signal assignment statement on line 121:

121: masked_input <= filter_input and filter_mask;
Count: 114493
Threshold: 1

Signal assignment statement on line 122:

122: masked_value <= filter_value and filter_mask;
Count: 4486
Threshold: 1

Uncovered branches:

Excluded branches:

Covered branches:

Uncovered toggles:

Excluded toggles:

Port:

FILTER_MASK

	Element	From	To	Threshold	Excluded due to
Bin	(28)	0	1	1	Exclude file
Bin	(28)	1	0	1	Exclude file
Bin	(27)	0	1	1	Exclude file
Bin	(27)	1	0	1	Exclude file
Bin	(26)	0	1	1	Exclude file
Bin	(26)	1	0	1	Exclude file
Bin	(25)	0	1	1	Exclude file
Bin	(25)	1	0	1	Exclude file
Bin	(24)	0	1	1	Exclude file
Bin	(24)	1	0	1	Exclude file
Bin	(23)	0	1	1	Exclude file
Bin	(23)	1	0	1	Exclude file
Bin	(22)	0	1	1	Exclude file
Bin	(22)	1	0	1	Exclude file
Bin	(21)	0	1	1	Exclude file
Bin	(21)	1	0	1	Exclude file
Bin	(20)	0	1	1	Exclude file
Bin	(20)	1	0	1	Exclude file
Bin	(19)	0	1	1	Exclude file
Bin	(19)	1	0	1	Exclude file
Bin	(18)	0	1	1	Exclude file
Bin	(18)	1	0	1	Exclude file
Bin	(17)	0	1	1	Exclude file
Bin	(17)	1	0	1	Exclude file
Bin	(16)	0	1	1	Exclude file
Bin	(16)	1	0	1	Exclude file
Bin	(15)	0	1	1	Exclude file
Bin	(15)	1	0	1	Exclude file
Bin	(14)	0	1	1	Exclude file
Bin	(14)	1	0	1	Exclude file
Bin	(13)	0	1	1	Exclude file
Bin	(13)	1	0	1	Exclude file
Bin	(12)	0	1	1	Exclude file
Bin	(12)	1	0	1	Exclude file
Bin	(11)	0	1	1	Exclude file
Bin	(11)	1	0	1	Exclude file
Bin	(10)	0	1	1	Exclude file
Bin	(10)	1	0	1	Exclude file
Bin	(9)	0	1	1	Exclude file
Bin	(9)	1	0	1	Exclude file
Bin	(8)	0	1	1	Exclude file
Bin	(8)	1	0	1	Exclude file
Bin	(7)	0	1	1	Exclude file
Bin	(7)	1	0	1	Exclude file
Bin	(6)	0	1	1	Exclude file
Bin	(6)	1	0	1	Exclude file
Bin	(5)	0	1	1	Exclude file
Bin	(5)	1	0	1	Exclude file
Bin	(4)	0	1	1	Exclude file
Bin	(4)	1	0	1	Exclude file
Bin	(3)	0	1	1	Exclude file
Bin	(3)	1	0	1	Exclude file
Bin	(2)	0	1	1	Exclude file
Bin	(2)	1	0	1	Exclude file
Bin	(1)	0	1	1	Exclude file
Bin	(1)	1	0	1	Exclude file
Bin	(0)	0	1	1	Exclude file
Bin	(0)	1	0	1	Exclude file

Port:

FILTER_VALUE

	Element	From	To	Threshold	Excluded due to
Bin	(28)	0	1	1	Exclude file
Bin	(28)	1	0	1	Exclude file
Bin	(27)	0	1	1	Exclude file
Bin	(27)	1	0	1	Exclude file
Bin	(26)	0	1	1	Exclude file
Bin	(26)	1	0	1	Exclude file
Bin	(25)	0	1	1	Exclude file
Bin	(25)	1	0	1	Exclude file
Bin	(24)	0	1	1	Exclude file
Bin	(24)	1	0	1	Exclude file
Bin	(23)	0	1	1	Exclude file
Bin	(23)	1	0	1	Exclude file
Bin	(22)	0	1	1	Exclude file
Bin	(22)	1	0	1	Exclude file
Bin	(21)	0	1	1	Exclude file
Bin	(21)	1	0	1	Exclude file
Bin	(20)	0	1	1	Exclude file
Bin	(20)	1	0	1	Exclude file
Bin	(19)	0	1	1	Exclude file
Bin	(19)	1	0	1	Exclude file
Bin	(18)	0	1	1	Exclude file
Bin	(18)	1	0	1	Exclude file
Bin	(17)	0	1	1	Exclude file
Bin	(17)	1	0	1	Exclude file
Bin	(16)	0	1	1	Exclude file
Bin	(16)	1	0	1	Exclude file
Bin	(15)	0	1	1	Exclude file
Bin	(15)	1	0	1	Exclude file
Bin	(14)	0	1	1	Exclude file
Bin	(14)	1	0	1	Exclude file
Bin	(13)	0	1	1	Exclude file
Bin	(13)	1	0	1	Exclude file
Bin	(12)	0	1	1	Exclude file
Bin	(12)	1	0	1	Exclude file
Bin	(11)	0	1	1	Exclude file
Bin	(11)	1	0	1	Exclude file
Bin	(10)	0	1	1	Exclude file
Bin	(10)	1	0	1	Exclude file
Bin	(9)	0	1	1	Exclude file
Bin	(9)	1	0	1	Exclude file
Bin	(8)	0	1	1	Exclude file
Bin	(8)	1	0	1	Exclude file
Bin	(7)	0	1	1	Exclude file
Bin	(7)	1	0	1	Exclude file
Bin	(6)	0	1	1	Exclude file
Bin	(6)	1	0	1	Exclude file
Bin	(5)	0	1	1	Exclude file
Bin	(5)	1	0	1	Exclude file
Bin	(4)	0	1	1	Exclude file
Bin	(4)	1	0	1	Exclude file
Bin	(3)	0	1	1	Exclude file
Bin	(3)	1	0	1	Exclude file
Bin	(2)	0	1	1	Exclude file
Bin	(2)	1	0	1	Exclude file
Bin	(1)	0	1	1	Exclude file
Bin	(1)	1	0	1	Exclude file
Bin	(0)	0	1	1	Exclude file
Bin	(0)	1	0	1	Exclude file

Port:

FILTER_INPUT

	Element	From	To	Threshold	Excluded due to
Bin	(28)	0	1	1	Exclude file
Bin	(28)	1	0	1	Exclude file
Bin	(27)	0	1	1	Exclude file
Bin	(27)	1	0	1	Exclude file
Bin	(26)	0	1	1	Exclude file
Bin	(26)	1	0	1	Exclude file
Bin	(25)	0	1	1	Exclude file
Bin	(25)	1	0	1	Exclude file
Bin	(24)	0	1	1	Exclude file
Bin	(24)	1	0	1	Exclude file
Bin	(23)	0	1	1	Exclude file
Bin	(23)	1	0	1	Exclude file
Bin	(22)	0	1	1	Exclude file
Bin	(22)	1	0	1	Exclude file
Bin	(21)	0	1	1	Exclude file
Bin	(21)	1	0	1	Exclude file
Bin	(20)	0	1	1	Exclude file
Bin	(20)	1	0	1	Exclude file
Bin	(19)	0	1	1	Exclude file
Bin	(19)	1	0	1	Exclude file
Bin	(18)	0	1	1	Exclude file
Bin	(18)	1	0	1	Exclude file
Bin	(17)	0	1	1	Exclude file
Bin	(17)	1	0	1	Exclude file
Bin	(16)	0	1	1	Exclude file
Bin	(16)	1	0	1	Exclude file
Bin	(15)	0	1	1	Exclude file
Bin	(15)	1	0	1	Exclude file
Bin	(14)	0	1	1	Exclude file
Bin	(14)	1	0	1	Exclude file
Bin	(13)	0	1	1	Exclude file
Bin	(13)	1	0	1	Exclude file
Bin	(12)	0	1	1	Exclude file
Bin	(12)	1	0	1	Exclude file
Bin	(11)	0	1	1	Exclude file
Bin	(11)	1	0	1	Exclude file
Bin	(10)	0	1	1	Exclude file
Bin	(10)	1	0	1	Exclude file
Bin	(9)	0	1	1	Exclude file
Bin	(9)	1	0	1	Exclude file
Bin	(8)	0	1	1	Exclude file
Bin	(8)	1	0	1	Exclude file
Bin	(7)	0	1	1	Exclude file
Bin	(7)	1	0	1	Exclude file
Bin	(6)	0	1	1	Exclude file
Bin	(6)	1	0	1	Exclude file
Bin	(5)	0	1	1	Exclude file
Bin	(5)	1	0	1	Exclude file
Bin	(4)	0	1	1	Exclude file
Bin	(4)	1	0	1	Exclude file
Bin	(3)	0	1	1	Exclude file
Bin	(3)	1	0	1	Exclude file
Bin	(2)	0	1	1	Exclude file
Bin	(2)	1	0	1	Exclude file
Bin	(1)	0	1	1	Exclude file
Bin	(1)	1	0	1	Exclude file
Bin	(0)	0	1	1	Exclude file
Bin	(0)	1	0	1	Exclude file

Port:

ENABLE

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

Covered toggles:

Port:

VALID

	From	To	Count	Threshold
Bin	0	1	531	1
Bin	1	0	2132	1

Signal:

MASKED_INPUT

	Element	From	To	Count	Threshold
Bin	(28)	0	1	102	1
Bin	(28)	1	0	1703	1
Bin	(27)	0	1	120	1
Bin	(27)	1	0	1721	1
Bin	(26)	0	1	104	1
Bin	(26)	1	0	1705	1
Bin	(25)	0	1	120	1
Bin	(25)	1	0	1721	1
Bin	(24)	0	1	110	1
Bin	(24)	1	0	1711	1
Bin	(23)	0	1	107	1
Bin	(23)	1	0	1708	1
Bin	(22)	0	1	109	1
Bin	(22)	1	0	1710	1
Bin	(21)	0	1	95	1
Bin	(21)	1	0	1696	1
Bin	(20)	0	1	127	1
Bin	(20)	1	0	1728	1
Bin	(19)	0	1	109	1
Bin	(19)	1	0	1710	1
Bin	(18)	0	1	95	1
Bin	(18)	1	0	1696	1
Bin	(17)	0	1	14	1
Bin	(17)	1	0	1615	1
Bin	(16)	0	1	8	1
Bin	(16)	1	0	1609	1
Bin	(15)	0	1	16	1
Bin	(15)	1	0	1617	1
Bin	(14)	0	1	12	1
Bin	(14)	1	0	1613	1
Bin	(13)	0	1	22	1
Bin	(13)	1	0	1623	1
Bin	(12)	0	1	26	1
Bin	(12)	1	0	1627	1
Bin	(11)	0	1	23	1
Bin	(11)	1	0	1624	1
Bin	(10)	0	1	34	1
Bin	(10)	1	0	1635	1
Bin	(9)	0	1	39	1
Bin	(9)	1	0	1640	1
Bin	(8)	0	1	44	1
Bin	(8)	1	0	1645	1
Bin	(7)	0	1	44	1
Bin	(7)	1	0	1645	1
Bin	(6)	0	1	30	1
Bin	(6)	1	0	1631	1
Bin	(5)	0	1	50	1
Bin	(5)	1	0	1651	1
Bin	(4)	0	1	42	1
Bin	(4)	1	0	1643	1
Bin	(3)	0	1	35	1
Bin	(3)	1	0	1636	1
Bin	(2)	0	1	47	1
Bin	(2)	1	0	1648	1
Bin	(1)	0	1	33	1
Bin	(1)	1	0	1634	1
Bin	(0)	0	1	31	1
Bin	(0)	1	0	1632	1

Signal:

MASKED_VALUE

	Element	From	To	Count	Threshold
Bin	(28)	0	1	68	1
Bin	(28)	1	0	1669	1
Bin	(27)	0	1	71	1
Bin	(27)	1	0	1672	1
Bin	(26)	0	1	54	1
Bin	(26)	1	0	1655	1
Bin	(25)	0	1	69	1
Bin	(25)	1	0	1670	1
Bin	(24)	0	1	69	1
Bin	(24)	1	0	1670	1
Bin	(23)	0	1	71	1
Bin	(23)	1	0	1672	1
Bin	(22)	0	1	64	1
Bin	(22)	1	0	1665	1
Bin	(21)	0	1	53	1
Bin	(21)	1	0	1654	1
Bin	(20)	0	1	70	1
Bin	(20)	1	0	1671	1
Bin	(19)	0	1	66	1
Bin	(19)	1	0	1667	1
Bin	(18)	0	1	67	1
Bin	(18)	1	0	1668	1
Bin	(17)	0	1	12	1
Bin	(17)	1	0	1613	1
Bin	(16)	0	1	9	1
Bin	(16)	1	0	1610	1
Bin	(15)	0	1	13	1
Bin	(15)	1	0	1614	1
Bin	(14)	0	1	12	1
Bin	(14)	1	0	1613	1
Bin	(13)	0	1	17	1
Bin	(13)	1	0	1618	1
Bin	(12)	0	1	15	1
Bin	(12)	1	0	1616	1
Bin	(11)	0	1	17	1
Bin	(11)	1	0	1618	1
Bin	(10)	0	1	49	1
Bin	(10)	1	0	1650	1
Bin	(9)	0	1	48	1
Bin	(9)	1	0	1649	1
Bin	(8)	0	1	53	1
Bin	(8)	1	0	1654	1
Bin	(7)	0	1	60	1
Bin	(7)	1	0	1661	1
Bin	(6)	0	1	48	1
Bin	(6)	1	0	1649	1
Bin	(5)	0	1	56	1
Bin	(5)	1	0	1657	1
Bin	(4)	0	1	58	1
Bin	(4)	1	0	1659	1
Bin	(3)	0	1	55	1
Bin	(3)	1	0	1656	1
Bin	(2)	0	1	53	1
Bin	(2)	1	0	1654	1
Bin	(1)	0	1	57	1
Bin	(1)	1	0	1658	1
Bin	(0)	0	1	49	1
Bin	(0)	1	0	1650	1

NVC code coverage report

Hierarchy

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.FRAME_FILTERS_INST.BIT_FILTER_B_INST

File: /__w/ctu-can-regression/ctu-can-regression/src/frame_filters/frame_filters.vhd

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.

Uncovered statements:

Excluded statements:

Covered statements:

Signal assignment statement on line 121:

Signal assignment statement on line 122:

Uncovered branches:

Excluded branches:

Covered branches:

Uncovered toggles:

Excluded toggles:

Port:

Port:

Port:

Port:

Covered toggles:

Port:

Signal:

Signal:

Uncovered expressions:

Excluded expressions:

Covered expressions:

Uncovered FSM states:

Excluded FSM states:

Covered FSM states:

Uncovered functional coverage:

Excluded functional coverage:

Covered functional coverage: