NVC code coverage report

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.TXT_BUF_COMP_GEN(0).TXT_BUF_EVEN_GEN.TXT_BUFFER_EVEN_INST.CLK_GATE_TXT_BUFFER_RAM_COMP

File:  /__w/ctu-can-regression/ctu-can-regression/src/common_blocks/clk_gate.vhd

Sub-instances:

Instance Statement Branch Toggle Expression FSM state Functional Average
G_TECH_ASIC 100.0 % (3/3) 100.0 % (2/2) N.A. 100.0 % (8/8) N.A. N.A. 100.0 % (13/13)
G_TECH_FPGA 100.0 % (1/1) N.A. N.A. N.A. N.A. N.A. 100.0 % (1/1)

Current Instance:

Instance Statement Branch Toggle Expression FSM state Functional Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.TXT_BUF_COMP_GEN(0).TXT_BUF_EVEN_GEN.TXT_BUFFER_EVEN_INST.CLK_GATE_TXT_BUFFER_RAM_COMP N.A. N.A. 100.0 % (10/10) N.A. N.A. N.A. 100.0 % (10/10)

Details:

The limit of printed items was reached (5000). Total 261615 items are not displayed.

Uncovered statements:

Excluded statements:

Covered statements:

Uncovered branches:

Excluded branches:

Covered branches:

Uncovered toggles:

Excluded toggles:

Covered toggles:

Port:

 CLK_IN
FromToCountThreshold
Bin015275788691
Bin105275804601

Port:

 CLK_EN
FromToCountThreshold
Bin012627801
Bin102643801

Port:

 SCAN_ENABLE
FromToCountThreshold
Bin0151
Bin1016051

Port:

 CLK_OUT
FromToCountThreshold
Bin01140473121
Bin10140489121

Signal:

 CLK_EN_Q
FromToCountThreshold
Bin012399151
Bin102411851

Uncovered expressions:

Excluded expressions:

Covered expressions:

Uncovered FSM states:

Excluded FSM states:

Covered FSM states:

Uncovered functional coverage:

Excluded functional coverage:

Covered functional coverage: