NVC code coverage report

NVC code coverage report

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.TXT_BUF_COMP_GEN(1).TXT_BUF_ODD_GEN.TXT_BUFFER_ODD_INST.TXT_BUFFER_RAM_INST.DP_INF_RAM_BE_INST

File: /__w/ctu-can-regression/ctu-can-regression/src/common_blocks/dp_inf_ram_be.vhd

Sub-instances:

Instance	Statement	Branch	Toggle	Expression	FSM state	Functional	Average
BYTE_GEN(0)	100.0 % (3/3)	100.0 % (2/2)	N.A.	100.0 % (7/7)	N.A.	N.A.	100.0 % (12/12)
BYTE_GEN(1)	100.0 % (3/3)	100.0 % (2/2)	N.A.	100.0 % (7/7)	N.A.	N.A.	100.0 % (12/12)
BYTE_GEN(2)	100.0 % (3/3)	100.0 % (2/2)	N.A.	100.0 % (7/7)	N.A.	N.A.	100.0 % (12/12)
BYTE_GEN(3)	100.0 % (3/3)	100.0 % (2/2)	N.A.	100.0 % (7/7)	N.A.	N.A.	100.0 % (12/12)
RAM_RST_FALSE_GEN	100.0 % (4/4)	100.0 % (4/4)	N.A.	100.0 % (2/2)	N.A.	N.A.	100.0 % (10/10)
SYNC_READ_GEN	100.0 % (2/2)	100.0 % (2/2)	N.A.	N.A.	N.A.	N.A.	100.0 % (4/4)

Current Instance:

Instance	Statement	Branch	Toggle	Expression	FSM state	Functional	Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.TXT_BUF_COMP_GEN(1).TXT_BUF_ODD_GEN.TXT_BUFFER_ODD_INST.TXT_BUFFER_RAM_INST.DP_INF_RAM_BE_INST	100.0 % (1/1)	N.A.	100.0 % (1578/1578)	N.A.	N.A.	N.A.	100.0 % (1579/1579)

Details:

The limit of printed items was reached (5000). Total 261615 items are not displayed.

Uncovered statements:

Excluded statements:

Covered statements:

Signal assignment statement:

191: int_read_data <= ram_memory(to_integer(unsigned(addr_B)));
Count: 313982
Threshold: 1

Uncovered branches:

Excluded branches:

Covered branches:

Uncovered toggles:

Excluded toggles:

Covered toggles:

Port:

CLK_SYS

	From	To	Count	Threshold
Bin	0	1	14022469	1
Bin	1	0	14024069	1

Port:

RES_N

	From	To	Count	Threshold
Bin	0	1	8082	1
Bin	1	0	8072	1

Port:

ADDR_A(4)

	From	To	Count	Threshold
Bin	0	1	328745	1
Bin	1	0	27441088	1

Port:

ADDR_A(3)

	From	To	Count	Threshold
Bin	0	1	576261	1
Bin	1	0	27193526	1

Port:

ADDR_A(2)

	From	To	Count	Threshold
Bin	0	1	436476	1
Bin	1	0	27333781	1

Port:

ADDR_A(1)

	From	To	Count	Threshold
Bin	0	1	27004643	1
Bin	1	0	766548	1

Port:

ADDR_A(0)

	From	To	Count	Threshold
Bin	0	1	17636608	1
Bin	1	0	10136529	1

Port:

WRITE

	From	To	Count	Threshold
Bin	0	1	128483	1
Bin	1	0	130209	1

Port:

DATA_IN(31)

	From	To	Count	Threshold
Bin	0	1	60783	1
Bin	1	0	1013666	1

Port:

DATA_IN(30)

	From	To	Count	Threshold
Bin	0	1	66537	1
Bin	1	0	1007922	1

Port:

DATA_IN(29)

	From	To	Count	Threshold
Bin	0	1	62515	1
Bin	1	0	1011916	1

Port:

DATA_IN(28)

	From	To	Count	Threshold
Bin	0	1	90878	1
Bin	1	0	983585	1

Port:

DATA_IN(27)

	From	To	Count	Threshold
Bin	0	1	79071	1
Bin	1	0	995406	1

Port:

DATA_IN(26)

	From	To	Count	Threshold
Bin	0	1	75974	1
Bin	1	0	998499	1

Port:

DATA_IN(25)

	From	To	Count	Threshold
Bin	0	1	87661	1
Bin	1	0	986836	1

Port:

DATA_IN(24)

	From	To	Count	Threshold
Bin	0	1	77613	1
Bin	1	0	996848	1

Port:

DATA_IN(23)

	From	To	Count	Threshold
Bin	0	1	70382	1
Bin	1	0	1004097	1

Port:

DATA_IN(22)

	From	To	Count	Threshold
Bin	0	1	107578	1
Bin	1	0	966877	1

Port:

DATA_IN(21)

	From	To	Count	Threshold
Bin	0	1	74303	1
Bin	1	0	1000152	1

Port:

DATA_IN(20)

	From	To	Count	Threshold
Bin	0	1	79911	1
Bin	1	0	994548	1

Port:

DATA_IN(19)

	From	To	Count	Threshold
Bin	0	1	107845	1
Bin	1	0	966640	1

Port:

DATA_IN(18)

	From	To	Count	Threshold
Bin	0	1	126102	1
Bin	1	0	948389	1

Port:

DATA_IN(17)

	From	To	Count	Threshold
Bin	0	1	116846	1
Bin	1	0	957659	1

Port:

DATA_IN(16)

	From	To	Count	Threshold
Bin	0	1	186370	1
Bin	1	0	888125	1

Port:

DATA_IN(15)

	From	To	Count	Threshold
Bin	0	1	71823	1
Bin	1	0	1002646	1

Port:

DATA_IN(14)

	From	To	Count	Threshold
Bin	0	1	85544	1
Bin	1	0	988909	1

Port:

DATA_IN(13)

	From	To	Count	Threshold
Bin	0	1	76003	1
Bin	1	0	998468	1

Port:

DATA_IN(12)

	From	To	Count	Threshold
Bin	0	1	79870	1
Bin	1	0	994611	1

Port:

DATA_IN(11)

	From	To	Count	Threshold
Bin	0	1	96729	1
Bin	1	0	977726	1

Port:

DATA_IN(10)

	From	To	Count	Threshold
Bin	0	1	116412	1
Bin	1	0	958051	1

Port:

DATA_IN(9)

	From	To	Count	Threshold
Bin	0	1	170250	1
Bin	1	0	904229	1

Port:

DATA_IN(8)

	From	To	Count	Threshold
Bin	0	1	149946	1
Bin	1	0	924523	1

Port:

DATA_IN(7)

	From	To	Count	Threshold
Bin	0	1	125852	1
Bin	1	0	948641	1

Port:

DATA_IN(6)

	From	To	Count	Threshold
Bin	0	1	108987	1
Bin	1	0	965508	1

Port:

DATA_IN(5)

	From	To	Count	Threshold
Bin	0	1	103371	1
Bin	1	0	971122	1

Port:

DATA_IN(4)

	From	To	Count	Threshold
Bin	0	1	159430	1
Bin	1	0	915041	1

Port:

DATA_IN(3)

	From	To	Count	Threshold
Bin	0	1	130837	1
Bin	1	0	943640	1

Port:

DATA_IN(2)

	From	To	Count	Threshold
Bin	0	1	154748	1
Bin	1	0	919733	1

Port:

DATA_IN(1)

	From	To	Count	Threshold
Bin	0	1	227152	1
Bin	1	0	847333	1

Port:

DATA_IN(0)

	From	To	Count	Threshold
Bin	0	1	190168	1
Bin	1	0	884384	1

Port:

BE(3)

	From	To	Count	Threshold
Bin	0	1	27758245	1
Bin	1	0	35788	1

Port:

BE(2)

	From	To	Count	Threshold
Bin	0	1	27758627	1
Bin	1	0	35406	1

Port:

BE(1)

	From	To	Count	Threshold
Bin	0	1	27658880	1
Bin	1	0	135153	1

Port:

BE(0)

	From	To	Count	Threshold
Bin	0	1	27660120	1
Bin	1	0	133913	1

Port:

ADDR_B(4)

	From	To	Count	Threshold
Bin	0	1	26995	1
Bin	1	0	28595	1

Port:

ADDR_B(3)

	From	To	Count	Threshold
Bin	0	1	4027	1
Bin	1	0	5627	1

Port:

ADDR_B(2)

	From	To	Count	Threshold
Bin	0	1	46132	1
Bin	1	0	47732	1

Port:

ADDR_B(1)

	From	To	Count	Threshold
Bin	0	1	38898	1
Bin	1	0	38901	1

Port:

ADDR_B(0)

	From	To	Count	Threshold
Bin	0	1	102952	1
Bin	1	0	104549	1

Port:

DATA_OUT(31)

	From	To	Count	Threshold
Bin	0	1	5911	1
Bin	1	0	7461	1

Port:

DATA_OUT(30)

	From	To	Count	Threshold
Bin	0	1	6110	1
Bin	1	0	7660	1

Port:

DATA_OUT(29)

	From	To	Count	Threshold
Bin	0	1	5834	1
Bin	1	0	7384	1

Port:

DATA_OUT(28)

	From	To	Count	Threshold
Bin	0	1	17432	1
Bin	1	0	18943	1

Port:

DATA_OUT(27)

	From	To	Count	Threshold
Bin	0	1	13971	1
Bin	1	0	15477	1

Port:

DATA_OUT(26)

	From	To	Count	Threshold
Bin	0	1	17362	1
Bin	1	0	18871	1

Port:

DATA_OUT(25)

	From	To	Count	Threshold
Bin	0	1	14054	1
Bin	1	0	15563	1

Port:

DATA_OUT(24)

	From	To	Count	Threshold
Bin	0	1	17509	1
Bin	1	0	19012	1

Port:

DATA_OUT(23)

	From	To	Count	Threshold
Bin	0	1	15147	1
Bin	1	0	16651	1

Port:

DATA_OUT(22)

	From	To	Count	Threshold
Bin	0	1	18083	1
Bin	1	0	19582	1

Port:

DATA_OUT(21)

	From	To	Count	Threshold
Bin	0	1	15194	1
Bin	1	0	16701	1

Port:

DATA_OUT(20)

	From	To	Count	Threshold
Bin	0	1	17639	1
Bin	1	0	19138	1

Port:

DATA_OUT(19)

	From	To	Count	Threshold
Bin	0	1	15448	1
Bin	1	0	16941	1

Port:

DATA_OUT(18)

	From	To	Count	Threshold
Bin	0	1	18091	1
Bin	1	0	19592	1

Port:

DATA_OUT(17)

	From	To	Count	Threshold
Bin	0	1	9683	1
Bin	1	0	11211	1

Port:

DATA_OUT(16)

	From	To	Count	Threshold
Bin	0	1	10009	1
Bin	1	0	11537	1

Port:

DATA_OUT(15)

	From	To	Count	Threshold
Bin	0	1	9772	1
Bin	1	0	11302	1

Port:

DATA_OUT(14)

	From	To	Count	Threshold
Bin	0	1	10207	1
Bin	1	0	11734	1

Port:

DATA_OUT(13)

	From	To	Count	Threshold
Bin	0	1	9974	1
Bin	1	0	11508	1

Port:

DATA_OUT(12)

	From	To	Count	Threshold
Bin	0	1	10274	1
Bin	1	0	11806	1

Port:

DATA_OUT(11)

	From	To	Count	Threshold
Bin	0	1	9752	1
Bin	1	0	11286	1

Port:

DATA_OUT(10)

	From	To	Count	Threshold
Bin	0	1	10975	1
Bin	1	0	12443	1

Port:

DATA_OUT(9)

	From	To	Count	Threshold
Bin	0	1	19591	1
Bin	1	0	21006	1

Port:

DATA_OUT(8)

	From	To	Count	Threshold
Bin	0	1	10936	1
Bin	1	0	12467	1

Port:

DATA_OUT(7)

	From	To	Count	Threshold
Bin	0	1	25055	1
Bin	1	0	26299	1

Port:

DATA_OUT(6)

	From	To	Count	Threshold
Bin	0	1	15897	1
Bin	1	0	17314	1

Port:

DATA_OUT(5)

	From	To	Count	Threshold
Bin	0	1	12775	1
Bin	1	0	14291	1

Port:

DATA_OUT(4)

	From	To	Count	Threshold
Bin	0	1	11644	1
Bin	1	0	13169	1

Port:

DATA_OUT(3)

	From	To	Count	Threshold
Bin	0	1	19107	1
Bin	1	0	20566	1

Port:

DATA_OUT(2)

	From	To	Count	Threshold
Bin	0	1	20639	1
Bin	1	0	22069	1

Port:

DATA_OUT(1)

	From	To	Count	Threshold
Bin	0	1	20586	1
Bin	1	0	22025	1

Port:

DATA_OUT(0)

	From	To	Count	Threshold
Bin	0	1	26883	1
Bin	1	0	28179	1

Signal:

RAM_MEMORY(0)(31)

	From	To	Count	Threshold
Bin	0	1	222	1
Bin	1	0	47947	1

Signal:

RAM_MEMORY(0)(30)

	From	To	Count	Threshold
Bin	0	1	239	1
Bin	1	0	47985	1

Signal:

RAM_MEMORY(0)(29)

	From	To	Count	Threshold
Bin	0	1	179	1
Bin	1	0	47956	1

Signal:

RAM_MEMORY(0)(28)

	From	To	Count	Threshold
Bin	0	1	285	1
Bin	1	0	48013	1

Signal:

RAM_MEMORY(0)(27)

	From	To	Count	Threshold
Bin	0	1	179	1
Bin	1	0	47943	1

Signal:

RAM_MEMORY(0)(26)

	From	To	Count	Threshold
Bin	0	1	304	1
Bin	1	0	48027	1

Signal:

RAM_MEMORY(0)(25)

	From	To	Count	Threshold
Bin	0	1	244	1
Bin	1	0	47981	1

Signal:

RAM_MEMORY(0)(24)

	From	To	Count	Threshold
Bin	0	1	238	1
Bin	1	0	47964	1

Signal:

RAM_MEMORY(0)(23)

	From	To	Count	Threshold
Bin	0	1	202	1
Bin	1	0	47910	1

Signal:

RAM_MEMORY(0)(22)

	From	To	Count	Threshold
Bin	0	1	239	1
Bin	1	0	47948	1

Signal:

RAM_MEMORY(0)(21)

	From	To	Count	Threshold
Bin	0	1	262	1
Bin	1	0	47929	1

Signal:

RAM_MEMORY(0)(20)

	From	To	Count	Threshold
Bin	0	1	304	1
Bin	1	0	47990	1

Signal:

RAM_MEMORY(0)(19)

	From	To	Count	Threshold
Bin	0	1	220	1
Bin	1	0	47946	1

Signal:

RAM_MEMORY(0)(18)

	From	To	Count	Threshold
Bin	0	1	241	1
Bin	1	0	47950	1

Signal:

RAM_MEMORY(0)(17)

	From	To	Count	Threshold
Bin	0	1	264	1
Bin	1	0	47950	1

Signal:

RAM_MEMORY(0)(16)

	From	To	Count	Threshold
Bin	0	1	281	1
Bin	1	0	48041	1

Signal:

RAM_MEMORY(0)(15)

	From	To	Count	Threshold
Bin	0	1	223	1
Bin	1	0	38240	1

Signal:

RAM_MEMORY(0)(14)

	From	To	Count	Threshold
Bin	0	1	282	1
Bin	1	0	38319	1

Signal:

RAM_MEMORY(0)(13)

	From	To	Count	Threshold
Bin	0	1	178	1
Bin	1	0	38197	1

Signal:

RAM_MEMORY(0)(12)

	From	To	Count	Threshold
Bin	0	1	305	1
Bin	1	0	38340	1

Signal:

RAM_MEMORY(0)(11)

	From	To	Count	Threshold
Bin	0	1	220	1
Bin	1	0	38237	1

Signal:

RAM_MEMORY(0)(10)

	From	To	Count	Threshold
Bin	0	1	727	1
Bin	1	0	38472	1

Signal:

RAM_MEMORY(0)(9)

	From	To	Count	Threshold
Bin	0	1	6264	1
Bin	1	0	41616	1

Signal:

RAM_MEMORY(0)(8)

	From	To	Count	Threshold
Bin	0	1	259	1
Bin	1	0	38257	1

Signal:

RAM_MEMORY(0)(7)

	From	To	Count	Threshold
Bin	0	1	3726	1
Bin	1	0	34028	1

Signal:

RAM_MEMORY(0)(6)

	From	To	Count	Threshold
Bin	0	1	3272	1
Bin	1	0	35229	1

Signal:

RAM_MEMORY(0)(5)

	From	To	Count	Threshold
Bin	0	1	1304	1
Bin	1	0	34040	1

Signal:

RAM_MEMORY(0)(4)

	From	To	Count	Threshold
Bin	0	1	262	1
Bin	1	0	32933	1

Signal:

RAM_MEMORY(0)(3)

	From	To	Count	Threshold
Bin	0	1	3648	1
Bin	1	0	34398	1

Signal:

RAM_MEMORY(0)(2)

	From	To	Count	Threshold
Bin	0	1	4330	1
Bin	1	0	34945	1

Signal:

RAM_MEMORY(0)(1)

	From	To	Count	Threshold
Bin	0	1	4078	1
Bin	1	0	35203	1

Signal:

RAM_MEMORY(0)(0)

	From	To	Count	Threshold
Bin	0	1	5268	1
Bin	1	0	35945	1

Signal:

RAM_MEMORY(1)(31)

	From	To	Count	Threshold
Bin	0	1	273	1
Bin	1	0	31913	1

Signal:

RAM_MEMORY(1)(30)

	From	To	Count	Threshold
Bin	0	1	252	1
Bin	1	0	31894	1

Signal:

RAM_MEMORY(1)(29)

	From	To	Count	Threshold
Bin	0	1	275	1
Bin	1	0	31917	1

Signal:

RAM_MEMORY(1)(28)

	From	To	Count	Threshold
Bin	0	1	4909	1
Bin	1	0	35342	1

Signal:

RAM_MEMORY(1)(27)

	From	To	Count	Threshold
Bin	0	1	4345	1
Bin	1	0	35044	1

Signal:

RAM_MEMORY(1)(26)

	From	To	Count	Threshold
Bin	0	1	4901	1
Bin	1	0	35248	1

Signal:

RAM_MEMORY(1)(25)

	From	To	Count	Threshold
Bin	0	1	4058	1
Bin	1	0	34943	1

Signal:

RAM_MEMORY(1)(24)

	From	To	Count	Threshold
Bin	0	1	4856	1
Bin	1	0	35361	1

Signal:

RAM_MEMORY(1)(23)

	From	To	Count	Threshold
Bin	0	1	4184	1
Bin	1	0	35012	1

Signal:

RAM_MEMORY(1)(22)

	From	To	Count	Threshold
Bin	0	1	5179	1
Bin	1	0	35434	1

Signal:

RAM_MEMORY(1)(21)

	From	To	Count	Threshold
Bin	0	1	4025	1
Bin	1	0	34779	1

Signal:

RAM_MEMORY(1)(20)

	From	To	Count	Threshold
Bin	0	1	4890	1
Bin	1	0	35162	1

Signal:

RAM_MEMORY(1)(19)

	From	To	Count	Threshold
Bin	0	1	4126	1
Bin	1	0	34802	1

Signal:

RAM_MEMORY(1)(18)

	From	To	Count	Threshold
Bin	0	1	4917	1
Bin	1	0	35187	1

Signal:

RAM_MEMORY(1)(17)

	From	To	Count	Threshold
Bin	0	1	2586	1
Bin	1	0	33609	1

Signal:

RAM_MEMORY(1)(16)

	From	To	Count	Threshold
Bin	0	1	2614	1
Bin	1	0	33862	1

Signal:

RAM_MEMORY(1)(15)

	From	To	Count	Threshold
Bin	0	1	2541	1
Bin	1	0	38872	1

Signal:

RAM_MEMORY(1)(14)

	From	To	Count	Threshold
Bin	0	1	2775	1
Bin	1	0	39103	1

Signal:

RAM_MEMORY(1)(13)

	From	To	Count	Threshold
Bin	0	1	2461	1
Bin	1	0	39010	1

Signal:

RAM_MEMORY(1)(12)

	From	To	Count	Threshold
Bin	0	1	2582	1
Bin	1	0	38877	1

Signal:

RAM_MEMORY(1)(11)

	From	To	Count	Threshold
Bin	0	1	2313	1
Bin	1	0	38722	1

Signal:

RAM_MEMORY(1)(10)

	From	To	Count	Threshold
Bin	0	1	2587	1
Bin	1	0	38891	1

Signal:

RAM_MEMORY(1)(9)

	From	To	Count	Threshold
Bin	0	1	2490	1
Bin	1	0	38903	1

Signal:

RAM_MEMORY(1)(8)

	From	To	Count	Threshold
Bin	0	1	2705	1
Bin	1	0	39168	1

Signal:

RAM_MEMORY(1)(7)

	From	To	Count	Threshold
Bin	0	1	2553	1
Bin	1	0	38820	1

Signal:

RAM_MEMORY(1)(6)

	From	To	Count	Threshold
Bin	0	1	2580	1
Bin	1	0	38807	1

Signal:

RAM_MEMORY(1)(5)

	From	To	Count	Threshold
Bin	0	1	2483	1
Bin	1	0	39035	1

Signal:

RAM_MEMORY(1)(4)

	From	To	Count	Threshold
Bin	0	1	2598	1
Bin	1	0	39191	1

Signal:

RAM_MEMORY(1)(3)

	From	To	Count	Threshold
Bin	0	1	2375	1
Bin	1	0	38767	1

Signal:

RAM_MEMORY(1)(2)

	From	To	Count	Threshold
Bin	0	1	2674	1
Bin	1	0	39133	1

Signal:

RAM_MEMORY(1)(1)

	From	To	Count	Threshold
Bin	0	1	2560	1
Bin	1	0	38863	1

Signal:

RAM_MEMORY(1)(0)

	From	To	Count	Threshold
Bin	0	1	2509	1
Bin	1	0	38891	1

Signal:

RAM_MEMORY(2)(31)

	From	To	Count	Threshold
Bin	0	1	304	1
Bin	1	0	44717	1

Signal:

RAM_MEMORY(2)(30)

	From	To	Count	Threshold
Bin	0	1	288	1
Bin	1	0	44680	1

Signal:

RAM_MEMORY(2)(29)

	From	To	Count	Threshold
Bin	0	1	307	1
Bin	1	0	44693	1

Signal:

RAM_MEMORY(2)(28)

	From	To	Count	Threshold
Bin	0	1	274	1
Bin	1	0	44697	1

Signal:

RAM_MEMORY(2)(27)

	From	To	Count	Threshold
Bin	0	1	291	1
Bin	1	0	44680	1

Signal:

RAM_MEMORY(2)(26)

	From	To	Count	Threshold
Bin	0	1	248	1
Bin	1	0	44645	1

Signal:

RAM_MEMORY(2)(25)

	From	To	Count	Threshold
Bin	0	1	331	1
Bin	1	0	44779	1

Signal:

RAM_MEMORY(2)(24)

	From	To	Count	Threshold
Bin	0	1	265	1
Bin	1	0	44666	1

Signal:

RAM_MEMORY(2)(23)

	From	To	Count	Threshold
Bin	0	1	339	1
Bin	1	0	44871	1

Signal:

RAM_MEMORY(2)(22)

	From	To	Count	Threshold
Bin	0	1	281	1
Bin	1	0	44757	1

Signal:

RAM_MEMORY(2)(21)

	From	To	Count	Threshold
Bin	0	1	334	1
Bin	1	0	44814	1

Signal:

RAM_MEMORY(2)(20)

	From	To	Count	Threshold
Bin	0	1	297	1
Bin	1	0	44770	1

Signal:

RAM_MEMORY(2)(19)

	From	To	Count	Threshold
Bin	0	1	273	1
Bin	1	0	44728	1

Signal:

RAM_MEMORY(2)(18)

	From	To	Count	Threshold
Bin	0	1	281	1
Bin	1	0	44740	1

Signal:

RAM_MEMORY(2)(17)

	From	To	Count	Threshold
Bin	0	1	239	1
Bin	1	0	44709	1

Signal:

RAM_MEMORY(2)(16)

	From	To	Count	Threshold
Bin	0	1	279	1
Bin	1	0	44738	1

Signal:

RAM_MEMORY(2)(15)

	From	To	Count	Threshold
Bin	0	1	321	1
Bin	1	0	44552	1

Signal:

RAM_MEMORY(2)(14)

	From	To	Count	Threshold
Bin	0	1	397	1
Bin	1	0	44581	1

Signal:

RAM_MEMORY(2)(13)

	From	To	Count	Threshold
Bin	0	1	357	1
Bin	1	0	44528	1

Signal:

RAM_MEMORY(2)(12)

	From	To	Count	Threshold
Bin	0	1	336	1
Bin	1	0	44509	1

Signal:

RAM_MEMORY(2)(11)

	From	To	Count	Threshold
Bin	0	1	328	1
Bin	1	0	44561	1

Signal:

RAM_MEMORY(2)(10)

	From	To	Count	Threshold
Bin	0	1	379	1
Bin	1	0	44541	1

Signal:

RAM_MEMORY(2)(9)

	From	To	Count	Threshold
Bin	0	1	311	1
Bin	1	0	44486	1

Signal:

RAM_MEMORY(2)(8)

	From	To	Count	Threshold
Bin	0	1	354	1
Bin	1	0	44520	1

Signal:

RAM_MEMORY(2)(7)

	From	To	Count	Threshold
Bin	0	1	366	1
Bin	1	0	44634	1

Signal:

RAM_MEMORY(2)(6)

	From	To	Count	Threshold
Bin	0	1	347	1
Bin	1	0	44616	1

Signal:

RAM_MEMORY(2)(5)

	From	To	Count	Threshold
Bin	0	1	383	1
Bin	1	0	44639	1

Signal:

RAM_MEMORY(2)(4)

	From	To	Count	Threshold
Bin	0	1	317	1
Bin	1	0	44657	1

Signal:

RAM_MEMORY(2)(3)

	From	To	Count	Threshold
Bin	0	1	378	1
Bin	1	0	44634	1

Signal:

RAM_MEMORY(2)(2)

	From	To	Count	Threshold
Bin	0	1	349	1
Bin	1	0	44617	1

Signal:

RAM_MEMORY(2)(1)

	From	To	Count	Threshold
Bin	0	1	331	1
Bin	1	0	44603	1

Signal:

RAM_MEMORY(2)(0)

	From	To	Count	Threshold
Bin	0	1	323	1
Bin	1	0	44596	1

Signal:

RAM_MEMORY(3)(31)

	From	To	Count	Threshold
Bin	0	1	377	1
Bin	1	0	43115	1

Signal:

RAM_MEMORY(3)(30)

	From	To	Count	Threshold
Bin	0	1	393	1
Bin	1	0	43172	1

Signal:

RAM_MEMORY(3)(29)

	From	To	Count	Threshold
Bin	0	1	318	1
Bin	1	0	43062	1

Signal:

RAM_MEMORY(3)(28)

	From	To	Count	Threshold
Bin	0	1	325	1
Bin	1	0	43066	1

Signal:

RAM_MEMORY(3)(27)

	From	To	Count	Threshold
Bin	0	1	344	1
Bin	1	0	43086	1

Signal:

RAM_MEMORY(3)(26)

	From	To	Count	Threshold
Bin	0	1	291	1
Bin	1	0	43045	1

Signal:

RAM_MEMORY(3)(25)

	From	To	Count	Threshold
Bin	0	1	309	1
Bin	1	0	43051	1

Signal:

RAM_MEMORY(3)(24)

	From	To	Count	Threshold
Bin	0	1	379	1
Bin	1	0	43117	1

Signal:

RAM_MEMORY(3)(23)

	From	To	Count	Threshold
Bin	0	1	326	1
Bin	1	0	43055	1

Signal:

RAM_MEMORY(3)(22)

	From	To	Count	Threshold
Bin	0	1	352	1
Bin	1	0	43073	1

Signal:

RAM_MEMORY(3)(21)

	From	To	Count	Threshold
Bin	0	1	327	1
Bin	1	0	43046	1

Signal:

RAM_MEMORY(3)(20)

	From	To	Count	Threshold
Bin	0	1	290	1
Bin	1	0	43012	1

Signal:

RAM_MEMORY(3)(19)

	From	To	Count	Threshold
Bin	0	1	337	1
Bin	1	0	43115	1

Signal:

RAM_MEMORY(3)(18)

	From	To	Count	Threshold
Bin	0	1	349	1
Bin	1	0	43070	1

Signal:

RAM_MEMORY(3)(17)

	From	To	Count	Threshold
Bin	0	1	337	1
Bin	1	0	43052	1

Signal:

RAM_MEMORY(3)(16)

	From	To	Count	Threshold
Bin	0	1	286	1
Bin	1	0	43012	1

Signal:

RAM_MEMORY(3)(15)

	From	To	Count	Threshold
Bin	0	1	375	1
Bin	1	0	43106	1

Signal:

RAM_MEMORY(3)(14)

	From	To	Count	Threshold
Bin	0	1	361	1
Bin	1	0	43033	1

Signal:

RAM_MEMORY(3)(13)

	From	To	Count	Threshold
Bin	0	1	334	1
Bin	1	0	43004	1

Signal:

RAM_MEMORY(3)(12)

	From	To	Count	Threshold
Bin	0	1	348	1
Bin	1	0	43020	1

Signal:

RAM_MEMORY(3)(11)

	From	To	Count	Threshold
Bin	0	1	356	1
Bin	1	0	43029	1

Signal:

RAM_MEMORY(3)(10)

	From	To	Count	Threshold
Bin	0	1	357	1
Bin	1	0	43028	1

Signal:

RAM_MEMORY(3)(9)

	From	To	Count	Threshold
Bin	0	1	369	1
Bin	1	0	43094	1

Signal:

RAM_MEMORY(3)(8)

	From	To	Count	Threshold
Bin	0	1	292	1
Bin	1	0	42968	1

Signal:

RAM_MEMORY(3)(7)

	From	To	Count	Threshold
Bin	0	1	361	1
Bin	1	0	43151	1

Signal:

RAM_MEMORY(3)(6)

	From	To	Count	Threshold
Bin	0	1	345	1
Bin	1	0	43140	1

Signal:

RAM_MEMORY(3)(5)

	From	To	Count	Threshold
Bin	0	1	316	1
Bin	1	0	43115	1

Signal:

RAM_MEMORY(3)(4)

	From	To	Count	Threshold
Bin	0	1	364	1
Bin	1	0	43153	1

Signal:

RAM_MEMORY(3)(3)

	From	To	Count	Threshold
Bin	0	1	378	1
Bin	1	0	43162	1

Signal:

RAM_MEMORY(3)(2)

	From	To	Count	Threshold
Bin	0	1	302	1
Bin	1	0	43102	1

Signal:

RAM_MEMORY(3)(1)

	From	To	Count	Threshold
Bin	0	1	333	1
Bin	1	0	43123	1

Signal:

RAM_MEMORY(3)(0)

	From	To	Count	Threshold
Bin	0	1	323	1
Bin	1	0	43113	1

Signal:

RAM_MEMORY(4)(31)

	From	To	Count	Threshold
Bin	0	1	3032	1
Bin	1	0	32494	1

Signal:

RAM_MEMORY(4)(30)

	From	To	Count	Threshold
Bin	0	1	3265	1
Bin	1	0	32963	1

Signal:

RAM_MEMORY(4)(29)

	From	To	Count	Threshold
Bin	0	1	3134	1
Bin	1	0	32808	1

Signal:

RAM_MEMORY(4)(28)

	From	To	Count	Threshold
Bin	0	1	3234	1
Bin	1	0	32739	1

Signal:

RAM_MEMORY(4)(27)

	From	To	Count	Threshold
Bin	0	1	3089	1
Bin	1	0	32533	1

Signal:

RAM_MEMORY(4)(26)

	From	To	Count	Threshold
Bin	0	1	3058	1
Bin	1	0	32537	1

Signal:

RAM_MEMORY(4)(25)

	From	To	Count	Threshold
Bin	0	1	3276	1
Bin	1	0	32579	1

Signal:

RAM_MEMORY(4)(24)

	From	To	Count	Threshold
Bin	0	1	3402	1
Bin	1	0	32882	1

Signal:

RAM_MEMORY(4)(23)

	From	To	Count	Threshold
Bin	0	1	3096	1
Bin	1	0	32390	1

Signal:

RAM_MEMORY(4)(22)

	From	To	Count	Threshold
Bin	0	1	3440	1
Bin	1	0	32648	1

Signal:

RAM_MEMORY(4)(21)

	From	To	Count	Threshold
Bin	0	1	3014	1
Bin	1	0	32415	1

Signal:

RAM_MEMORY(4)(20)

	From	To	Count	Threshold
Bin	0	1	3446	1
Bin	1	0	32675	1

Signal:

RAM_MEMORY(4)(19)

	From	To	Count	Threshold
Bin	0	1	3071	1
Bin	1	0	32664	1

Signal:

RAM_MEMORY(4)(18)

	From	To	Count	Threshold
Bin	0	1	3423	1
Bin	1	0	32677	1

Signal:

RAM_MEMORY(4)(17)

	From	To	Count	Threshold
Bin	0	1	3365	1
Bin	1	0	32673	1

Signal:

RAM_MEMORY(4)(16)

	From	To	Count	Threshold
Bin	0	1	3448	1
Bin	1	0	32464	1

Signal:

RAM_MEMORY(4)(15)

	From	To	Count	Threshold
Bin	0	1	3260	1
Bin	1	0	32172	1

Signal:

RAM_MEMORY(4)(14)

	From	To	Count	Threshold
Bin	0	1	3586	1
Bin	1	0	32402	1

Signal:

RAM_MEMORY(4)(13)

	From	To	Count	Threshold
Bin	0	1	3299	1
Bin	1	0	32334	1

Signal:

RAM_MEMORY(4)(12)

	From	To	Count	Threshold
Bin	0	1	3667	1
Bin	1	0	32661	1

Signal:

RAM_MEMORY(4)(11)

	From	To	Count	Threshold
Bin	0	1	3265	1
Bin	1	0	32469	1

Signal:

RAM_MEMORY(4)(10)

	From	To	Count	Threshold
Bin	0	1	3596	1
Bin	1	0	32390	1

Signal:

RAM_MEMORY(4)(9)

	From	To	Count	Threshold
Bin	0	1	3285	1
Bin	1	0	32133	1

Signal:

RAM_MEMORY(4)(8)

	From	To	Count	Threshold
Bin	0	1	3534	1
Bin	1	0	32219	1

Signal:

RAM_MEMORY(4)(7)

	From	To	Count	Threshold
Bin	0	1	4051	1
Bin	1	0	31166	1

Signal:

RAM_MEMORY(4)(6)

	From	To	Count	Threshold
Bin	0	1	3748	1
Bin	1	0	31026	1

Signal:

RAM_MEMORY(4)(5)

	From	To	Count	Threshold
Bin	0	1	3722	1
Bin	1	0	31286	1

Signal:

RAM_MEMORY(4)(4)

	From	To	Count	Threshold
Bin	0	1	3786	1
Bin	1	0	31260	1

Signal:

RAM_MEMORY(4)(3)

	From	To	Count	Threshold
Bin	0	1	3615	1
Bin	1	0	31146	1

Signal:

RAM_MEMORY(4)(2)

	From	To	Count	Threshold
Bin	0	1	3679	1
Bin	1	0	31223	1

Signal:

RAM_MEMORY(4)(1)

	From	To	Count	Threshold
Bin	0	1	3582	1
Bin	1	0	31022	1

Signal:

RAM_MEMORY(4)(0)

	From	To	Count	Threshold
Bin	0	1	3891	1
Bin	1	0	31209	1

Signal:

RAM_MEMORY(5)(31)

	From	To	Count	Threshold
Bin	0	1	2846	1
Bin	1	0	32696	1

Signal:

RAM_MEMORY(5)(30)

	From	To	Count	Threshold
Bin	0	1	2647	1
Bin	1	0	32489	1

Signal:

RAM_MEMORY(5)(29)

	From	To	Count	Threshold
Bin	0	1	2626	1
Bin	1	0	32536	1

Signal:

RAM_MEMORY(5)(28)

	From	To	Count	Threshold
Bin	0	1	2677	1
Bin	1	0	32295	1

Signal:

RAM_MEMORY(5)(27)

	From	To	Count	Threshold
Bin	0	1	2736	1
Bin	1	0	32791	1

Signal:

RAM_MEMORY(5)(26)

	From	To	Count	Threshold
Bin	0	1	2731	1
Bin	1	0	32521	1

Signal:

RAM_MEMORY(5)(25)

	From	To	Count	Threshold
Bin	0	1	2745	1
Bin	1	0	32622	1

Signal:

RAM_MEMORY(5)(24)

	From	To	Count	Threshold
Bin	0	1	2923	1
Bin	1	0	32695	1

Signal:

RAM_MEMORY(5)(23)

	From	To	Count	Threshold
Bin	0	1	2953	1
Bin	1	0	32082	1

Signal:

RAM_MEMORY(5)(22)

	From	To	Count	Threshold
Bin	0	1	3031	1
Bin	1	0	31890	1

Signal:

RAM_MEMORY(5)(21)

	From	To	Count	Threshold
Bin	0	1	2951	1
Bin	1	0	32440	1

Signal:

RAM_MEMORY(5)(20)

	From	To	Count	Threshold
Bin	0	1	2858	1
Bin	1	0	31902	1

Signal:

RAM_MEMORY(5)(19)

	From	To	Count	Threshold
Bin	0	1	2961	1
Bin	1	0	32377	1

Signal:

RAM_MEMORY(5)(18)

	From	To	Count	Threshold
Bin	0	1	3016	1
Bin	1	0	32071	1

Signal:

RAM_MEMORY(5)(17)

	From	To	Count	Threshold
Bin	0	1	3010	1
Bin	1	0	31938	1

Signal:

RAM_MEMORY(5)(16)

	From	To	Count	Threshold
Bin	0	1	2857	1
Bin	1	0	31893	1

Signal:

RAM_MEMORY(5)(15)

	From	To	Count	Threshold
Bin	0	1	2891	1
Bin	1	0	31446	1

Signal:

RAM_MEMORY(5)(14)

	From	To	Count	Threshold
Bin	0	1	3047	1
Bin	1	0	31378	1

Signal:

RAM_MEMORY(5)(13)

	From	To	Count	Threshold
Bin	0	1	3280	1
Bin	1	0	32021	1

Signal:

RAM_MEMORY(5)(12)

	From	To	Count	Threshold
Bin	0	1	2887	1
Bin	1	0	31635	1

Signal:

RAM_MEMORY(5)(11)

	From	To	Count	Threshold
Bin	0	1	2834	1
Bin	1	0	31678	1

Signal:

RAM_MEMORY(5)(10)

	From	To	Count	Threshold
Bin	0	1	3027	1
Bin	1	0	31512	1

Signal:

RAM_MEMORY(5)(9)

	From	To	Count	Threshold
Bin	0	1	3069	1
Bin	1	0	31513	1

Signal:

RAM_MEMORY(5)(8)

	From	To	Count	Threshold
Bin	0	1	3325	1
Bin	1	0	31416	1

Signal:

RAM_MEMORY(5)(7)

	From	To	Count	Threshold
Bin	0	1	3248	1
Bin	1	0	31677	1

Signal:

RAM_MEMORY(5)(6)

	From	To	Count	Threshold
Bin	0	1	3151	1
Bin	1	0	31468	1

Signal:

RAM_MEMORY(5)(5)

	From	To	Count	Threshold
Bin	0	1	3151	1
Bin	1	0	31788	1

Signal:

RAM_MEMORY(5)(4)

	From	To	Count	Threshold
Bin	0	1	3295	1
Bin	1	0	31083	1

Signal:

RAM_MEMORY(5)(3)

	From	To	Count	Threshold
Bin	0	1	3211	1
Bin	1	0	31594	1

Signal:

RAM_MEMORY(5)(2)

	From	To	Count	Threshold
Bin	0	1	3440	1
Bin	1	0	31350	1

Signal:

RAM_MEMORY(5)(1)

	From	To	Count	Threshold
Bin	0	1	3061	1
Bin	1	0	31331	1

Signal:

RAM_MEMORY(5)(0)

	From	To	Count	Threshold
Bin	0	1	3606	1
Bin	1	0	31375	1

Signal:

RAM_MEMORY(6)(31)

	From	To	Count	Threshold
Bin	0	1	1846	1
Bin	1	0	33539	1

Signal:

RAM_MEMORY(6)(30)

	From	To	Count	Threshold
Bin	0	1	2210	1
Bin	1	0	33862	1

Signal:

RAM_MEMORY(6)(29)

	From	To	Count	Threshold
Bin	0	1	2000	1
Bin	1	0	33619	1

Signal:

RAM_MEMORY(6)(28)

	From	To	Count	Threshold
Bin	0	1	2302	1
Bin	1	0	33769	1

Signal:

RAM_MEMORY(6)(27)

	From	To	Count	Threshold
Bin	0	1	2022	1
Bin	1	0	33677	1

Signal:

RAM_MEMORY(6)(26)

	From	To	Count	Threshold
Bin	0	1	2123	1
Bin	1	0	33489	1

Signal:

RAM_MEMORY(6)(25)

	From	To	Count	Threshold
Bin	0	1	1873	1
Bin	1	0	33537	1

Signal:

RAM_MEMORY(6)(24)

	From	To	Count	Threshold
Bin	0	1	2241	1
Bin	1	0	33473	1

Signal:

RAM_MEMORY(6)(23)

	From	To	Count	Threshold
Bin	0	1	1765	1
Bin	1	0	33484	1

Signal:

RAM_MEMORY(6)(22)

	From	To	Count	Threshold
Bin	0	1	2010	1
Bin	1	0	33674	1

Signal:

RAM_MEMORY(6)(21)

	From	To	Count	Threshold
Bin	0	1	1785	1
Bin	1	0	33639	1

Signal:

RAM_MEMORY(6)(20)

	From	To	Count	Threshold
Bin	0	1	2071	1
Bin	1	0	33618	1

Signal:

RAM_MEMORY(6)(19)

	From	To	Count	Threshold
Bin	0	1	2028	1
Bin	1	0	33820	1

Signal:

RAM_MEMORY(6)(18)

	From	To	Count	Threshold
Bin	0	1	2161	1
Bin	1	0	33603	1

Signal:

RAM_MEMORY(6)(17)

	From	To	Count	Threshold
Bin	0	1	1969	1
Bin	1	0	33894	1

Signal:

RAM_MEMORY(6)(16)

	From	To	Count	Threshold
Bin	0	1	2158	1
Bin	1	0	33886	1

Signal:

RAM_MEMORY(6)(15)

	From	To	Count	Threshold
Bin	0	1	1962	1
Bin	1	0	33479	1

Signal:

RAM_MEMORY(6)(14)

	From	To	Count	Threshold
Bin	0	1	2199	1
Bin	1	0	33831	1

Signal:

RAM_MEMORY(6)(13)

	From	To	Count	Threshold
Bin	0	1	1791	1
Bin	1	0	33642	1

Signal:

RAM_MEMORY(6)(12)

	From	To	Count	Threshold
Bin	0	1	2023	1
Bin	1	0	33422	1

Signal:

RAM_MEMORY(6)(11)

	From	To	Count	Threshold
Bin	0	1	1990	1
Bin	1	0	33860	1

Signal:

RAM_MEMORY(6)(10)

	From	To	Count	Threshold
Bin	0	1	2135	1
Bin	1	0	33477	1

Signal:

RAM_MEMORY(6)(9)

	From	To	Count	Threshold
Bin	0	1	2093	1
Bin	1	0	33555	1

Signal:

RAM_MEMORY(6)(8)

	From	To	Count	Threshold
Bin	0	1	2296	1
Bin	1	0	33745	1

Signal:

RAM_MEMORY(6)(7)

	From	To	Count	Threshold
Bin	0	1	1810	1
Bin	1	0	33502	1

Signal:

RAM_MEMORY(6)(6)

	From	To	Count	Threshold
Bin	0	1	2241	1
Bin	1	0	33661	1

Signal:

RAM_MEMORY(6)(5)

	From	To	Count	Threshold
Bin	0	1	2097	1
Bin	1	0	33588	1

Signal:

RAM_MEMORY(6)(4)

	From	To	Count	Threshold
Bin	0	1	2082	1
Bin	1	0	33664	1

Signal:

RAM_MEMORY(6)(3)

	From	To	Count	Threshold
Bin	0	1	2093	1
Bin	1	0	33719	1

Signal:

RAM_MEMORY(6)(2)

	From	To	Count	Threshold
Bin	0	1	2117	1
Bin	1	0	33472	1

Signal:

RAM_MEMORY(6)(1)

	From	To	Count	Threshold
Bin	0	1	1989	1
Bin	1	0	33476	1

Signal:

RAM_MEMORY(6)(0)

	From	To	Count	Threshold
Bin	0	1	2197	1
Bin	1	0	33363	1

Signal:

RAM_MEMORY(7)(31)

	From	To	Count	Threshold
Bin	0	1	1647	1
Bin	1	0	31871	1

Signal:

RAM_MEMORY(7)(30)

	From	To	Count	Threshold
Bin	0	1	2087	1
Bin	1	0	32534	1

Signal:

RAM_MEMORY(7)(29)

	From	To	Count	Threshold
Bin	0	1	1707	1
Bin	1	0	32377	1

Signal:

RAM_MEMORY(7)(28)

	From	To	Count	Threshold
Bin	0	1	1778	1
Bin	1	0	32065	1

Signal:

RAM_MEMORY(7)(27)

	From	To	Count	Threshold
Bin	0	1	1749	1
Bin	1	0	32098	1

Signal:

RAM_MEMORY(7)(26)

	From	To	Count	Threshold
Bin	0	1	2092	1
Bin	1	0	32255	1

Signal:

RAM_MEMORY(7)(25)

	From	To	Count	Threshold
Bin	0	1	1823	1
Bin	1	0	32100	1

Signal:

RAM_MEMORY(7)(24)

	From	To	Count	Threshold
Bin	0	1	2299	1
Bin	1	0	32214	1

Signal:

RAM_MEMORY(7)(23)

	From	To	Count	Threshold
Bin	0	1	1924	1
Bin	1	0	32467	1

Signal:

RAM_MEMORY(7)(22)

	From	To	Count	Threshold
Bin	0	1	1987	1
Bin	1	0	32370	1

Signal:

RAM_MEMORY(7)(21)

	From	To	Count	Threshold
Bin	0	1	2009	1
Bin	1	0	32356	1

Signal:

RAM_MEMORY(7)(20)

	From	To	Count	Threshold
Bin	0	1	2105	1
Bin	1	0	32469	1

Signal:

RAM_MEMORY(7)(19)

	From	To	Count	Threshold
Bin	0	1	1893	1
Bin	1	0	32160	1

Signal:

RAM_MEMORY(7)(18)

	From	To	Count	Threshold
Bin	0	1	2200	1
Bin	1	0	32402	1

Signal:

RAM_MEMORY(7)(17)

	From	To	Count	Threshold
Bin	0	1	1961	1
Bin	1	0	32418	1

Signal:

RAM_MEMORY(7)(16)

	From	To	Count	Threshold
Bin	0	1	2064	1
Bin	1	0	32158	1

Signal:

RAM_MEMORY(7)(15)

	From	To	Count	Threshold
Bin	0	1	1633	1
Bin	1	0	32025	1

Signal:

RAM_MEMORY(7)(14)

	From	To	Count	Threshold
Bin	0	1	2043	1
Bin	1	0	32595	1

Signal:

RAM_MEMORY(7)(13)

	From	To	Count	Threshold
Bin	0	1	1839	1
Bin	1	0	32168	1

Signal:

RAM_MEMORY(7)(12)

	From	To	Count	Threshold
Bin	0	1	2107	1
Bin	1	0	32632	1

Signal:

RAM_MEMORY(7)(11)

	From	To	Count	Threshold
Bin	0	1	1941	1
Bin	1	0	32579	1

Signal:

RAM_MEMORY(7)(10)

	From	To	Count	Threshold
Bin	0	1	1923	1
Bin	1	0	31902	1

Signal:

RAM_MEMORY(7)(9)

	From	To	Count	Threshold
Bin	0	1	1919	1
Bin	1	0	32083	1

Signal:

RAM_MEMORY(7)(8)

	From	To	Count	Threshold
Bin	0	1	1949	1
Bin	1	0	32054	1

Signal:

RAM_MEMORY(7)(7)

	From	To	Count	Threshold
Bin	0	1	1694	1
Bin	1	0	31942	1

Signal:

RAM_MEMORY(7)(6)

	From	To	Count	Threshold
Bin	0	1	2002	1
Bin	1	0	32366	1

Signal:

RAM_MEMORY(7)(5)

	From	To	Count	Threshold
Bin	0	1	1831	1
Bin	1	0	32317	1

Signal:

RAM_MEMORY(7)(4)

	From	To	Count	Threshold
Bin	0	1	2119	1
Bin	1	0	32419	1

Signal:

RAM_MEMORY(7)(3)

	From	To	Count	Threshold
Bin	0	1	1677	1
Bin	1	0	32563	1

Signal:

RAM_MEMORY(7)(2)

	From	To	Count	Threshold
Bin	0	1	2050	1
Bin	1	0	32207	1

Signal:

RAM_MEMORY(7)(1)

	From	To	Count	Threshold
Bin	0	1	1877	1
Bin	1	0	32203	1

Signal:

RAM_MEMORY(7)(0)

	From	To	Count	Threshold
Bin	0	1	2094	1
Bin	1	0	31989	1

Signal:

RAM_MEMORY(8)(31)

	From	To	Count	Threshold
Bin	0	1	1679	1
Bin	1	0	30800	1

Signal:

RAM_MEMORY(8)(30)

	From	To	Count	Threshold
Bin	0	1	2116	1
Bin	1	0	31071	1

Signal:

RAM_MEMORY(8)(29)

	From	To	Count	Threshold
Bin	0	1	1464	1
Bin	1	0	31006	1

Signal:

RAM_MEMORY(8)(28)

	From	To	Count	Threshold
Bin	0	1	1767	1
Bin	1	0	31013	1

Signal:

RAM_MEMORY(8)(27)

	From	To	Count	Threshold
Bin	0	1	1728	1
Bin	1	0	31301	1

Signal:

RAM_MEMORY(8)(26)

	From	To	Count	Threshold
Bin	0	1	2014	1
Bin	1	0	30933	1

Signal:

RAM_MEMORY(8)(25)

	From	To	Count	Threshold
Bin	0	1	1838	1
Bin	1	0	31121	1

Signal:

RAM_MEMORY(8)(24)

	From	To	Count	Threshold
Bin	0	1	2107	1
Bin	1	0	31278	1

Signal:

RAM_MEMORY(8)(23)

	From	To	Count	Threshold
Bin	0	1	1719	1
Bin	1	0	30742	1

Signal:

RAM_MEMORY(8)(22)

	From	To	Count	Threshold
Bin	0	1	1812	1
Bin	1	0	30947	1

Signal:

RAM_MEMORY(8)(21)

	From	To	Count	Threshold
Bin	0	1	1729	1
Bin	1	0	31135	1

Signal:

RAM_MEMORY(8)(20)

	From	To	Count	Threshold
Bin	0	1	1967	1
Bin	1	0	31182	1

Signal:

RAM_MEMORY(8)(19)

	From	To	Count	Threshold
Bin	0	1	1511	1
Bin	1	0	30817	1

Signal:

RAM_MEMORY(8)(18)

	From	To	Count	Threshold
Bin	0	1	2075	1
Bin	1	0	31291	1

Signal:

RAM_MEMORY(8)(17)

	From	To	Count	Threshold
Bin	0	1	2019	1
Bin	1	0	31073	1

Signal:

RAM_MEMORY(8)(16)

	From	To	Count	Threshold
Bin	0	1	2041	1
Bin	1	0	30990	1

Signal:

RAM_MEMORY(8)(15)

	From	To	Count	Threshold
Bin	0	1	1796	1
Bin	1	0	31207	1

Signal:

RAM_MEMORY(8)(14)

	From	To	Count	Threshold
Bin	0	1	2128	1
Bin	1	0	31323	1

Signal:

RAM_MEMORY(8)(13)

	From	To	Count	Threshold
Bin	0	1	1477	1
Bin	1	0	30966	1

Signal:

RAM_MEMORY(8)(12)

	From	To	Count	Threshold
Bin	0	1	1949	1
Bin	1	0	31119	1

Signal:

RAM_MEMORY(8)(11)

	From	To	Count	Threshold
Bin	0	1	1801	1
Bin	1	0	31358	1

Signal:

RAM_MEMORY(8)(10)

	From	To	Count	Threshold
Bin	0	1	2097	1
Bin	1	0	30914	1

Signal:

RAM_MEMORY(8)(9)

	From	To	Count	Threshold
Bin	0	1	1778	1
Bin	1	0	31068	1

Signal:

RAM_MEMORY(8)(8)

	From	To	Count	Threshold
Bin	0	1	2250	1
Bin	1	0	31258	1

Signal:

RAM_MEMORY(8)(7)

	From	To	Count	Threshold
Bin	0	1	1611	1
Bin	1	0	30787	1

Signal:

RAM_MEMORY(8)(6)

	From	To	Count	Threshold
Bin	0	1	2213	1
Bin	1	0	31132	1

Signal:

RAM_MEMORY(8)(5)

	From	To	Count	Threshold
Bin	0	1	1581	1
Bin	1	0	30883	1

Signal:

RAM_MEMORY(8)(4)

	From	To	Count	Threshold
Bin	0	1	1645	1
Bin	1	0	30934	1

Signal:

RAM_MEMORY(8)(3)

	From	To	Count	Threshold
Bin	0	1	1902	1
Bin	1	0	31296	1

Signal:

RAM_MEMORY(8)(2)

	From	To	Count	Threshold
Bin	0	1	1986	1
Bin	1	0	31005	1

Signal:

RAM_MEMORY(8)(1)

	From	To	Count	Threshold
Bin	0	1	1841	1
Bin	1	0	31249	1

Signal:

RAM_MEMORY(8)(0)

	From	To	Count	Threshold
Bin	0	1	2097	1
Bin	1	0	30963	1

Signal:

RAM_MEMORY(9)(31)

	From	To	Count	Threshold
Bin	0	1	1672	1
Bin	1	0	29704	1

Signal:

RAM_MEMORY(9)(30)

	From	To	Count	Threshold
Bin	0	1	1860	1
Bin	1	0	29730	1

Signal:

RAM_MEMORY(9)(29)

	From	To	Count	Threshold
Bin	0	1	1752	1
Bin	1	0	29601	1

Signal:

RAM_MEMORY(9)(28)

	From	To	Count	Threshold
Bin	0	1	1972	1
Bin	1	0	29843	1

Signal:

RAM_MEMORY(9)(27)

	From	To	Count	Threshold
Bin	0	1	1505	1
Bin	1	0	29586	1

Signal:

RAM_MEMORY(9)(26)

	From	To	Count	Threshold
Bin	0	1	2056	1
Bin	1	0	29675	1

Signal:

RAM_MEMORY(9)(25)

	From	To	Count	Threshold
Bin	0	1	1639	1
Bin	1	0	29969	1

Signal:

RAM_MEMORY(9)(24)

	From	To	Count	Threshold
Bin	0	1	2057	1
Bin	1	0	29717	1

Signal:

RAM_MEMORY(9)(23)

	From	To	Count	Threshold
Bin	0	1	1546	1
Bin	1	0	29810	1

Signal:

RAM_MEMORY(9)(22)

	From	To	Count	Threshold
Bin	0	1	1991	1
Bin	1	0	30004	1

Signal:

RAM_MEMORY(9)(21)

	From	To	Count	Threshold
Bin	0	1	1472	1
Bin	1	0	29740	1

Signal:

RAM_MEMORY(9)(20)

	From	To	Count	Threshold
Bin	0	1	2123	1
Bin	1	0	29855	1

Signal:

RAM_MEMORY(9)(19)

	From	To	Count	Threshold
Bin	0	1	1734	1
Bin	1	0	30014	1

Signal:

RAM_MEMORY(9)(18)

	From	To	Count	Threshold
Bin	0	1	1731	1
Bin	1	0	29421	1

Signal:

RAM_MEMORY(9)(17)

	From	To	Count	Threshold
Bin	0	1	1726	1
Bin	1	0	29724	1

Signal:

RAM_MEMORY(9)(16)

	From	To	Count	Threshold
Bin	0	1	1779	1
Bin	1	0	29653	1

Signal:

RAM_MEMORY(9)(15)

	From	To	Count	Threshold
Bin	0	1	1861	1
Bin	1	0	29685	1

Signal:

RAM_MEMORY(9)(14)

	From	To	Count	Threshold
Bin	0	1	2068	1
Bin	1	0	30133	1

Signal:

RAM_MEMORY(9)(13)

	From	To	Count	Threshold
Bin	0	1	1704	1
Bin	1	0	29699	1

Signal:

RAM_MEMORY(9)(12)

	From	To	Count	Threshold
Bin	0	1	1788	1
Bin	1	0	29668	1

Signal:

RAM_MEMORY(9)(11)

	From	To	Count	Threshold
Bin	0	1	1799	1
Bin	1	0	29824	1

Signal:

RAM_MEMORY(9)(10)

	From	To	Count	Threshold
Bin	0	1	2034	1
Bin	1	0	29616	1

Signal:

RAM_MEMORY(9)(9)

	From	To	Count	Threshold
Bin	0	1	1626	1
Bin	1	0	29719	1

Signal:

RAM_MEMORY(9)(8)

	From	To	Count	Threshold
Bin	0	1	1952	1
Bin	1	0	29592	1

Signal:

RAM_MEMORY(9)(7)

	From	To	Count	Threshold
Bin	0	1	1360	1
Bin	1	0	29336	1

Signal:

RAM_MEMORY(9)(6)

	From	To	Count	Threshold
Bin	0	1	1891	1
Bin	1	0	29646	1

Signal:

RAM_MEMORY(9)(5)

	From	To	Count	Threshold
Bin	0	1	1582	1
Bin	1	0	29693	1

Signal:

RAM_MEMORY(9)(4)

	From	To	Count	Threshold
Bin	0	1	1940	1
Bin	1	0	29742	1

Signal:

RAM_MEMORY(9)(3)

	From	To	Count	Threshold
Bin	0	1	1680	1
Bin	1	0	29796	1

Signal:

RAM_MEMORY(9)(2)

	From	To	Count	Threshold
Bin	0	1	1803	1
Bin	1	0	29559	1

Signal:

RAM_MEMORY(9)(1)

	From	To	Count	Threshold
Bin	0	1	1745	1
Bin	1	0	29438	1

Signal:

RAM_MEMORY(9)(0)

	From	To	Count	Threshold
Bin	0	1	2201	1
Bin	1	0	29677	1

Signal:

RAM_MEMORY(10)(31)

	From	To	Count	Threshold
Bin	0	1	1321	1
Bin	1	0	29095	1

Signal:

RAM_MEMORY(10)(30)

	From	To	Count	Threshold
Bin	0	1	1461	1
Bin	1	0	29029	1

Signal:

RAM_MEMORY(10)(29)

	From	To	Count	Threshold
Bin	0	1	1317	1
Bin	1	0	29293	1

Signal:

RAM_MEMORY(10)(28)

	From	To	Count	Threshold
Bin	0	1	1570	1
Bin	1	0	29239	1

Signal:

RAM_MEMORY(10)(27)

	From	To	Count	Threshold
Bin	0	1	1366	1
Bin	1	0	29195	1

Signal:

RAM_MEMORY(10)(26)

	From	To	Count	Threshold
Bin	0	1	1718	1
Bin	1	0	28994	1

Signal:

RAM_MEMORY(10)(25)

	From	To	Count	Threshold
Bin	0	1	1438	1
Bin	1	0	29246	1

Signal:

RAM_MEMORY(10)(24)

	From	To	Count	Threshold
Bin	0	1	1736	1
Bin	1	0	29095	1

Signal:

RAM_MEMORY(10)(23)

	From	To	Count	Threshold
Bin	0	1	1237	1
Bin	1	0	28899	1

Signal:

RAM_MEMORY(10)(22)

	From	To	Count	Threshold
Bin	0	1	1708	1
Bin	1	0	29289	1

Signal:

RAM_MEMORY(10)(21)

	From	To	Count	Threshold
Bin	0	1	1622	1
Bin	1	0	29448	1

Signal:

RAM_MEMORY(10)(20)

	From	To	Count	Threshold
Bin	0	1	1226	1
Bin	1	0	29017	1

Signal:

RAM_MEMORY(10)(19)

	From	To	Count	Threshold
Bin	0	1	1204	1
Bin	1	0	29109	1

Signal:

RAM_MEMORY(10)(18)

	From	To	Count	Threshold
Bin	0	1	1389	1
Bin	1	0	29140	1

Signal:

RAM_MEMORY(10)(17)

	From	To	Count	Threshold
Bin	0	1	1174	1
Bin	1	0	29142	1

Signal:

RAM_MEMORY(10)(16)

	From	To	Count	Threshold
Bin	0	1	1745	1
Bin	1	0	29259	1

Signal:

RAM_MEMORY(10)(15)

	From	To	Count	Threshold
Bin	0	1	1022	1
Bin	1	0	29061	1

Signal:

RAM_MEMORY(10)(14)

	From	To	Count	Threshold
Bin	0	1	1490	1
Bin	1	0	29094	1

Signal:

RAM_MEMORY(10)(13)

	From	To	Count	Threshold
Bin	0	1	1189	1
Bin	1	0	29079	1

Signal:

RAM_MEMORY(10)(12)

	From	To	Count	Threshold
Bin	0	1	1531	1
Bin	1	0	29202	1

Signal:

RAM_MEMORY(10)(11)

	From	To	Count	Threshold
Bin	0	1	1247	1
Bin	1	0	29139	1

Signal:

RAM_MEMORY(10)(10)

	From	To	Count	Threshold
Bin	0	1	1510	1
Bin	1	0	29072	1

Signal:

RAM_MEMORY(10)(9)

	From	To	Count	Threshold
Bin	0	1	1484	1
Bin	1	0	29342	1

Signal:

RAM_MEMORY(10)(8)

	From	To	Count	Threshold
Bin	0	1	1437	1
Bin	1	0	28944	1

Signal:

RAM_MEMORY(10)(7)

	From	To	Count	Threshold
Bin	0	1	1235	1
Bin	1	0	29059	1

Signal:

RAM_MEMORY(10)(6)

	From	To	Count	Threshold
Bin	0	1	1705	1
Bin	1	0	29156	1

Signal:

RAM_MEMORY(10)(5)

	From	To	Count	Threshold
Bin	0	1	1399	1
Bin	1	0	29176	1

Signal:

RAM_MEMORY(10)(4)

	From	To	Count	Threshold
Bin	0	1	1315	1
Bin	1	0	29004	1

Signal:

RAM_MEMORY(10)(3)

	From	To	Count	Threshold
Bin	0	1	1157	1
Bin	1	0	29135	1

Signal:

RAM_MEMORY(10)(2)

	From	To	Count	Threshold
Bin	0	1	1564	1
Bin	1	0	29023	1

Signal:

RAM_MEMORY(10)(1)

	From	To	Count	Threshold
Bin	0	1	1518	1
Bin	1	0	29164	1

Signal:

RAM_MEMORY(10)(0)

	From	To	Count	Threshold
Bin	0	1	1498	1
Bin	1	0	29086	1

Signal:

RAM_MEMORY(11)(31)

	From	To	Count	Threshold
Bin	0	1	1416	1
Bin	1	0	27494	1

Signal:

RAM_MEMORY(11)(30)

	From	To	Count	Threshold
Bin	0	1	1654	1
Bin	1	0	27877	1

Signal:

RAM_MEMORY(11)(29)

	From	To	Count	Threshold
Bin	0	1	1386	1
Bin	1	0	27666	1

Signal:

RAM_MEMORY(11)(28)

	From	To	Count	Threshold
Bin	0	1	1636	1
Bin	1	0	27652	1

Signal:

RAM_MEMORY(11)(27)

	From	To	Count	Threshold
Bin	0	1	1191	1
Bin	1	0	27569	1

Signal:

RAM_MEMORY(11)(26)

	From	To	Count	Threshold
Bin	0	1	1478	1
Bin	1	0	27668	1

Signal:

RAM_MEMORY(11)(25)

	From	To	Count	Threshold
Bin	0	1	1430	1
Bin	1	0	27593	1

Signal:

RAM_MEMORY(11)(24)

	From	To	Count	Threshold
Bin	0	1	1620	1
Bin	1	0	27861	1

Signal:

RAM_MEMORY(11)(23)

	From	To	Count	Threshold
Bin	0	1	1104	1
Bin	1	0	27305	1

Signal:

RAM_MEMORY(11)(22)

	From	To	Count	Threshold
Bin	0	1	1497	1
Bin	1	0	27785	1

Signal:

RAM_MEMORY(11)(21)

	From	To	Count	Threshold
Bin	0	1	1441	1
Bin	1	0	27795	1

Signal:

RAM_MEMORY(11)(20)

	From	To	Count	Threshold
Bin	0	1	1617	1
Bin	1	0	27800	1

Signal:

RAM_MEMORY(11)(19)

	From	To	Count	Threshold
Bin	0	1	1301	1
Bin	1	0	27807	1

Signal:

RAM_MEMORY(11)(18)

	From	To	Count	Threshold
Bin	0	1	1554	1
Bin	1	0	27669	1

Signal:

RAM_MEMORY(11)(17)

	From	To	Count	Threshold
Bin	0	1	1441	1
Bin	1	0	27790	1

Signal:

RAM_MEMORY(11)(16)

	From	To	Count	Threshold
Bin	0	1	1596	1
Bin	1	0	27605	1

Signal:

RAM_MEMORY(11)(15)

	From	To	Count	Threshold
Bin	0	1	1272	1
Bin	1	0	27754	1

Signal:

RAM_MEMORY(11)(14)

	From	To	Count	Threshold
Bin	0	1	1595	1
Bin	1	0	27763	1

Signal:

RAM_MEMORY(11)(13)

	From	To	Count	Threshold
Bin	0	1	1526	1
Bin	1	0	27681	1

Signal:

RAM_MEMORY(11)(12)

	From	To	Count	Threshold
Bin	0	1	1630	1
Bin	1	0	28004	1

Signal:

RAM_MEMORY(11)(11)

	From	To	Count	Threshold
Bin	0	1	1238	1
Bin	1	0	27594	1

Signal:

RAM_MEMORY(11)(10)

	From	To	Count	Threshold
Bin	0	1	1548	1
Bin	1	0	27894	1

Signal:

RAM_MEMORY(11)(9)

	From	To	Count	Threshold
Bin	0	1	1290	1
Bin	1	0	27563	1

Signal:

RAM_MEMORY(11)(8)

	From	To	Count	Threshold
Bin	0	1	1500	1
Bin	1	0	27669	1

Signal:

RAM_MEMORY(11)(7)

	From	To	Count	Threshold
Bin	0	1	1371	1
Bin	1	0	27748	1

Signal:

RAM_MEMORY(11)(6)

	From	To	Count	Threshold
Bin	0	1	1701	1
Bin	1	0	27653	1

Signal:

RAM_MEMORY(11)(5)

	From	To	Count	Threshold
Bin	0	1	1338	1
Bin	1	0	27578	1

Signal:

RAM_MEMORY(11)(4)

	From	To	Count	Threshold
Bin	0	1	1689	1
Bin	1	0	27895	1

Signal:

RAM_MEMORY(11)(3)

	From	To	Count	Threshold
Bin	0	1	1337	1
Bin	1	0	27680	1

Signal:

RAM_MEMORY(11)(2)

	From	To	Count	Threshold
Bin	0	1	1730	1
Bin	1	0	27716	1

Signal:

RAM_MEMORY(11)(1)

	From	To	Count	Threshold
Bin	0	1	1131	1
Bin	1	0	27467	1

Signal:

RAM_MEMORY(11)(0)

	From	To	Count	Threshold
Bin	0	1	1565	1
Bin	1	0	27592	1

Signal:

RAM_MEMORY(12)(31)

	From	To	Count	Threshold
Bin	0	1	1356	1
Bin	1	0	26264	1

Signal:

RAM_MEMORY(12)(30)

	From	To	Count	Threshold
Bin	0	1	1413	1
Bin	1	0	26495	1

Signal:

RAM_MEMORY(12)(29)

	From	To	Count	Threshold
Bin	0	1	1154	1
Bin	1	0	26419	1

Signal:

RAM_MEMORY(12)(28)

	From	To	Count	Threshold
Bin	0	1	1525	1
Bin	1	0	26877	1

Signal:

RAM_MEMORY(12)(27)

	From	To	Count	Threshold
Bin	0	1	1269	1
Bin	1	0	26896	1

Signal:

RAM_MEMORY(12)(26)

	From	To	Count	Threshold
Bin	0	1	1408	1
Bin	1	0	26756	1

Signal:

RAM_MEMORY(12)(25)

	From	To	Count	Threshold
Bin	0	1	1254	1
Bin	1	0	26321	1

Signal:

RAM_MEMORY(12)(24)

	From	To	Count	Threshold
Bin	0	1	1311	1
Bin	1	0	26733	1

Signal:

RAM_MEMORY(12)(23)

	From	To	Count	Threshold
Bin	0	1	1057	1
Bin	1	0	26458	1

Signal:

RAM_MEMORY(12)(22)

	From	To	Count	Threshold
Bin	0	1	1454	1
Bin	1	0	26529	1

Signal:

RAM_MEMORY(12)(21)

	From	To	Count	Threshold
Bin	0	1	1163	1
Bin	1	0	26498	1

Signal:

RAM_MEMORY(12)(20)

	From	To	Count	Threshold
Bin	0	1	1342	1
Bin	1	0	26838	1

Signal:

RAM_MEMORY(12)(19)

	From	To	Count	Threshold
Bin	0	1	1057	1
Bin	1	0	26455	1

Signal:

RAM_MEMORY(12)(18)

	From	To	Count	Threshold
Bin	0	1	1418	1
Bin	1	0	26423	1

Signal:

RAM_MEMORY(12)(17)

	From	To	Count	Threshold
Bin	0	1	1182	1
Bin	1	0	26432	1

Signal:

RAM_MEMORY(12)(16)

	From	To	Count	Threshold
Bin	0	1	1575	1
Bin	1	0	26536	1

Signal:

RAM_MEMORY(12)(15)

	From	To	Count	Threshold
Bin	0	1	947	1
Bin	1	0	26283	1

Signal:

RAM_MEMORY(12)(14)

	From	To	Count	Threshold
Bin	0	1	1316	1
Bin	1	0	26929	1

Signal:

RAM_MEMORY(12)(13)

	From	To	Count	Threshold
Bin	0	1	1115	1
Bin	1	0	26666	1

Signal:

RAM_MEMORY(12)(12)

	From	To	Count	Threshold
Bin	0	1	1393	1
Bin	1	0	26918	1

Signal:

RAM_MEMORY(12)(11)

	From	To	Count	Threshold
Bin	0	1	1029	1
Bin	1	0	26650	1

Signal:

RAM_MEMORY(12)(10)

	From	To	Count	Threshold
Bin	0	1	1552	1
Bin	1	0	26895	1

Signal:

RAM_MEMORY(12)(9)

	From	To	Count	Threshold
Bin	0	1	1138	1
Bin	1	0	26898	1

Signal:

RAM_MEMORY(12)(8)

	From	To	Count	Threshold
Bin	0	1	1481	1
Bin	1	0	26728	1

Signal:

RAM_MEMORY(12)(7)

	From	To	Count	Threshold
Bin	0	1	1439	1
Bin	1	0	26432	1

Signal:

RAM_MEMORY(12)(6)

	From	To	Count	Threshold
Bin	0	1	1884	1
Bin	1	0	26691	1

Signal:

RAM_MEMORY(12)(5)

	From	To	Count	Threshold
Bin	0	1	1164	1
Bin	1	0	26612	1

Signal:

RAM_MEMORY(12)(4)

	From	To	Count	Threshold
Bin	0	1	1395	1
Bin	1	0	26891	1

Signal:

RAM_MEMORY(12)(3)

	From	To	Count	Threshold
Bin	0	1	1514	1
Bin	1	0	26562	1

Signal:

RAM_MEMORY(12)(2)

	From	To	Count	Threshold
Bin	0	1	1190	1
Bin	1	0	26594	1

Signal:

RAM_MEMORY(12)(1)

	From	To	Count	Threshold
Bin	0	1	1186	1
Bin	1	0	26398	1

Signal:

RAM_MEMORY(12)(0)

	From	To	Count	Threshold
Bin	0	1	1489	1
Bin	1	0	26892	1

Signal:

RAM_MEMORY(13)(31)

	From	To	Count	Threshold
Bin	0	1	1103	1
Bin	1	0	24692	1

Signal:

RAM_MEMORY(13)(30)

	From	To	Count	Threshold
Bin	0	1	1434	1
Bin	1	0	25013	1

Signal:

RAM_MEMORY(13)(29)

	From	To	Count	Threshold
Bin	0	1	1188	1
Bin	1	0	25485	1

Signal:

RAM_MEMORY(13)(28)

	From	To	Count	Threshold
Bin	0	1	1601	1
Bin	1	0	25207	1

Signal:

RAM_MEMORY(13)(27)

	From	To	Count	Threshold
Bin	0	1	1488	1
Bin	1	0	24992	1

Signal:

RAM_MEMORY(13)(26)

	From	To	Count	Threshold
Bin	0	1	1595	1
Bin	1	0	24930	1

Signal:

RAM_MEMORY(13)(25)

	From	To	Count	Threshold
Bin	0	1	1095	1
Bin	1	0	24682	1

Signal:

RAM_MEMORY(13)(24)

	From	To	Count	Threshold
Bin	0	1	1205	1
Bin	1	0	24847	1

Signal:

RAM_MEMORY(13)(23)

	From	To	Count	Threshold
Bin	0	1	1328	1
Bin	1	0	25034	1

Signal:

RAM_MEMORY(13)(22)

	From	To	Count	Threshold
Bin	0	1	1458	1
Bin	1	0	25434	1

Signal:

RAM_MEMORY(13)(21)

	From	To	Count	Threshold
Bin	0	1	990	1
Bin	1	0	24983	1

Signal:

RAM_MEMORY(13)(20)

	From	To	Count	Threshold
Bin	0	1	1095	1
Bin	1	0	24847	1

Signal:

RAM_MEMORY(13)(19)

	From	To	Count	Threshold
Bin	0	1	1138	1
Bin	1	0	24964	1

Signal:

RAM_MEMORY(13)(18)

	From	To	Count	Threshold
Bin	0	1	1432	1
Bin	1	0	25017	1

Signal:

RAM_MEMORY(13)(17)

	From	To	Count	Threshold
Bin	0	1	1528	1
Bin	1	0	24968	1

Signal:

RAM_MEMORY(13)(16)

	From	To	Count	Threshold
Bin	0	1	1380	1
Bin	1	0	25292	1

Signal:

RAM_MEMORY(13)(15)

	From	To	Count	Threshold
Bin	0	1	910	1
Bin	1	0	25158	1

Signal:

RAM_MEMORY(13)(14)

	From	To	Count	Threshold
Bin	0	1	1363	1
Bin	1	0	25065	1

Signal:

RAM_MEMORY(13)(13)

	From	To	Count	Threshold
Bin	0	1	961	1
Bin	1	0	24979	1

Signal:

RAM_MEMORY(13)(12)

	From	To	Count	Threshold
Bin	0	1	1513	1
Bin	1	0	24935	1

Signal:

RAM_MEMORY(13)(11)

	From	To	Count	Threshold
Bin	0	1	1155	1
Bin	1	0	24906	1

Signal:

RAM_MEMORY(13)(10)

	From	To	Count	Threshold
Bin	0	1	1473	1
Bin	1	0	25452	1

Signal:

RAM_MEMORY(13)(9)

	From	To	Count	Threshold
Bin	0	1	1177	1
Bin	1	0	24759	1

Signal:

RAM_MEMORY(13)(8)

	From	To	Count	Threshold
Bin	0	1	1506	1
Bin	1	0	25211	1

Signal:

RAM_MEMORY(13)(7)

	From	To	Count	Threshold
Bin	0	1	1012	1
Bin	1	0	25346	1

Signal:

RAM_MEMORY(13)(6)

	From	To	Count	Threshold
Bin	0	1	1203	1
Bin	1	0	24940	1

Signal:

RAM_MEMORY(13)(5)

	From	To	Count	Threshold
Bin	0	1	1152	1
Bin	1	0	24976	1

Signal:

RAM_MEMORY(13)(4)

	From	To	Count	Threshold
Bin	0	1	1769	1
Bin	1	0	25135	1

Signal:

RAM_MEMORY(13)(3)

	From	To	Count	Threshold
Bin	0	1	1080	1
Bin	1	0	25108	1

Signal:

RAM_MEMORY(13)(2)

	From	To	Count	Threshold
Bin	0	1	1679	1
Bin	1	0	25006	1

Signal:

RAM_MEMORY(13)(1)

	From	To	Count	Threshold
Bin	0	1	978	1
Bin	1	0	24794	1

Signal:

RAM_MEMORY(13)(0)

	From	To	Count	Threshold
Bin	0	1	1703	1
Bin	1	0	24923	1

Signal:

RAM_MEMORY(14)(31)

	From	To	Count	Threshold
Bin	0	1	1237	1
Bin	1	0	23837	1

Signal:

RAM_MEMORY(14)(30)

	From	To	Count	Threshold
Bin	0	1	1117	1
Bin	1	0	23311	1

Signal:

RAM_MEMORY(14)(29)

	From	To	Count	Threshold
Bin	0	1	937	1
Bin	1	0	23392	1

Signal:

RAM_MEMORY(14)(28)

	From	To	Count	Threshold
Bin	0	1	1496	1
Bin	1	0	23472	1

Signal:

RAM_MEMORY(14)(27)

	From	To	Count	Threshold
Bin	0	1	1525	1
Bin	1	0	23600	1

Signal:

RAM_MEMORY(14)(26)

	From	To	Count	Threshold
Bin	0	1	1587	1
Bin	1	0	23486	1

Signal:

RAM_MEMORY(14)(25)

	From	To	Count	Threshold
Bin	0	1	1204	1
Bin	1	0	24000	1

Signal:

RAM_MEMORY(14)(24)

	From	To	Count	Threshold
Bin	0	1	1110	1
Bin	1	0	23343	1

Signal:

RAM_MEMORY(14)(23)

	From	To	Count	Threshold
Bin	0	1	1025	1
Bin	1	0	23284	1

Signal:

RAM_MEMORY(14)(22)

	From	To	Count	Threshold
Bin	0	1	1555	1
Bin	1	0	23404	1

Signal:

RAM_MEMORY(14)(21)

	From	To	Count	Threshold
Bin	0	1	967	1
Bin	1	0	23417	1

Signal:

RAM_MEMORY(14)(20)

	From	To	Count	Threshold
Bin	0	1	1219	1
Bin	1	0	23426	1

Signal:

RAM_MEMORY(14)(19)

	From	To	Count	Threshold
Bin	0	1	1101	1
Bin	1	0	23793	1

Signal:

RAM_MEMORY(14)(18)

	From	To	Count	Threshold
Bin	0	1	1461	1
Bin	1	0	23782	1

Signal:

RAM_MEMORY(14)(17)

	From	To	Count	Threshold
Bin	0	1	975	1
Bin	1	0	23244	1

Signal:

RAM_MEMORY(14)(16)

	From	To	Count	Threshold
Bin	0	1	1396	1
Bin	1	0	23563	1

Signal:

RAM_MEMORY(14)(15)

	From	To	Count	Threshold
Bin	0	1	898	1
Bin	1	0	23130	1

Signal:

RAM_MEMORY(14)(14)

	From	To	Count	Threshold
Bin	0	1	1634	1
Bin	1	0	23470	1

Signal:

RAM_MEMORY(14)(13)

	From	To	Count	Threshold
Bin	0	1	1612	1
Bin	1	0	23677	1

Signal:

RAM_MEMORY(14)(12)

	From	To	Count	Threshold
Bin	0	1	1245	1
Bin	1	0	23427	1

Signal:

RAM_MEMORY(14)(11)

	From	To	Count	Threshold
Bin	0	1	1262	1
Bin	1	0	23825	1

Signal:

RAM_MEMORY(14)(10)

	From	To	Count	Threshold
Bin	0	1	1370	1
Bin	1	0	23448	1

Signal:

RAM_MEMORY(14)(9)

	From	To	Count	Threshold
Bin	0	1	1091	1
Bin	1	0	23802	1

Signal:

RAM_MEMORY(14)(8)

	From	To	Count	Threshold
Bin	0	1	1475	1
Bin	1	0	23873	1

Signal:

RAM_MEMORY(14)(7)

	From	To	Count	Threshold
Bin	0	1	940	1
Bin	1	0	23166	1

Signal:

RAM_MEMORY(14)(6)

	From	To	Count	Threshold
Bin	0	1	1318	1
Bin	1	0	23851	1

Signal:

RAM_MEMORY(14)(5)

	From	To	Count	Threshold
Bin	0	1	1565	1
Bin	1	0	23494	1

Signal:

RAM_MEMORY(14)(4)

	From	To	Count	Threshold
Bin	0	1	1450	1
Bin	1	0	23901	1

Signal:

RAM_MEMORY(14)(3)

	From	To	Count	Threshold
Bin	0	1	1117	1
Bin	1	0	23894	1

Signal:

RAM_MEMORY(14)(2)

	From	To	Count	Threshold
Bin	0	1	1725	1
Bin	1	0	23297	1

Signal:

RAM_MEMORY(14)(1)

	From	To	Count	Threshold
Bin	0	1	942	1
Bin	1	0	23171	1

Signal:

RAM_MEMORY(14)(0)

	From	To	Count	Threshold
Bin	0	1	1115	1
Bin	1	0	23283	1

Signal:

RAM_MEMORY(15)(31)

	From	To	Count	Threshold
Bin	0	1	1480	1
Bin	1	0	22032	1

Signal:

RAM_MEMORY(15)(30)

	From	To	Count	Threshold
Bin	0	1	1196	1
Bin	1	0	21972	1

Signal:

RAM_MEMORY(15)(29)

	From	To	Count	Threshold
Bin	0	1	1151	1
Bin	1	0	22240	1

Signal:

RAM_MEMORY(15)(28)

	From	To	Count	Threshold
Bin	0	1	1269	1
Bin	1	0	21899	1

Signal:

RAM_MEMORY(15)(27)

	From	To	Count	Threshold
Bin	0	1	977	1
Bin	1	0	22047	1

Signal:

RAM_MEMORY(15)(26)

	From	To	Count	Threshold
Bin	0	1	1473	1
Bin	1	0	21948	1

Signal:

RAM_MEMORY(15)(25)

	From	To	Count	Threshold
Bin	0	1	1136	1
Bin	1	0	21933	1

Signal:

RAM_MEMORY(15)(24)

	From	To	Count	Threshold
Bin	0	1	1383	1
Bin	1	0	22363	1

Signal:

RAM_MEMORY(15)(23)

	From	To	Count	Threshold
Bin	0	1	1146	1
Bin	1	0	21974	1

Signal:

RAM_MEMORY(15)(22)

	From	To	Count	Threshold
Bin	0	1	1040	1
Bin	1	0	21802	1

Signal:

RAM_MEMORY(15)(21)

	From	To	Count	Threshold
Bin	0	1	991	1
Bin	1	0	21931	1

Signal:

RAM_MEMORY(15)(20)

	From	To	Count	Threshold
Bin	0	1	1245	1
Bin	1	0	22195	1

Signal:

RAM_MEMORY(15)(19)

	From	To	Count	Threshold
Bin	0	1	1044	1
Bin	1	0	21996	1

Signal:

RAM_MEMORY(15)(18)

	From	To	Count	Threshold
Bin	0	1	1749	1
Bin	1	0	22036	1

Signal:

RAM_MEMORY(15)(17)

	From	To	Count	Threshold
Bin	0	1	1260	1
Bin	1	0	22287	1

Signal:

RAM_MEMORY(15)(16)

	From	To	Count	Threshold
Bin	0	1	1129	1
Bin	1	0	21877	1

Signal:

RAM_MEMORY(15)(15)

	From	To	Count	Threshold
Bin	0	1	1136	1
Bin	1	0	22208	1

Signal:

RAM_MEMORY(15)(14)

	From	To	Count	Threshold
Bin	0	1	1351	1
Bin	1	0	22046	1

Signal:

RAM_MEMORY(15)(13)

	From	To	Count	Threshold
Bin	0	1	1025	1
Bin	1	0	21848	1

Signal:

RAM_MEMORY(15)(12)

	From	To	Count	Threshold
Bin	0	1	1291	1
Bin	1	0	21819	1

Signal:

RAM_MEMORY(15)(11)

	From	To	Count	Threshold
Bin	0	1	1068	1
Bin	1	0	22011	1

Signal:

RAM_MEMORY(15)(10)

	From	To	Count	Threshold
Bin	0	1	1185	1
Bin	1	0	21746	1

Signal:

RAM_MEMORY(15)(9)

	From	To	Count	Threshold
Bin	0	1	875	1
Bin	1	0	21717	1

Signal:

RAM_MEMORY(15)(8)

	From	To	Count	Threshold
Bin	0	1	1816	1
Bin	1	0	21964	1

Signal:

RAM_MEMORY(15)(7)

	From	To	Count	Threshold
Bin	0	1	1056	1
Bin	1	0	21770	1

Signal:

RAM_MEMORY(15)(6)

	From	To	Count	Threshold
Bin	0	1	1455	1
Bin	1	0	21736	1

Signal:

RAM_MEMORY(15)(5)

	From	To	Count	Threshold
Bin	0	1	1483	1
Bin	1	0	21960	1

Signal:

RAM_MEMORY(15)(4)

	From	To	Count	Threshold
Bin	0	1	1249	1
Bin	1	0	22033	1

Signal:

RAM_MEMORY(15)(3)

	From	To	Count	Threshold
Bin	0	1	1605	1
Bin	1	0	21970	1

Signal:

RAM_MEMORY(15)(2)

	From	To	Count	Threshold
Bin	0	1	1424	1
Bin	1	0	22295	1

Signal:

RAM_MEMORY(15)(1)

	From	To	Count	Threshold
Bin	0	1	1204	1
Bin	1	0	22244	1

Signal:

RAM_MEMORY(15)(0)

	From	To	Count	Threshold
Bin	0	1	1605	1
Bin	1	0	21898	1

Signal:

RAM_MEMORY(16)(31)

	From	To	Count	Threshold
Bin	0	1	1332	1
Bin	1	0	20953	1

Signal:

RAM_MEMORY(16)(30)

	From	To	Count	Threshold
Bin	0	1	803	1
Bin	1	0	21071	1

Signal:

RAM_MEMORY(16)(29)

	From	To	Count	Threshold
Bin	0	1	540	1
Bin	1	0	21361	1

Signal:

RAM_MEMORY(16)(28)

	From	To	Count	Threshold
Bin	0	1	696	1
Bin	1	0	21140	1

Signal:

RAM_MEMORY(16)(27)

	From	To	Count	Threshold
Bin	0	1	737	1
Bin	1	0	21500	1

Signal:

RAM_MEMORY(16)(26)

	From	To	Count	Threshold
Bin	0	1	999	1
Bin	1	0	21177	1

Signal:

RAM_MEMORY(16)(25)

	From	To	Count	Threshold
Bin	0	1	675	1
Bin	1	0	21158	1

Signal:

RAM_MEMORY(16)(24)

	From	To	Count	Threshold
Bin	0	1	1767	1
Bin	1	0	21156	1

Signal:

RAM_MEMORY(16)(23)

	From	To	Count	Threshold
Bin	0	1	716	1
Bin	1	0	21082	1

Signal:

RAM_MEMORY(16)(22)

	From	To	Count	Threshold
Bin	0	1	1254	1
Bin	1	0	21445	1

Signal:

RAM_MEMORY(16)(21)

	From	To	Count	Threshold
Bin	0	1	719	1
Bin	1	0	21424	1

Signal:

RAM_MEMORY(16)(20)

	From	To	Count	Threshold
Bin	0	1	1237	1
Bin	1	0	21124	1

Signal:

RAM_MEMORY(16)(19)

	From	To	Count	Threshold
Bin	0	1	1236	1
Bin	1	0	21512	1

Signal:

RAM_MEMORY(16)(18)

	From	To	Count	Threshold
Bin	0	1	1410	1
Bin	1	0	21510	1

Signal:

RAM_MEMORY(16)(17)

	From	To	Count	Threshold
Bin	0	1	1522	1
Bin	1	0	21011	1

Signal:

RAM_MEMORY(16)(16)

	From	To	Count	Threshold
Bin	0	1	761	1
Bin	1	0	21157	1

Signal:

RAM_MEMORY(16)(15)

	From	To	Count	Threshold
Bin	0	1	697	1
Bin	1	0	21073	1

Signal:

RAM_MEMORY(16)(14)

	From	To	Count	Threshold
Bin	0	1	1688	1
Bin	1	0	21079	1

Signal:

RAM_MEMORY(16)(13)

	From	To	Count	Threshold
Bin	0	1	1463	1
Bin	1	0	21026	1

Signal:

RAM_MEMORY(16)(12)

	From	To	Count	Threshold
Bin	0	1	1530	1
Bin	1	0	21199	1

Signal:

RAM_MEMORY(16)(11)

	From	To	Count	Threshold
Bin	0	1	1457	1
Bin	1	0	21009	1

Signal:

RAM_MEMORY(16)(10)

	From	To	Count	Threshold
Bin	0	1	1615	1
Bin	1	0	21210	1

Signal:

RAM_MEMORY(16)(9)

	From	To	Count	Threshold
Bin	0	1	1194	1
Bin	1	0	21420	1

Signal:

RAM_MEMORY(16)(8)

	From	To	Count	Threshold
Bin	0	1	1384	1
Bin	1	0	21070	1

Signal:

RAM_MEMORY(16)(7)

	From	To	Count	Threshold
Bin	0	1	1214	1
Bin	1	0	21356	1

Signal:

RAM_MEMORY(16)(6)

	From	To	Count	Threshold
Bin	0	1	717	1
Bin	1	0	21097	1

Signal:

RAM_MEMORY(16)(5)

	From	To	Count	Threshold
Bin	0	1	1106	1
Bin	1	0	21205	1

Signal:

RAM_MEMORY(16)(4)

	From	To	Count	Threshold
Bin	0	1	1139	1
Bin	1	0	21307	1

Signal:

RAM_MEMORY(16)(3)

	From	To	Count	Threshold
Bin	0	1	660	1
Bin	1	0	21544	1

Signal:

RAM_MEMORY(16)(2)

	From	To	Count	Threshold
Bin	0	1	1254	1
Bin	1	0	21357	1

Signal:

RAM_MEMORY(16)(1)

	From	To	Count	Threshold
Bin	0	1	1242	1
Bin	1	0	21434	1

Signal:

RAM_MEMORY(16)(0)

	From	To	Count	Threshold
Bin	0	1	957	1
Bin	1	0	21473	1

Signal:

RAM_MEMORY(17)(31)

	From	To	Count	Threshold
Bin	0	1	1112	1
Bin	1	0	19941	1

Signal:

RAM_MEMORY(17)(30)

	From	To	Count	Threshold
Bin	0	1	1567	1
Bin	1	0	19737	1

Signal:

RAM_MEMORY(17)(29)

	From	To	Count	Threshold
Bin	0	1	1240	1
Bin	1	0	19709	1

Signal:

RAM_MEMORY(17)(28)

	From	To	Count	Threshold
Bin	0	1	1227	1
Bin	1	0	19507	1

Signal:

RAM_MEMORY(17)(27)

	From	To	Count	Threshold
Bin	0	1	1470	1
Bin	1	0	19686	1

Signal:

RAM_MEMORY(17)(26)

	From	To	Count	Threshold
Bin	0	1	1361	1
Bin	1	0	19595	1

Signal:

RAM_MEMORY(17)(25)

	From	To	Count	Threshold
Bin	0	1	701	1
Bin	1	0	19979	1

Signal:

RAM_MEMORY(17)(24)

	From	To	Count	Threshold
Bin	0	1	1180	1
Bin	1	0	19717	1

Signal:

RAM_MEMORY(17)(23)

	From	To	Count	Threshold
Bin	0	1	746	1
Bin	1	0	19953	1

Signal:

RAM_MEMORY(17)(22)

	From	To	Count	Threshold
Bin	0	1	1592	1
Bin	1	0	19585	1

Signal:

RAM_MEMORY(17)(21)

	From	To	Count	Threshold
Bin	0	1	546	1
Bin	1	0	19512	1

Signal:

RAM_MEMORY(17)(20)

	From	To	Count	Threshold
Bin	0	1	850	1
Bin	1	0	19928	1

Signal:

RAM_MEMORY(17)(19)

	From	To	Count	Threshold
Bin	0	1	591	1
Bin	1	0	19493	1

Signal:

RAM_MEMORY(17)(18)

	From	To	Count	Threshold
Bin	0	1	1445	1
Bin	1	0	19582	1

Signal:

RAM_MEMORY(17)(17)

	From	To	Count	Threshold
Bin	0	1	770	1
Bin	1	0	19910	1

Signal:

RAM_MEMORY(17)(16)

	From	To	Count	Threshold
Bin	0	1	1289	1
Bin	1	0	19967	1

Signal:

RAM_MEMORY(17)(15)

	From	To	Count	Threshold
Bin	0	1	685	1
Bin	1	0	19514	1

Signal:

RAM_MEMORY(17)(14)

	From	To	Count	Threshold
Bin	0	1	767	1
Bin	1	0	19509	1

Signal:

RAM_MEMORY(17)(13)

	From	To	Count	Threshold
Bin	0	1	591	1
Bin	1	0	19625	1

Signal:

RAM_MEMORY(17)(12)

	From	To	Count	Threshold
Bin	0	1	1112	1
Bin	1	0	19641	1

Signal:

RAM_MEMORY(17)(11)

	From	To	Count	Threshold
Bin	0	1	1001	1
Bin	1	0	19692	1

Signal:

RAM_MEMORY(17)(10)

	From	To	Count	Threshold
Bin	0	1	728	1
Bin	1	0	19622	1

Signal:

RAM_MEMORY(17)(9)

	From	To	Count	Threshold
Bin	0	1	767	1
Bin	1	0	19939	1

Signal:

RAM_MEMORY(17)(8)

	From	To	Count	Threshold
Bin	0	1	1065	1
Bin	1	0	19464	1

Signal:

RAM_MEMORY(17)(7)

	From	To	Count	Threshold
Bin	0	1	1562	1
Bin	1	0	19764	1

Signal:

RAM_MEMORY(17)(6)

	From	To	Count	Threshold
Bin	0	1	1254	1
Bin	1	0	19649	1

Signal:

RAM_MEMORY(17)(5)

	From	To	Count	Threshold
Bin	0	1	1529	1
Bin	1	0	19621	1

Signal:

RAM_MEMORY(17)(4)

	From	To	Count	Threshold
Bin	0	1	1276	1
Bin	1	0	19700	1

Signal:

RAM_MEMORY(17)(3)

	From	To	Count	Threshold
Bin	0	1	1347	1
Bin	1	0	19663	1

Signal:

RAM_MEMORY(17)(2)

	From	To	Count	Threshold
Bin	0	1	1290	1
Bin	1	0	19914	1

Signal:

RAM_MEMORY(17)(1)

	From	To	Count	Threshold
Bin	0	1	1097	1
Bin	1	0	19543	1

Signal:

RAM_MEMORY(17)(0)

	From	To	Count	Threshold
Bin	0	1	1061	1
Bin	1	0	19597	1

Signal:

RAM_MEMORY(18)(31)

	From	To	Count	Threshold
Bin	0	1	1032	1
Bin	1	0	17947	1

Signal:

RAM_MEMORY(18)(30)

	From	To	Count	Threshold
Bin	0	1	1522	1
Bin	1	0	17987	1

Signal:

RAM_MEMORY(18)(29)

	From	To	Count	Threshold
Bin	0	1	1183	1
Bin	1	0	18024	1

Signal:

RAM_MEMORY(18)(28)

	From	To	Count	Threshold
Bin	0	1	1194	1
Bin	1	0	18048	1

Signal:

RAM_MEMORY(18)(27)

	From	To	Count	Threshold
Bin	0	1	1068	1
Bin	1	0	18120	1

Signal:

RAM_MEMORY(18)(26)

	From	To	Count	Threshold
Bin	0	1	1596	1
Bin	1	0	18145	1

Signal:

RAM_MEMORY(18)(25)

	From	To	Count	Threshold
Bin	0	1	709	1
Bin	1	0	18197	1

Signal:

RAM_MEMORY(18)(24)

	From	To	Count	Threshold
Bin	0	1	816	1
Bin	1	0	18440	1

Signal:

RAM_MEMORY(18)(23)

	From	To	Count	Threshold
Bin	0	1	596	1
Bin	1	0	18281	1

Signal:

RAM_MEMORY(18)(22)

	From	To	Count	Threshold
Bin	0	1	1219	1
Bin	1	0	18130	1

Signal:

RAM_MEMORY(18)(21)

	From	To	Count	Threshold
Bin	0	1	640	1
Bin	1	0	18018	1

Signal:

RAM_MEMORY(18)(20)

	From	To	Count	Threshold
Bin	0	1	1338	1
Bin	1	0	18384	1

Signal:

RAM_MEMORY(18)(19)

	From	To	Count	Threshold
Bin	0	1	796	1
Bin	1	0	18503	1

Signal:

RAM_MEMORY(18)(18)

	From	To	Count	Threshold
Bin	0	1	1411	1
Bin	1	0	18415	1

Signal:

RAM_MEMORY(18)(17)

	From	To	Count	Threshold
Bin	0	1	1236	1
Bin	1	0	18230	1

Signal:

RAM_MEMORY(18)(16)

	From	To	Count	Threshold
Bin	0	1	1163	1
Bin	1	0	18287	1

Signal:

RAM_MEMORY(18)(15)

	From	To	Count	Threshold
Bin	0	1	1176	1
Bin	1	0	18309	1

Signal:

RAM_MEMORY(18)(14)

	From	To	Count	Threshold
Bin	0	1	1337	1
Bin	1	0	18198	1

Signal:

RAM_MEMORY(18)(13)

	From	To	Count	Threshold
Bin	0	1	951	1
Bin	1	0	18151	1

Signal:

RAM_MEMORY(18)(12)

	From	To	Count	Threshold
Bin	0	1	721	1
Bin	1	0	18005	1

Signal:

RAM_MEMORY(18)(11)

	From	To	Count	Threshold
Bin	0	1	1130	1
Bin	1	0	18177	1

Signal:

RAM_MEMORY(18)(10)

	From	To	Count	Threshold
Bin	0	1	722	1
Bin	1	0	18110	1

Signal:

RAM_MEMORY(18)(9)

	From	To	Count	Threshold
Bin	0	1	719	1
Bin	1	0	18142	1

Signal:

RAM_MEMORY(18)(8)

	From	To	Count	Threshold
Bin	0	1	1341	1
Bin	1	0	18078	1

Signal:

RAM_MEMORY(18)(7)

	From	To	Count	Threshold
Bin	0	1	595	1
Bin	1	0	17968	1

Signal:

RAM_MEMORY(18)(6)

	From	To	Count	Threshold
Bin	0	1	1546	1
Bin	1	0	18093	1

Signal:

RAM_MEMORY(18)(5)

	From	To	Count	Threshold
Bin	0	1	602	1
Bin	1	0	18185	1

Signal:

RAM_MEMORY(18)(4)

	From	To	Count	Threshold
Bin	0	1	917	1
Bin	1	0	18448	1

Signal:

RAM_MEMORY(18)(3)

	From	To	Count	Threshold
Bin	0	1	1000	1
Bin	1	0	18234	1

Signal:

RAM_MEMORY(18)(2)

	From	To	Count	Threshold
Bin	0	1	1418	1
Bin	1	0	18144	1

Signal:

RAM_MEMORY(18)(1)

	From	To	Count	Threshold
Bin	0	1	689	1
Bin	1	0	18423	1

Signal:

RAM_MEMORY(18)(0)

	From	To	Count	Threshold
Bin	0	1	767	1
Bin	1	0	17941	1

Signal:

RAM_MEMORY(19)(31)

	From	To	Count	Threshold
Bin	0	1	646	1
Bin	1	0	16820	1

Signal:

RAM_MEMORY(19)(30)

	From	To	Count	Threshold
Bin	0	1	1344	1
Bin	1	0	16991	1

Signal:

RAM_MEMORY(19)(29)

	From	To	Count	Threshold
Bin	0	1	999	1
Bin	1	0	16886	1

Signal:

RAM_MEMORY(19)(28)

	From	To	Count	Threshold
Bin	0	1	1146	1
Bin	1	0	16534	1

Signal:

RAM_MEMORY(19)(27)

	From	To	Count	Threshold
Bin	0	1	1059	1
Bin	1	0	16872	1

Signal:

RAM_MEMORY(19)(26)

	From	To	Count	Threshold
Bin	0	1	861	1
Bin	1	0	16594	1

Signal:

RAM_MEMORY(19)(25)

	From	To	Count	Threshold
Bin	0	1	1427	1
Bin	1	0	16638	1

Signal:

RAM_MEMORY(19)(24)

	From	To	Count	Threshold
Bin	0	1	1225	1
Bin	1	0	16528	1

Signal:

RAM_MEMORY(19)(23)

	From	To	Count	Threshold
Bin	0	1	558	1
Bin	1	0	16575	1

Signal:

RAM_MEMORY(19)(22)

	From	To	Count	Threshold
Bin	0	1	1305	1
Bin	1	0	16585	1

Signal:

RAM_MEMORY(19)(21)

	From	To	Count	Threshold
Bin	0	1	1372	1
Bin	1	0	16549	1

Signal:

RAM_MEMORY(19)(20)

	From	To	Count	Threshold
Bin	0	1	1229	1
Bin	1	0	16629	1

Signal:

RAM_MEMORY(19)(19)

	From	To	Count	Threshold
Bin	0	1	1163	1
Bin	1	0	17026	1

Signal:

RAM_MEMORY(19)(18)

	From	To	Count	Threshold
Bin	0	1	1158	1
Bin	1	0	16523	1

Signal:

RAM_MEMORY(19)(17)

	From	To	Count	Threshold
Bin	0	1	557	1
Bin	1	0	16430	1

Signal:

RAM_MEMORY(19)(16)

	From	To	Count	Threshold
Bin	0	1	1200	1
Bin	1	0	16570	1

Signal:

RAM_MEMORY(19)(15)

	From	To	Count	Threshold
Bin	0	1	625	1
Bin	1	0	16607	1

Signal:

RAM_MEMORY(19)(14)

	From	To	Count	Threshold
Bin	0	1	1222	1
Bin	1	0	16684	1

Signal:

RAM_MEMORY(19)(13)

	From	To	Count	Threshold
Bin	0	1	1078	1
Bin	1	0	16622	1

Signal:

RAM_MEMORY(19)(12)

	From	To	Count	Threshold
Bin	0	1	1280	1
Bin	1	0	16560	1

Signal:

RAM_MEMORY(19)(11)

	From	To	Count	Threshold
Bin	0	1	1498	1
Bin	1	0	16787	1

Signal:

RAM_MEMORY(19)(10)

	From	To	Count	Threshold
Bin	0	1	1315	1
Bin	1	0	16581	1

Signal:

RAM_MEMORY(19)(9)

	From	To	Count	Threshold
Bin	0	1	1099	1
Bin	1	0	16874	1

Signal:

RAM_MEMORY(19)(8)

	From	To	Count	Threshold
Bin	0	1	1318	1
Bin	1	0	16926	1

Signal:

RAM_MEMORY(19)(7)

	From	To	Count	Threshold
Bin	0	1	606	1
Bin	1	0	16840	1

Signal:

RAM_MEMORY(19)(6)

	From	To	Count	Threshold
Bin	0	1	852	1
Bin	1	0	17021	1

Signal:

RAM_MEMORY(19)(5)

	From	To	Count	Threshold
Bin	0	1	1105	1
Bin	1	0	16921	1

Signal:

RAM_MEMORY(19)(4)

	From	To	Count	Threshold
Bin	0	1	1243	1
Bin	1	0	16498	1

Signal:

RAM_MEMORY(19)(3)

	From	To	Count	Threshold
Bin	0	1	677	1
Bin	1	0	16874	1

Signal:

RAM_MEMORY(19)(2)

	From	To	Count	Threshold
Bin	0	1	1183	1
Bin	1	0	16921	1

Signal:

RAM_MEMORY(19)(1)

	From	To	Count	Threshold
Bin	0	1	1186	1
Bin	1	0	16448	1

Signal:

RAM_MEMORY(19)(0)

	From	To	Count	Threshold
Bin	0	1	1214	1
Bin	1	0	16521	1

Signal:

RAM_MEMORY(20)(31)

	From	To	Count	Threshold
Bin	0	1	473	1
Bin	1	0	17270	1

Signal:

RAM_MEMORY(20)(30)

	From	To	Count	Threshold
Bin	0	1	247	1
Bin	1	0	17065	1

Signal:

RAM_MEMORY(20)(29)

	From	To	Count	Threshold
Bin	0	1	410	1
Bin	1	0	17128	1

Signal:

RAM_MEMORY(20)(28)

	From	To	Count	Threshold
Bin	0	1	410	1
Bin	1	0	17128	1

Signal:

RAM_MEMORY(20)(27)

	From	To	Count	Threshold
Bin	0	1	410	1
Bin	1	0	17128	1

Signal:

RAM_MEMORY(20)(26)

	From	To	Count	Threshold
Bin	0	1	410	1
Bin	1	0	17128	1

Signal:

RAM_MEMORY(20)(25)

	From	To	Count	Threshold
Bin	0	1	494	1
Bin	1	0	17270	1

Signal:

RAM_MEMORY(20)(24)

	From	To	Count	Threshold
Bin	0	1	247	1
Bin	1	0	17065	1

Signal:

RAM_MEMORY(20)(23)

	From	To	Count	Threshold
Bin	0	1	473	1
Bin	1	0	17270	1

Signal:

RAM_MEMORY(20)(22)

	From	To	Count	Threshold
Bin	0	1	205	1
Bin	1	0	17065	1

Signal:

RAM_MEMORY(20)(21)

	From	To	Count	Threshold
Bin	0	1	410	1
Bin	1	0	17149	1

Signal:

RAM_MEMORY(20)(20)

	From	To	Count	Threshold
Bin	0	1	410	1
Bin	1	0	17128	1

Signal:

RAM_MEMORY(20)(19)

	From	To	Count	Threshold
Bin	0	1	410	1
Bin	1	0	17086	1

Signal:

RAM_MEMORY(20)(18)

	From	To	Count	Threshold
Bin	0	1	410	1
Bin	1	0	17107	1

Signal:

RAM_MEMORY(20)(17)

	From	To	Count	Threshold
Bin	0	1	473	1
Bin	1	0	17270	1

Signal:

RAM_MEMORY(20)(16)

	From	To	Count	Threshold
Bin	0	1	268	1
Bin	1	0	17065	1

Signal:

RAM_MEMORY(20)(15)

	From	To	Count	Threshold
Bin	0	1	494	1
Bin	1	0	16147	1

Signal:

RAM_MEMORY(20)(14)

	From	To	Count	Threshold
Bin	0	1	226	1
Bin	1	0	15942	1

Signal:

RAM_MEMORY(20)(13)

	From	To	Count	Threshold
Bin	0	1	410	1
Bin	1	0	16026	1

Signal:

RAM_MEMORY(20)(12)

	From	To	Count	Threshold
Bin	0	1	449	1
Bin	1	0	15998	1

Signal:

RAM_MEMORY(20)(11)

	From	To	Count	Threshold
Bin	0	1	526	1
Bin	1	0	16150	1

Signal:

RAM_MEMORY(20)(10)

	From	To	Count	Threshold
Bin	0	1	563	1
Bin	1	0	16158	1

Signal:

RAM_MEMORY(20)(9)

	From	To	Count	Threshold
Bin	0	1	687	1
Bin	1	0	16428	1

Signal:

RAM_MEMORY(20)(8)

	From	To	Count	Threshold
Bin	0	1	601	1
Bin	1	0	16320	1

Signal:

RAM_MEMORY(20)(7)

	From	To	Count	Threshold
Bin	0	1	431	1
Bin	1	0	16122	1

Signal:

RAM_MEMORY(20)(6)

	From	To	Count	Threshold
Bin	0	1	247	1
Bin	1	0	15917	1

Signal:

RAM_MEMORY(20)(5)

	From	To	Count	Threshold
Bin	0	1	410	1
Bin	1	0	15959	1

Signal:

RAM_MEMORY(20)(4)

	From	To	Count	Threshold
Bin	0	1	410	1
Bin	1	0	15980	1

Signal:

RAM_MEMORY(20)(3)

	From	To	Count	Threshold
Bin	0	1	410	1
Bin	1	0	15938	1

Signal:

RAM_MEMORY(20)(2)

	From	To	Count	Threshold
Bin	0	1	642	1
Bin	1	0	16227	1

Signal:

RAM_MEMORY(20)(1)

	From	To	Count	Threshold
Bin	0	1	752	1
Bin	1	0	16190	1

Signal:

RAM_MEMORY(20)(0)

	From	To	Count	Threshold
Bin	0	1	487	1
Bin	1	0	16175	1

Signal:

INT_READ_DATA(31)

	From	To	Count	Threshold
Bin	0	1	5925	1
Bin	1	0	7474	1

Signal:

INT_READ_DATA(30)

	From	To	Count	Threshold
Bin	0	1	6121	1
Bin	1	0	7671	1

Signal:

INT_READ_DATA(29)

	From	To	Count	Threshold
Bin	0	1	5848	1
Bin	1	0	7397	1

Signal:

INT_READ_DATA(28)

	From	To	Count	Threshold
Bin	0	1	27285	1
Bin	1	0	28834	1

Signal:

INT_READ_DATA(27)

	From	To	Count	Threshold
Bin	0	1	20515	1
Bin	1	0	22064	1

Signal:

INT_READ_DATA(26)

	From	To	Count	Threshold
Bin	0	1	27105	1
Bin	1	0	28654	1

Signal:

INT_READ_DATA(25)

	From	To	Count	Threshold
Bin	0	1	21105	1
Bin	1	0	22654	1

Signal:

INT_READ_DATA(24)

	From	To	Count	Threshold
Bin	0	1	27732	1
Bin	1	0	29282	1

Signal:

INT_READ_DATA(23)

	From	To	Count	Threshold
Bin	0	1	22656	1
Bin	1	0	24205	1

Signal:

INT_READ_DATA(22)

	From	To	Count	Threshold
Bin	0	1	28695	1
Bin	1	0	30245	1

Signal:

INT_READ_DATA(21)

	From	To	Count	Threshold
Bin	0	1	22877	1
Bin	1	0	24427	1

Signal:

INT_READ_DATA(20)

	From	To	Count	Threshold
Bin	0	1	27876	1
Bin	1	0	29426	1

Signal:

INT_READ_DATA(19)

	From	To	Count	Threshold
Bin	0	1	22976	1
Bin	1	0	24526	1

Signal:

INT_READ_DATA(18)

	From	To	Count	Threshold
Bin	0	1	28555	1
Bin	1	0	30104	1

Signal:

INT_READ_DATA(17)

	From	To	Count	Threshold
Bin	0	1	12375	1
Bin	1	0	13925	1

Signal:

INT_READ_DATA(16)

	From	To	Count	Threshold
Bin	0	1	12839	1
Bin	1	0	14389	1

Signal:

INT_READ_DATA(15)

	From	To	Count	Threshold
Bin	0	1	12449	1
Bin	1	0	13998	1

Signal:

INT_READ_DATA(14)

	From	To	Count	Threshold
Bin	0	1	13003	1
Bin	1	0	14552	1

Signal:

INT_READ_DATA(13)

	From	To	Count	Threshold
Bin	0	1	12555	1
Bin	1	0	14104	1

Signal:

INT_READ_DATA(12)

	From	To	Count	Threshold
Bin	0	1	12896	1
Bin	1	0	14445	1

Signal:

INT_READ_DATA(11)

	From	To	Count	Threshold
Bin	0	1	12499	1
Bin	1	0	14047	1

Signal:

INT_READ_DATA(10)

	From	To	Count	Threshold
Bin	0	1	14296	1
Bin	1	0	15843	1

Signal:

INT_READ_DATA(9)

	From	To	Count	Threshold
Bin	0	1	24841	1
Bin	1	0	26390	1

Signal:

INT_READ_DATA(8)

	From	To	Count	Threshold
Bin	0	1	13873	1
Bin	1	0	15421	1

Signal:

INT_READ_DATA(7)

	From	To	Count	Threshold
Bin	0	1	32086	1
Bin	1	0	33635	1

Signal:

INT_READ_DATA(6)

	From	To	Count	Threshold
Bin	0	1	17679	1
Bin	1	0	19229	1

Signal:

INT_READ_DATA(5)

	From	To	Count	Threshold
Bin	0	1	16078	1
Bin	1	0	17625	1

Signal:

INT_READ_DATA(4)

	From	To	Count	Threshold
Bin	0	1	14542	1
Bin	1	0	16092	1

Signal:

INT_READ_DATA(3)

	From	To	Count	Threshold
Bin	0	1	24609	1
Bin	1	0	26156	1

Signal:

INT_READ_DATA(2)

	From	To	Count	Threshold
Bin	0	1	26626	1
Bin	1	0	28174	1

Signal:

INT_READ_DATA(1)

	From	To	Count	Threshold
Bin	0	1	25678	1
Bin	1	0	27227	1

Signal:

INT_READ_DATA(0)

	From	To	Count	Threshold
Bin	0	1	34449	1
Bin	1	0	35998	1

Signal:

BYTE_WE(3)

	From	To	Count	Threshold
Bin	0	1	128483	1
Bin	1	0	130083	1

Signal:

BYTE_WE(2)

	From	To	Count	Threshold
Bin	0	1	128483	1
Bin	1	0	130083	1

Signal:

BYTE_WE(1)

	From	To	Count	Threshold
Bin	0	1	128483	1
Bin	1	0	130083	1

Signal:

BYTE_WE(0)

	From	To	Count	Threshold
Bin	0	1	128483	1
Bin	1	0	130083	1

Uncovered expressions:

Excluded expressions:

Covered expressions:

Uncovered FSM states:

Excluded FSM states:

Covered FSM states:

Uncovered functional coverage:

Excluded functional coverage:

Covered functional coverage: