NVC code coverage report

Hierarchy

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.CAN_CORE_INST.PROTOCOL_CONTROL_INST.RX_SHIFT_REG_INST.SHIFT_REG_BYTE_INST.BYTE_SHIFT_REG_GEN(1)

File:  /__w/ctu-can-regression/ctu-can-regression/src/common_blocks/shift_reg_byte.vhd

Nested Instances Statement Branch Toggle Expression FSM state Functional Average
NEXT_BYTES_GEN 100.0 % (3/3) 100.0 % (2/2) N.A. 100.0 % (2/2) N.A. N.A. 100.0 % (7/7)

Current Instance Statement Branch Toggle Expression FSM state Functional Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.CAN_CORE_INST.PROTOCOL_CONTROL_INST.RX_SHIFT_REG_INST.SHIFT_REG_BYTE_INST.BYTE_SHIFT_REG_GEN(1) 100.0 % (5/5) 100.0 % (6/6) N.A. 100.0 % (4/4) N.A. N.A. 100.0 % (15/15)

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.


Statement Branch Toggle Expression FSM state Functional

Uncovered statements:

Excluded statements:

Covered statements:

If statement on lines 153 to 160:

153:            if (res_n = G_RESET_POLARITY) then 
154:                shift_reg_q(i) <= (others => '0'); -- G_RESET_VALUE(i * 8 + 7 downto i * 8); 
...
159:                end if; 
160:            end if; 
Count: 1090129729
Threshold: 1

Signal assignment statement on line 154:

154:                shift_reg_q(i) <= (others => '0'); -- G_RESET_VALUE(i * 8 + 7 downto i * 8); 
Count: 2605135
Threshold: 1

If statement on lines 156 to 159:

156:                if (byte_clock_ena(i) = '1') then 
157:                    shift_reg_q(i) <= shift_reg_q(i)(6 downto 0) & 
158:                                         shift_reg_in(i); 
159:                end if; 
Count: 543729433
Threshold: 1

Signal assignment statement on lines 157 to 158:

157:                    shift_reg_q(i) <= shift_reg_q(i)(6 downto 0) & 
158:                                         shift_reg_in(i); 
Count: 2770322
Threshold: 1

Signal assignment statement on line 164:

164:        reg_stat(i * 8 + 7 downto i * 8) <= shift_reg_q(i); 
Count: 2198584
Threshold: 1

Uncovered branches:

Excluded branches:

Covered branches:

"if" / "when" / "else" condition on line 153:

153:            if (res_n = G_RESET_POLARITY) then 
Evaluated toCountThreshold
BinTrue26051351
BinFalse10875245941

"if" / "when" / "else" condition on line 155:

155:            elsif (rising_edge(clk)) then 
Evaluated toCountThreshold
BinTrue5437294331
BinFalse5437951611

"if" / "when" / "else" condition on line 156:

156:                if (byte_clock_ena(i) = '1') then 
Evaluated toCountThreshold
BinTrue27703221
BinFalse5409591111

Uncovered toggles:

Excluded toggles:

Covered toggles:

Uncovered expressions:

Excluded expressions:

Covered expressions:

"=" expression on line 153:

 res_n = G_RESET_POLARITY 
Evaluated toCountThreshold
BinFalse10875245941
BinTrue26051351

"=" expression on line 156:

 byte_clock_ena(i) = '1' 
Evaluated toCountThreshold
BinFalse5409591111
BinTrue27703221

Uncovered FSM states:

Excluded FSM states:

Covered FSM states:

Uncovered functional coverage:

Excluded functional coverage:

Covered functional coverage: