NVC code coverage report

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.CAN_CORE_INST.PROTOCOL_CONTROL_INST.RX_SHIFT_REG_INST.SHIFT_REG_BYTE_INST.BYTE_SHIFT_REG_GEN(0).FIRST_BYTE_GEN

File:  /__w/ctu-can-regression/ctu-can-regression/src/common_blocks/shift_reg_byte.vhd

Sub-instances:

Instance Statement Branch Toggle Expression FSM state Functional Average

Current Instance:

Instance Statement Branch Toggle Expression FSM state Functional Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.CAN_CORE_INST.PROTOCOL_CONTROL_INST.RX_SHIFT_REG_INST.SHIFT_REG_BYTE_INST.BYTE_SHIFT_REG_GEN(0).FIRST_BYTE_GEN N.A. N.A. N.A. N.A. N.A. N.A. N.A.

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The limit of printed items was reached (5000). Total 261615 items are not displayed.

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