NVC code coverage report

Hierarchy

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.CAN_CORE_INST.PROTOCOL_CONTROL_INST.RX_SHIFT_REG_INST.SHIFT_REG_BYTE_INST.BYTE_SHIFT_REG_GEN(0).FIRST_BYTE_GEN

File: /__w/ctu-can-regression/ctu-can-regression/src/common_blocks/shift_reg_byte.vhd

Current Instance	Statement	Branch	Toggle	Expression	FSM state	Functional	Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.CAN_CORE_INST.PROTOCOL_CONTROL_INST.RX_SHIFT_REG_INST.SHIFT_REG_BYTE_INST.BYTE_SHIFT_REG_GEN(0).FIRST_BYTE_GEN	100.0 % (1/1)	N.A.	N.A.	N.A.	N.A.	N.A.	100.0 % (1/1)

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.

Statement	Branch	Toggle	Expression	FSM state	Functional

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Covered statements:

Signal assignment statement on line 138:

138: shift_reg_in(i) <= input;
Count: 2785354
Threshold: 1

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