NVC code coverage report

NVC code coverage report

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.TXT_BUF_COMP_GEN(0).TXT_BUF_EVEN_GEN.TXT_BUFFER_EVEN_INST.TXT_BUFFER_RAM_INST.DP_INF_RAM_BE_INST

File: /__w/ctu-can-regression/ctu-can-regression/src/common_blocks/dp_inf_ram_be.vhd

Sub-instances:

Instance	Statement	Branch	Toggle	Expression	FSM state	Functional	Average
BYTE_GEN(0)	100.0 % (3/3)	100.0 % (2/2)	N.A.	100.0 % (7/7)	N.A.	N.A.	100.0 % (12/12)
BYTE_GEN(1)	100.0 % (3/3)	100.0 % (2/2)	N.A.	100.0 % (7/7)	N.A.	N.A.	100.0 % (12/12)
BYTE_GEN(2)	100.0 % (3/3)	100.0 % (2/2)	N.A.	100.0 % (7/7)	N.A.	N.A.	100.0 % (12/12)
BYTE_GEN(3)	100.0 % (3/3)	100.0 % (2/2)	N.A.	100.0 % (7/7)	N.A.	N.A.	100.0 % (12/12)
RAM_RST_FALSE_GEN	100.0 % (4/4)	100.0 % (4/4)	N.A.	100.0 % (2/2)	N.A.	N.A.	100.0 % (10/10)
SYNC_READ_GEN	100.0 % (2/2)	100.0 % (2/2)	N.A.	N.A.	N.A.	N.A.	100.0 % (4/4)

Current Instance:

Instance	Statement	Branch	Toggle	Expression	FSM state	Functional	Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.TXT_BUF_COMP_GEN(0).TXT_BUF_EVEN_GEN.TXT_BUFFER_EVEN_INST.TXT_BUFFER_RAM_INST.DP_INF_RAM_BE_INST	100.0 % (1/1)	N.A.	100.0 % (1578/1578)	N.A.	N.A.	N.A.	100.0 % (1579/1579)

Details:

The limit of printed items was reached (5000). Total 261615 items are not displayed.

Uncovered statements:

Excluded statements:

Covered statements:

Signal assignment statement:

191: int_read_data <= ram_memory(to_integer(unsigned(addr_B)));
Count: 321011
Threshold: 1

Uncovered branches:

Excluded branches:

Covered branches:

Uncovered toggles:

Excluded toggles:

Covered toggles:

Port:

CLK_SYS

	From	To	Count	Threshold
Bin	0	1	14047312	1
Bin	1	0	14048912	1

Port:

RES_N

	From	To	Count	Threshold
Bin	0	1	8082	1
Bin	1	0	8072	1

Port:

ADDR_A(4)

	From	To	Count	Threshold
Bin	0	1	328745	1
Bin	1	0	27436227	1

Port:

ADDR_A(3)

	From	To	Count	Threshold
Bin	0	1	576261	1
Bin	1	0	27188665	1

Port:

ADDR_A(2)

	From	To	Count	Threshold
Bin	0	1	436500	1
Bin	1	0	27328944	1

Port:

ADDR_A(1)

	From	To	Count	Threshold
Bin	0	1	27002546	1
Bin	1	0	763850	1

Port:

ADDR_A(0)

	From	To	Count	Threshold
Bin	0	1	17632746	1
Bin	1	0	10135550	1

Port:

WRITE

	From	To	Count	Threshold
Bin	0	1	158440	1
Bin	1	0	160206	1

Port:

DATA_IN(31)

	From	To	Count	Threshold
Bin	0	1	60678	1
Bin	1	0	1010596	1

Port:

DATA_IN(30)

	From	To	Count	Threshold
Bin	0	1	66425	1
Bin	1	0	1004845	1

Port:

DATA_IN(29)

	From	To	Count	Threshold
Bin	0	1	62427	1
Bin	1	0	1008859	1

Port:

DATA_IN(28)

	From	To	Count	Threshold
Bin	0	1	90777	1
Bin	1	0	980547	1

Port:

DATA_IN(27)

	From	To	Count	Threshold
Bin	0	1	78972	1
Bin	1	0	992364	1

Port:

DATA_IN(26)

	From	To	Count	Threshold
Bin	0	1	75843	1
Bin	1	0	995469	1

Port:

DATA_IN(25)

	From	To	Count	Threshold
Bin	0	1	87536	1
Bin	1	0	983800	1

Port:

DATA_IN(24)

	From	To	Count	Threshold
Bin	0	1	77526	1
Bin	1	0	993834	1

Port:

DATA_IN(23)

	From	To	Count	Threshold
Bin	0	1	70266	1
Bin	1	0	1001080	1

Port:

DATA_IN(22)

	From	To	Count	Threshold
Bin	0	1	107468	1
Bin	1	0	963864	1

Port:

DATA_IN(21)

	From	To	Count	Threshold
Bin	0	1	74180	1
Bin	1	0	997130	1

Port:

DATA_IN(20)

	From	To	Count	Threshold
Bin	0	1	79802	1
Bin	1	0	991538	1

Port:

DATA_IN(19)

	From	To	Count	Threshold
Bin	0	1	107336	1
Bin	1	0	963992	1

Port:

DATA_IN(18)

	From	To	Count	Threshold
Bin	0	1	126901	1
Bin	1	0	944475	1

Port:

DATA_IN(17)

	From	To	Count	Threshold
Bin	0	1	113735	1
Bin	1	0	957669	1

Port:

DATA_IN(16)

	From	To	Count	Threshold
Bin	0	1	186660	1
Bin	1	0	884685	1

Port:

DATA_IN(15)

	From	To	Count	Threshold
Bin	0	1	71707	1
Bin	1	0	999609	1

Port:

DATA_IN(14)

	From	To	Count	Threshold
Bin	0	1	85453	1
Bin	1	0	985883	1

Port:

DATA_IN(13)

	From	To	Count	Threshold
Bin	0	1	75886	1
Bin	1	0	995430	1

Port:

DATA_IN(12)

	From	To	Count	Threshold
Bin	0	1	79744	1
Bin	1	0	991568	1

Port:

DATA_IN(11)

	From	To	Count	Threshold
Bin	0	1	96625	1
Bin	1	0	974687	1

Port:

DATA_IN(10)

	From	To	Count	Threshold
Bin	0	1	116273	1
Bin	1	0	955041	1

Port:

DATA_IN(9)

	From	To	Count	Threshold
Bin	0	1	170117	1
Bin	1	0	901211	1

Port:

DATA_IN(8)

	From	To	Count	Threshold
Bin	0	1	149815	1
Bin	1	0	921499	1

Port:

DATA_IN(7)

	From	To	Count	Threshold
Bin	0	1	125738	1
Bin	1	0	945608	1

Port:

DATA_IN(6)

	From	To	Count	Threshold
Bin	0	1	108875	1
Bin	1	0	962477	1

Port:

DATA_IN(5)

	From	To	Count	Threshold
Bin	0	1	103248	1
Bin	1	0	968094	1

Port:

DATA_IN(4)

	From	To	Count	Threshold
Bin	0	1	158887	1
Bin	1	0	912437	1

Port:

DATA_IN(3)

	From	To	Count	Threshold
Bin	0	1	129939	1
Bin	1	0	941409	1

Port:

DATA_IN(2)

	From	To	Count	Threshold
Bin	0	1	153812	1
Bin	1	0	917568	1

Port:

DATA_IN(1)

	From	To	Count	Threshold
Bin	0	1	225548	1
Bin	1	0	845823	1

Port:

DATA_IN(0)

	From	To	Count	Threshold
Bin	0	1	188750	1
Bin	1	0	882727	1

Port:

BE(3)

	From	To	Count	Threshold
Bin	0	1	27758245	1
Bin	1	0	35788	1

Port:

BE(2)

	From	To	Count	Threshold
Bin	0	1	27758627	1
Bin	1	0	35406	1

Port:

BE(1)

	From	To	Count	Threshold
Bin	0	1	27658880	1
Bin	1	0	135153	1

Port:

BE(0)

	From	To	Count	Threshold
Bin	0	1	27660120	1
Bin	1	0	133913	1

Port:

ADDR_B(4)

	From	To	Count	Threshold
Bin	0	1	26992	1
Bin	1	0	28592	1

Port:

ADDR_B(3)

	From	To	Count	Threshold
Bin	0	1	4027	1
Bin	1	0	5627	1

Port:

ADDR_B(2)

	From	To	Count	Threshold
Bin	0	1	46153	1
Bin	1	0	47753	1

Port:

ADDR_B(1)

	From	To	Count	Threshold
Bin	0	1	38920	1
Bin	1	0	38923	1

Port:

ADDR_B(0)

	From	To	Count	Threshold
Bin	0	1	103011	1
Bin	1	0	104608	1

Port:

DATA_OUT(31)

	From	To	Count	Threshold
Bin	0	1	7982	1
Bin	1	0	9531	1

Port:

DATA_OUT(30)

	From	To	Count	Threshold
Bin	0	1	8391	1
Bin	1	0	9941	1

Port:

DATA_OUT(29)

	From	To	Count	Threshold
Bin	0	1	7951	1
Bin	1	0	9500	1

Port:

DATA_OUT(28)

	From	To	Count	Threshold
Bin	0	1	21337	1
Bin	1	0	22803	1

Port:

DATA_OUT(27)

	From	To	Count	Threshold
Bin	0	1	18079	1
Bin	1	0	19542	1

Port:

DATA_OUT(26)

	From	To	Count	Threshold
Bin	0	1	21592	1
Bin	1	0	23060	1

Port:

DATA_OUT(25)

	From	To	Count	Threshold
Bin	0	1	19020	1
Bin	1	0	20484	1

Port:

DATA_OUT(24)

	From	To	Count	Threshold
Bin	0	1	21640	1
Bin	1	0	23098	1

Port:

DATA_OUT(23)

	From	To	Count	Threshold
Bin	0	1	19308	1
Bin	1	0	20759	1

Port:

DATA_OUT(22)

	From	To	Count	Threshold
Bin	0	1	21402	1
Bin	1	0	22867	1

Port:

DATA_OUT(21)

	From	To	Count	Threshold
Bin	0	1	19325	1
Bin	1	0	20764	1

Port:

DATA_OUT(20)

	From	To	Count	Threshold
Bin	0	1	21408	1
Bin	1	0	22873	1

Port:

DATA_OUT(19)

	From	To	Count	Threshold
Bin	0	1	19799	1
Bin	1	0	21245	1

Port:

DATA_OUT(18)

	From	To	Count	Threshold
Bin	0	1	22132	1
Bin	1	0	23584	1

Port:

DATA_OUT(17)

	From	To	Count	Threshold
Bin	0	1	12505	1
Bin	1	0	14008	1

Port:

DATA_OUT(16)

	From	To	Count	Threshold
Bin	0	1	13382	1
Bin	1	0	14882	1

Port:

DATA_OUT(15)

	From	To	Count	Threshold
Bin	0	1	12705	1
Bin	1	0	14215	1

Port:

DATA_OUT(14)

	From	To	Count	Threshold
Bin	0	1	13403	1
Bin	1	0	14907	1

Port:

DATA_OUT(13)

	From	To	Count	Threshold
Bin	0	1	13291	1
Bin	1	0	14792	1

Port:

DATA_OUT(12)

	From	To	Count	Threshold
Bin	0	1	14133	1
Bin	1	0	15641	1

Port:

DATA_OUT(11)

	From	To	Count	Threshold
Bin	0	1	12866	1
Bin	1	0	14378	1

Port:

DATA_OUT(10)

	From	To	Count	Threshold
Bin	0	1	13590	1
Bin	1	0	15048	1

Port:

DATA_OUT(9)

	From	To	Count	Threshold
Bin	0	1	24187	1
Bin	1	0	25506	1

Port:

DATA_OUT(8)

	From	To	Count	Threshold
Bin	0	1	14564	1
Bin	1	0	16054	1

Port:

DATA_OUT(7)

	From	To	Count	Threshold
Bin	0	1	32866	1
Bin	1	0	34054	1

Port:

DATA_OUT(6)

	From	To	Count	Threshold
Bin	0	1	23359	1
Bin	1	0	24661	1

Port:

DATA_OUT(5)

	From	To	Count	Threshold
Bin	0	1	17257	1
Bin	1	0	18732	1

Port:

DATA_OUT(4)

	From	To	Count	Threshold
Bin	0	1	15439	1
Bin	1	0	16942	1

Port:

DATA_OUT(3)

	From	To	Count	Threshold
Bin	0	1	25480	1
Bin	1	0	26827	1

Port:

DATA_OUT(2)

	From	To	Count	Threshold
Bin	0	1	24873	1
Bin	1	0	26216	1

Port:

DATA_OUT(1)

	From	To	Count	Threshold
Bin	0	1	26244	1
Bin	1	0	27591	1

Port:

DATA_OUT(0)

	From	To	Count	Threshold
Bin	0	1	34015	1
Bin	1	0	35197	1

Signal:

RAM_MEMORY(0)(31)

	From	To	Count	Threshold
Bin	0	1	264	1
Bin	1	0	54925	1

Signal:

RAM_MEMORY(0)(30)

	From	To	Count	Threshold
Bin	0	1	240	1
Bin	1	0	54926	1

Signal:

RAM_MEMORY(0)(29)

	From	To	Count	Threshold
Bin	0	1	262	1
Bin	1	0	54923	1

Signal:

RAM_MEMORY(0)(28)

	From	To	Count	Threshold
Bin	0	1	263	1
Bin	1	0	54923	1

Signal:

RAM_MEMORY(0)(27)

	From	To	Count	Threshold
Bin	0	1	241	1
Bin	1	0	54922	1

Signal:

RAM_MEMORY(0)(26)

	From	To	Count	Threshold
Bin	0	1	262	1
Bin	1	0	54925	1

Signal:

RAM_MEMORY(0)(25)

	From	To	Count	Threshold
Bin	0	1	263	1
Bin	1	0	54905	1

Signal:

RAM_MEMORY(0)(24)

	From	To	Count	Threshold
Bin	0	1	241	1
Bin	1	0	54957	1

Signal:

RAM_MEMORY(0)(23)

	From	To	Count	Threshold
Bin	0	1	244	1
Bin	1	0	54837	1

Signal:

RAM_MEMORY(0)(22)

	From	To	Count	Threshold
Bin	0	1	281	1
Bin	1	0	54884	1

Signal:

RAM_MEMORY(0)(21)

	From	To	Count	Threshold
Bin	0	1	283	1
Bin	1	0	54845	1

Signal:

RAM_MEMORY(0)(20)

	From	To	Count	Threshold
Bin	0	1	263	1
Bin	1	0	54882	1

Signal:

RAM_MEMORY(0)(19)

	From	To	Count	Threshold
Bin	0	1	263	1
Bin	1	0	54844	1

Signal:

RAM_MEMORY(0)(18)

	From	To	Count	Threshold
Bin	0	1	305	1
Bin	1	0	54994	1

Signal:

RAM_MEMORY(0)(17)

	From	To	Count	Threshold
Bin	0	1	244	1
Bin	1	0	54842	1

Signal:

RAM_MEMORY(0)(16)

	From	To	Count	Threshold
Bin	0	1	302	1
Bin	1	0	54904	1

Signal:

RAM_MEMORY(0)(15)

	From	To	Count	Threshold
Bin	0	1	183	1
Bin	1	0	40499	1

Signal:

RAM_MEMORY(0)(14)

	From	To	Count	Threshold
Bin	0	1	259	1
Bin	1	0	40536	1

Signal:

RAM_MEMORY(0)(13)

	From	To	Count	Threshold
Bin	0	1	220	1
Bin	1	0	40516	1

Signal:

RAM_MEMORY(0)(12)

	From	To	Count	Threshold
Bin	0	1	284	1
Bin	1	0	40637	1

Signal:

RAM_MEMORY(0)(11)

	From	To	Count	Threshold
Bin	0	1	199	1
Bin	1	0	40477	1

Signal:

RAM_MEMORY(0)(10)

	From	To	Count	Threshold
Bin	0	1	570	1
Bin	1	0	40699	1

Signal:

RAM_MEMORY(0)(9)

	From	To	Count	Threshold
Bin	0	1	8494	1
Bin	1	0	46335	1

Signal:

RAM_MEMORY(0)(8)

	From	To	Count	Threshold
Bin	0	1	238	1
Bin	1	0	40516	1

Signal:

RAM_MEMORY(0)(7)

	From	To	Count	Threshold
Bin	0	1	6235	1
Bin	1	0	35409	1

Signal:

RAM_MEMORY(0)(6)

	From	To	Count	Threshold
Bin	0	1	5441	1
Bin	1	0	36664	1

Signal:

RAM_MEMORY(0)(5)

	From	To	Count	Threshold
Bin	0	1	2109	1
Bin	1	0	34812	1

Signal:

RAM_MEMORY(0)(4)

	From	To	Count	Threshold
Bin	0	1	283	1
Bin	1	0	32960	1

Signal:

RAM_MEMORY(0)(3)

	From	To	Count	Threshold
Bin	0	1	5679	1
Bin	1	0	35070	1

Signal:

RAM_MEMORY(0)(2)

	From	To	Count	Threshold
Bin	0	1	6159	1
Bin	1	0	35915	1

Signal:

RAM_MEMORY(0)(1)

	From	To	Count	Threshold
Bin	0	1	5857	1
Bin	1	0	35975	1

Signal:

RAM_MEMORY(0)(0)

	From	To	Count	Threshold
Bin	0	1	7516	1
Bin	1	0	36620	1

Signal:

RAM_MEMORY(1)(31)

	From	To	Count	Threshold
Bin	0	1	273	1
Bin	1	0	32555	1

Signal:

RAM_MEMORY(1)(30)

	From	To	Count	Threshold
Bin	0	1	273	1
Bin	1	0	32555	1

Signal:

RAM_MEMORY(1)(29)

	From	To	Count	Threshold
Bin	0	1	256	1
Bin	1	0	32545	1

Signal:

RAM_MEMORY(1)(28)

	From	To	Count	Threshold
Bin	0	1	6928	1
Bin	1	0	37249	1

Signal:

RAM_MEMORY(1)(27)

	From	To	Count	Threshold
Bin	0	1	5872	1
Bin	1	0	37016	1

Signal:

RAM_MEMORY(1)(26)

	From	To	Count	Threshold
Bin	0	1	6777	1
Bin	1	0	36992	1

Signal:

RAM_MEMORY(1)(25)

	From	To	Count	Threshold
Bin	0	1	5915	1
Bin	1	0	36859	1

Signal:

RAM_MEMORY(1)(24)

	From	To	Count	Threshold
Bin	0	1	7120	1
Bin	1	0	37332	1

Signal:

RAM_MEMORY(1)(23)

	From	To	Count	Threshold
Bin	0	1	6021	1
Bin	1	0	36750	1

Signal:

RAM_MEMORY(1)(22)

	From	To	Count	Threshold
Bin	0	1	6723	1
Bin	1	0	37113	1

Signal:

RAM_MEMORY(1)(21)

	From	To	Count	Threshold
Bin	0	1	6217	1
Bin	1	0	36540	1

Signal:

RAM_MEMORY(1)(20)

	From	To	Count	Threshold
Bin	0	1	6593	1
Bin	1	0	36946	1

Signal:

RAM_MEMORY(1)(19)

	From	To	Count	Threshold
Bin	0	1	6132	1
Bin	1	0	36615	1

Signal:

RAM_MEMORY(1)(18)

	From	To	Count	Threshold
Bin	0	1	6484	1
Bin	1	0	36723	1

Signal:

RAM_MEMORY(1)(17)

	From	To	Count	Threshold
Bin	0	1	3408	1
Bin	1	0	35087	1

Signal:

RAM_MEMORY(1)(16)

	From	To	Count	Threshold
Bin	0	1	3887	1
Bin	1	0	35272	1

Signal:

RAM_MEMORY(1)(15)

	From	To	Count	Threshold
Bin	0	1	3458	1
Bin	1	0	42477	1

Signal:

RAM_MEMORY(1)(14)

	From	To	Count	Threshold
Bin	0	1	3522	1
Bin	1	0	42396	1

Signal:

RAM_MEMORY(1)(13)

	From	To	Count	Threshold
Bin	0	1	3496	1
Bin	1	0	42064	1

Signal:

RAM_MEMORY(1)(12)

	From	To	Count	Threshold
Bin	0	1	3486	1
Bin	1	0	42075	1

Signal:

RAM_MEMORY(1)(11)

	From	To	Count	Threshold
Bin	0	1	3268	1
Bin	1	0	42146	1

Signal:

RAM_MEMORY(1)(10)

	From	To	Count	Threshold
Bin	0	1	3619	1
Bin	1	0	42484	1

Signal:

RAM_MEMORY(1)(9)

	From	To	Count	Threshold
Bin	0	1	3402	1
Bin	1	0	42366	1

Signal:

RAM_MEMORY(1)(8)

	From	To	Count	Threshold
Bin	0	1	3615	1
Bin	1	0	42584	1

Signal:

RAM_MEMORY(1)(7)

	From	To	Count	Threshold
Bin	0	1	3616	1
Bin	1	0	42455	1

Signal:

RAM_MEMORY(1)(6)

	From	To	Count	Threshold
Bin	0	1	3754	1
Bin	1	0	42411	1

Signal:

RAM_MEMORY(1)(5)

	From	To	Count	Threshold
Bin	0	1	3443	1
Bin	1	0	42113	1

Signal:

RAM_MEMORY(1)(4)

	From	To	Count	Threshold
Bin	0	1	3764	1
Bin	1	0	42308	1

Signal:

RAM_MEMORY(1)(3)

	From	To	Count	Threshold
Bin	0	1	3545	1
Bin	1	0	42275	1

Signal:

RAM_MEMORY(1)(2)

	From	To	Count	Threshold
Bin	0	1	3461	1
Bin	1	0	42125	1

Signal:

RAM_MEMORY(1)(1)

	From	To	Count	Threshold
Bin	0	1	3573	1
Bin	1	0	42399	1

Signal:

RAM_MEMORY(1)(0)

	From	To	Count	Threshold
Bin	0	1	3693	1
Bin	1	0	42284	1

Signal:

RAM_MEMORY(2)(31)

	From	To	Count	Threshold
Bin	0	1	330	1
Bin	1	0	51205	1

Signal:

RAM_MEMORY(2)(30)

	From	To	Count	Threshold
Bin	0	1	393	1
Bin	1	0	51226	1

Signal:

RAM_MEMORY(2)(29)

	From	To	Count	Threshold
Bin	0	1	391	1
Bin	1	0	51280	1

Signal:

RAM_MEMORY(2)(28)

	From	To	Count	Threshold
Bin	0	1	351	1
Bin	1	0	51230	1

Signal:

RAM_MEMORY(2)(27)

	From	To	Count	Threshold
Bin	0	1	431	1
Bin	1	0	51249	1

Signal:

RAM_MEMORY(2)(26)

	From	To	Count	Threshold
Bin	0	1	384	1
Bin	1	0	51263	1

Signal:

RAM_MEMORY(2)(25)

	From	To	Count	Threshold
Bin	0	1	415	1
Bin	1	0	51216	1

Signal:

RAM_MEMORY(2)(24)

	From	To	Count	Threshold
Bin	0	1	448	1
Bin	1	0	51348	1

Signal:

RAM_MEMORY(2)(23)

	From	To	Count	Threshold
Bin	0	1	473	1
Bin	1	0	51264	1

Signal:

RAM_MEMORY(2)(22)

	From	To	Count	Threshold
Bin	0	1	404	1
Bin	1	0	51095	1

Signal:

RAM_MEMORY(2)(21)

	From	To	Count	Threshold
Bin	0	1	428	1
Bin	1	0	51183	1

Signal:

RAM_MEMORY(2)(20)

	From	To	Count	Threshold
Bin	0	1	396	1
Bin	1	0	51091	1

Signal:

RAM_MEMORY(2)(19)

	From	To	Count	Threshold
Bin	0	1	274	1
Bin	1	0	50860	1

Signal:

RAM_MEMORY(2)(18)

	From	To	Count	Threshold
Bin	0	1	416	1
Bin	1	0	50960	1

Signal:

RAM_MEMORY(2)(17)

	From	To	Count	Threshold
Bin	0	1	381	1
Bin	1	0	50980	1

Signal:

RAM_MEMORY(2)(16)

	From	To	Count	Threshold
Bin	0	1	335	1
Bin	1	0	51011	1

Signal:

RAM_MEMORY(2)(15)

	From	To	Count	Threshold
Bin	0	1	359	1
Bin	1	0	50873	1

Signal:

RAM_MEMORY(2)(14)

	From	To	Count	Threshold
Bin	0	1	336	1
Bin	1	0	50924	1

Signal:

RAM_MEMORY(2)(13)

	From	To	Count	Threshold
Bin	0	1	436	1
Bin	1	0	51009	1

Signal:

RAM_MEMORY(2)(12)

	From	To	Count	Threshold
Bin	0	1	457	1
Bin	1	0	50988	1

Signal:

RAM_MEMORY(2)(11)

	From	To	Count	Threshold
Bin	0	1	452	1
Bin	1	0	50990	1

Signal:

RAM_MEMORY(2)(10)

	From	To	Count	Threshold
Bin	0	1	458	1
Bin	1	0	51048	1

Signal:

RAM_MEMORY(2)(9)

	From	To	Count	Threshold
Bin	0	1	517	1
Bin	1	0	51090	1

Signal:

RAM_MEMORY(2)(8)

	From	To	Count	Threshold
Bin	0	1	514	1
Bin	1	0	51025	1

Signal:

RAM_MEMORY(2)(7)

	From	To	Count	Threshold
Bin	0	1	496	1
Bin	1	0	51106	1

Signal:

RAM_MEMORY(2)(6)

	From	To	Count	Threshold
Bin	0	1	466	1
Bin	1	0	51099	1

Signal:

RAM_MEMORY(2)(5)

	From	To	Count	Threshold
Bin	0	1	532	1
Bin	1	0	51136	1

Signal:

RAM_MEMORY(2)(4)

	From	To	Count	Threshold
Bin	0	1	451	1
Bin	1	0	51051	1

Signal:

RAM_MEMORY(2)(3)

	From	To	Count	Threshold
Bin	0	1	486	1
Bin	1	0	51071	1

Signal:

RAM_MEMORY(2)(2)

	From	To	Count	Threshold
Bin	0	1	474	1
Bin	1	0	51089	1

Signal:

RAM_MEMORY(2)(1)

	From	To	Count	Threshold
Bin	0	1	530	1
Bin	1	0	51201	1

Signal:

RAM_MEMORY(2)(0)

	From	To	Count	Threshold
Bin	0	1	526	1
Bin	1	0	51112	1

Signal:

RAM_MEMORY(3)(31)

	From	To	Count	Threshold
Bin	0	1	641	1
Bin	1	0	49531	1

Signal:

RAM_MEMORY(3)(30)

	From	To	Count	Threshold
Bin	0	1	621	1
Bin	1	0	49494	1

Signal:

RAM_MEMORY(3)(29)

	From	To	Count	Threshold
Bin	0	1	585	1
Bin	1	0	49542	1

Signal:

RAM_MEMORY(3)(28)

	From	To	Count	Threshold
Bin	0	1	487	1
Bin	1	0	49444	1

Signal:

RAM_MEMORY(3)(27)

	From	To	Count	Threshold
Bin	0	1	627	1
Bin	1	0	49502	1

Signal:

RAM_MEMORY(3)(26)

	From	To	Count	Threshold
Bin	0	1	573	1
Bin	1	0	49500	1

Signal:

RAM_MEMORY(3)(25)

	From	To	Count	Threshold
Bin	0	1	579	1
Bin	1	0	49498	1

Signal:

RAM_MEMORY(3)(24)

	From	To	Count	Threshold
Bin	0	1	508	1
Bin	1	0	49460	1

Signal:

RAM_MEMORY(3)(23)

	From	To	Count	Threshold
Bin	0	1	520	1
Bin	1	0	49423	1

Signal:

RAM_MEMORY(3)(22)

	From	To	Count	Threshold
Bin	0	1	664	1
Bin	1	0	49440	1

Signal:

RAM_MEMORY(3)(21)

	From	To	Count	Threshold
Bin	0	1	595	1
Bin	1	0	49489	1

Signal:

RAM_MEMORY(3)(20)

	From	To	Count	Threshold
Bin	0	1	498	1
Bin	1	0	49389	1

Signal:

RAM_MEMORY(3)(19)

	From	To	Count	Threshold
Bin	0	1	593	1
Bin	1	0	49423	1

Signal:

RAM_MEMORY(3)(18)

	From	To	Count	Threshold
Bin	0	1	571	1
Bin	1	0	49439	1

Signal:

RAM_MEMORY(3)(17)

	From	To	Count	Threshold
Bin	0	1	491	1
Bin	1	0	49358	1

Signal:

RAM_MEMORY(3)(16)

	From	To	Count	Threshold
Bin	0	1	508	1
Bin	1	0	49368	1

Signal:

RAM_MEMORY(3)(15)

	From	To	Count	Threshold
Bin	0	1	650	1
Bin	1	0	49490	1

Signal:

RAM_MEMORY(3)(14)

	From	To	Count	Threshold
Bin	0	1	587	1
Bin	1	0	49442	1

Signal:

RAM_MEMORY(3)(13)

	From	To	Count	Threshold
Bin	0	1	622	1
Bin	1	0	49495	1

Signal:

RAM_MEMORY(3)(12)

	From	To	Count	Threshold
Bin	0	1	635	1
Bin	1	0	49477	1

Signal:

RAM_MEMORY(3)(11)

	From	To	Count	Threshold
Bin	0	1	622	1
Bin	1	0	49463	1

Signal:

RAM_MEMORY(3)(10)

	From	To	Count	Threshold
Bin	0	1	607	1
Bin	1	0	49480	1

Signal:

RAM_MEMORY(3)(9)

	From	To	Count	Threshold
Bin	0	1	552	1
Bin	1	0	49420	1

Signal:

RAM_MEMORY(3)(8)

	From	To	Count	Threshold
Bin	0	1	494	1
Bin	1	0	49456	1

Signal:

RAM_MEMORY(3)(7)

	From	To	Count	Threshold
Bin	0	1	646	1
Bin	1	0	49510	1

Signal:

RAM_MEMORY(3)(6)

	From	To	Count	Threshold
Bin	0	1	572	1
Bin	1	0	49467	1

Signal:

RAM_MEMORY(3)(5)

	From	To	Count	Threshold
Bin	0	1	598	1
Bin	1	0	49487	1

Signal:

RAM_MEMORY(3)(4)

	From	To	Count	Threshold
Bin	0	1	600	1
Bin	1	0	49490	1

Signal:

RAM_MEMORY(3)(3)

	From	To	Count	Threshold
Bin	0	1	617	1
Bin	1	0	49501	1

Signal:

RAM_MEMORY(3)(2)

	From	To	Count	Threshold
Bin	0	1	533	1
Bin	1	0	49495	1

Signal:

RAM_MEMORY(3)(1)

	From	To	Count	Threshold
Bin	0	1	555	1
Bin	1	0	49466	1

Signal:

RAM_MEMORY(3)(0)

	From	To	Count	Threshold
Bin	0	1	537	1
Bin	1	0	49453	1

Signal:

RAM_MEMORY(4)(31)

	From	To	Count	Threshold
Bin	0	1	4383	1
Bin	1	0	35707	1

Signal:

RAM_MEMORY(4)(30)

	From	To	Count	Threshold
Bin	0	1	4459	1
Bin	1	0	35676	1

Signal:

RAM_MEMORY(4)(29)

	From	To	Count	Threshold
Bin	0	1	4436	1
Bin	1	0	35679	1

Signal:

RAM_MEMORY(4)(28)

	From	To	Count	Threshold
Bin	0	1	4574	1
Bin	1	0	35484	1

Signal:

RAM_MEMORY(4)(27)

	From	To	Count	Threshold
Bin	0	1	4321	1
Bin	1	0	35561	1

Signal:

RAM_MEMORY(4)(26)

	From	To	Count	Threshold
Bin	0	1	4592	1
Bin	1	0	35554	1

Signal:

RAM_MEMORY(4)(25)

	From	To	Count	Threshold
Bin	0	1	4452	1
Bin	1	0	35581	1

Signal:

RAM_MEMORY(4)(24)

	From	To	Count	Threshold
Bin	0	1	4543	1
Bin	1	0	35616	1

Signal:

RAM_MEMORY(4)(23)

	From	To	Count	Threshold
Bin	0	1	4544	1
Bin	1	0	35231	1

Signal:

RAM_MEMORY(4)(22)

	From	To	Count	Threshold
Bin	0	1	4656	1
Bin	1	0	35113	1

Signal:

RAM_MEMORY(4)(21)

	From	To	Count	Threshold
Bin	0	1	4518	1
Bin	1	0	35147	1

Signal:

RAM_MEMORY(4)(20)

	From	To	Count	Threshold
Bin	0	1	4897	1
Bin	1	0	34994	1

Signal:

RAM_MEMORY(4)(19)

	From	To	Count	Threshold
Bin	0	1	4700	1
Bin	1	0	35302	1

Signal:

RAM_MEMORY(4)(18)

	From	To	Count	Threshold
Bin	0	1	4896	1
Bin	1	0	35327	1

Signal:

RAM_MEMORY(4)(17)

	From	To	Count	Threshold
Bin	0	1	4510	1
Bin	1	0	35125	1

Signal:

RAM_MEMORY(4)(16)

	From	To	Count	Threshold
Bin	0	1	5005	1
Bin	1	0	35430	1

Signal:

RAM_MEMORY(4)(15)

	From	To	Count	Threshold
Bin	0	1	4790	1
Bin	1	0	34514	1

Signal:

RAM_MEMORY(4)(14)

	From	To	Count	Threshold
Bin	0	1	5260	1
Bin	1	0	34965	1

Signal:

RAM_MEMORY(4)(13)

	From	To	Count	Threshold
Bin	0	1	4736	1
Bin	1	0	34801	1

Signal:

RAM_MEMORY(4)(12)

	From	To	Count	Threshold
Bin	0	1	4996	1
Bin	1	0	34965	1

Signal:

RAM_MEMORY(4)(11)

	From	To	Count	Threshold
Bin	0	1	4707	1
Bin	1	0	34812	1

Signal:

RAM_MEMORY(4)(10)

	From	To	Count	Threshold
Bin	0	1	5185	1
Bin	1	0	34837	1

Signal:

RAM_MEMORY(4)(9)

	From	To	Count	Threshold
Bin	0	1	4893	1
Bin	1	0	34750	1

Signal:

RAM_MEMORY(4)(8)

	From	To	Count	Threshold
Bin	0	1	5013	1
Bin	1	0	34584	1

Signal:

RAM_MEMORY(4)(7)

	From	To	Count	Threshold
Bin	0	1	5835	1
Bin	1	0	33257	1

Signal:

RAM_MEMORY(4)(6)

	From	To	Count	Threshold
Bin	0	1	5758	1
Bin	1	0	33529	1

Signal:

RAM_MEMORY(4)(5)

	From	To	Count	Threshold
Bin	0	1	5363	1
Bin	1	0	33552	1

Signal:

RAM_MEMORY(4)(4)

	From	To	Count	Threshold
Bin	0	1	5426	1
Bin	1	0	33545	1

Signal:

RAM_MEMORY(4)(3)

	From	To	Count	Threshold
Bin	0	1	5291	1
Bin	1	0	33541	1

Signal:

RAM_MEMORY(4)(2)

	From	To	Count	Threshold
Bin	0	1	5430	1
Bin	1	0	33542	1

Signal:

RAM_MEMORY(4)(1)

	From	To	Count	Threshold
Bin	0	1	5134	1
Bin	1	0	33248	1

Signal:

RAM_MEMORY(4)(0)

	From	To	Count	Threshold
Bin	0	1	5359	1
Bin	1	0	33416	1

Signal:

RAM_MEMORY(5)(31)

	From	To	Count	Threshold
Bin	0	1	4054	1
Bin	1	0	36375	1

Signal:

RAM_MEMORY(5)(30)

	From	To	Count	Threshold
Bin	0	1	3393	1
Bin	1	0	35972	1

Signal:

RAM_MEMORY(5)(29)

	From	To	Count	Threshold
Bin	0	1	3600	1
Bin	1	0	36737	1

Signal:

RAM_MEMORY(5)(28)

	From	To	Count	Threshold
Bin	0	1	3664	1
Bin	1	0	36384	1

Signal:

RAM_MEMORY(5)(27)

	From	To	Count	Threshold
Bin	0	1	3869	1
Bin	1	0	36750	1

Signal:

RAM_MEMORY(5)(26)

	From	To	Count	Threshold
Bin	0	1	3646	1
Bin	1	0	35976	1

Signal:

RAM_MEMORY(5)(25)

	From	To	Count	Threshold
Bin	0	1	3631	1
Bin	1	0	36342	1

Signal:

RAM_MEMORY(5)(24)

	From	To	Count	Threshold
Bin	0	1	3889	1
Bin	1	0	36405	1

Signal:

RAM_MEMORY(5)(23)

	From	To	Count	Threshold
Bin	0	1	3931	1
Bin	1	0	35704	1

Signal:

RAM_MEMORY(5)(22)

	From	To	Count	Threshold
Bin	0	1	4135	1
Bin	1	0	35963	1

Signal:

RAM_MEMORY(5)(21)

	From	To	Count	Threshold
Bin	0	1	4231	1
Bin	1	0	36119	1

Signal:

RAM_MEMORY(5)(20)

	From	To	Count	Threshold
Bin	0	1	3912	1
Bin	1	0	35785	1

Signal:

RAM_MEMORY(5)(19)

	From	To	Count	Threshold
Bin	0	1	4012	1
Bin	1	0	36177	1

Signal:

RAM_MEMORY(5)(18)

	From	To	Count	Threshold
Bin	0	1	3738	1
Bin	1	0	35545	1

Signal:

RAM_MEMORY(5)(17)

	From	To	Count	Threshold
Bin	0	1	3953	1
Bin	1	0	35687	1

Signal:

RAM_MEMORY(5)(16)

	From	To	Count	Threshold
Bin	0	1	4085	1
Bin	1	0	35657	1

Signal:

RAM_MEMORY(5)(15)

	From	To	Count	Threshold
Bin	0	1	4086	1
Bin	1	0	35305	1

Signal:

RAM_MEMORY(5)(14)

	From	To	Count	Threshold
Bin	0	1	4282	1
Bin	1	0	35152	1

Signal:

RAM_MEMORY(5)(13)

	From	To	Count	Threshold
Bin	0	1	4751	1
Bin	1	0	35579	1

Signal:

RAM_MEMORY(5)(12)

	From	To	Count	Threshold
Bin	0	1	4312	1
Bin	1	0	34911	1

Signal:

RAM_MEMORY(5)(11)

	From	To	Count	Threshold
Bin	0	1	4347	1
Bin	1	0	35150	1

Signal:

RAM_MEMORY(5)(10)

	From	To	Count	Threshold
Bin	0	1	4017	1
Bin	1	0	35019	1

Signal:

RAM_MEMORY(5)(9)

	From	To	Count	Threshold
Bin	0	1	4329	1
Bin	1	0	34995	1

Signal:

RAM_MEMORY(5)(8)

	From	To	Count	Threshold
Bin	0	1	4503	1
Bin	1	0	35078	1

Signal:

RAM_MEMORY(5)(7)

	From	To	Count	Threshold
Bin	0	1	4503	1
Bin	1	0	34474	1

Signal:

RAM_MEMORY(5)(6)

	From	To	Count	Threshold
Bin	0	1	4524	1
Bin	1	0	34766	1

Signal:

RAM_MEMORY(5)(5)

	From	To	Count	Threshold
Bin	0	1	4521	1
Bin	1	0	35269	1

Signal:

RAM_MEMORY(5)(4)

	From	To	Count	Threshold
Bin	0	1	4423	1
Bin	1	0	34542	1

Signal:

RAM_MEMORY(5)(3)

	From	To	Count	Threshold
Bin	0	1	4471	1
Bin	1	0	34967	1

Signal:

RAM_MEMORY(5)(2)

	From	To	Count	Threshold
Bin	0	1	4503	1
Bin	1	0	34396	1

Signal:

RAM_MEMORY(5)(1)

	From	To	Count	Threshold
Bin	0	1	4132	1
Bin	1	0	34308	1

Signal:

RAM_MEMORY(5)(0)

	From	To	Count	Threshold
Bin	0	1	4760	1
Bin	1	0	34893	1

Signal:

RAM_MEMORY(6)(31)

	From	To	Count	Threshold
Bin	0	1	2648	1
Bin	1	0	38354	1

Signal:

RAM_MEMORY(6)(30)

	From	To	Count	Threshold
Bin	0	1	2971	1
Bin	1	0	38692	1

Signal:

RAM_MEMORY(6)(29)

	From	To	Count	Threshold
Bin	0	1	2638	1
Bin	1	0	38118	1

Signal:

RAM_MEMORY(6)(28)

	From	To	Count	Threshold
Bin	0	1	2865	1
Bin	1	0	38167	1

Signal:

RAM_MEMORY(6)(27)

	From	To	Count	Threshold
Bin	0	1	3056	1
Bin	1	0	38299	1

Signal:

RAM_MEMORY(6)(26)

	From	To	Count	Threshold
Bin	0	1	2821	1
Bin	1	0	38001	1

Signal:

RAM_MEMORY(6)(25)

	From	To	Count	Threshold
Bin	0	1	2550	1
Bin	1	0	37552	1

Signal:

RAM_MEMORY(6)(24)

	From	To	Count	Threshold
Bin	0	1	2801	1
Bin	1	0	37983	1

Signal:

RAM_MEMORY(6)(23)

	From	To	Count	Threshold
Bin	0	1	2398	1
Bin	1	0	38047	1

Signal:

RAM_MEMORY(6)(22)

	From	To	Count	Threshold
Bin	0	1	2742	1
Bin	1	0	37815	1

Signal:

RAM_MEMORY(6)(21)

	From	To	Count	Threshold
Bin	0	1	2746	1
Bin	1	0	38480	1

Signal:

RAM_MEMORY(6)(20)

	From	To	Count	Threshold
Bin	0	1	2862	1
Bin	1	0	38232	1

Signal:

RAM_MEMORY(6)(19)

	From	To	Count	Threshold
Bin	0	1	2870	1
Bin	1	0	38430	1

Signal:

RAM_MEMORY(6)(18)

	From	To	Count	Threshold
Bin	0	1	2779	1
Bin	1	0	38247	1

Signal:

RAM_MEMORY(6)(17)

	From	To	Count	Threshold
Bin	0	1	2480	1
Bin	1	0	37813	1

Signal:

RAM_MEMORY(6)(16)

	From	To	Count	Threshold
Bin	0	1	2989	1
Bin	1	0	37887	1

Signal:

RAM_MEMORY(6)(15)

	From	To	Count	Threshold
Bin	0	1	2524	1
Bin	1	0	38056	1

Signal:

RAM_MEMORY(6)(14)

	From	To	Count	Threshold
Bin	0	1	2693	1
Bin	1	0	37920	1

Signal:

RAM_MEMORY(6)(13)

	From	To	Count	Threshold
Bin	0	1	2674	1
Bin	1	0	38317	1

Signal:

RAM_MEMORY(6)(12)

	From	To	Count	Threshold
Bin	0	1	2689	1
Bin	1	0	37971	1

Signal:

RAM_MEMORY(6)(11)

	From	To	Count	Threshold
Bin	0	1	2322	1
Bin	1	0	38164	1

Signal:

RAM_MEMORY(6)(10)

	From	To	Count	Threshold
Bin	0	1	2949	1
Bin	1	0	37852	1

Signal:

RAM_MEMORY(6)(9)

	From	To	Count	Threshold
Bin	0	1	2501	1
Bin	1	0	37755	1

Signal:

RAM_MEMORY(6)(8)

	From	To	Count	Threshold
Bin	0	1	3078	1
Bin	1	0	37717	1

Signal:

RAM_MEMORY(6)(7)

	From	To	Count	Threshold
Bin	0	1	2570	1
Bin	1	0	37848	1

Signal:

RAM_MEMORY(6)(6)

	From	To	Count	Threshold
Bin	0	1	3044	1
Bin	1	0	38309	1

Signal:

RAM_MEMORY(6)(5)

	From	To	Count	Threshold
Bin	0	1	2977	1
Bin	1	0	38148	1

Signal:

RAM_MEMORY(6)(4)

	From	To	Count	Threshold
Bin	0	1	2901	1
Bin	1	0	38325	1

Signal:

RAM_MEMORY(6)(3)

	From	To	Count	Threshold
Bin	0	1	2624	1
Bin	1	0	38153	1

Signal:

RAM_MEMORY(6)(2)

	From	To	Count	Threshold
Bin	0	1	2545	1
Bin	1	0	37902	1

Signal:

RAM_MEMORY(6)(1)

	From	To	Count	Threshold
Bin	0	1	2989	1
Bin	1	0	38699	1

Signal:

RAM_MEMORY(6)(0)

	From	To	Count	Threshold
Bin	0	1	2805	1
Bin	1	0	38055	1

Signal:

RAM_MEMORY(7)(31)

	From	To	Count	Threshold
Bin	0	1	2363	1
Bin	1	0	36671	1

Signal:

RAM_MEMORY(7)(30)

	From	To	Count	Threshold
Bin	0	1	2627	1
Bin	1	0	37060	1

Signal:

RAM_MEMORY(7)(29)

	From	To	Count	Threshold
Bin	0	1	2364	1
Bin	1	0	37252	1

Signal:

RAM_MEMORY(7)(28)

	From	To	Count	Threshold
Bin	0	1	2696	1
Bin	1	0	37408	1

Signal:

RAM_MEMORY(7)(27)

	From	To	Count	Threshold
Bin	0	1	2682	1
Bin	1	0	37449	1

Signal:

RAM_MEMORY(7)(26)

	From	To	Count	Threshold
Bin	0	1	2732	1
Bin	1	0	37244	1

Signal:

RAM_MEMORY(7)(25)

	From	To	Count	Threshold
Bin	0	1	2442	1
Bin	1	0	37710	1

Signal:

RAM_MEMORY(7)(24)

	From	To	Count	Threshold
Bin	0	1	3008	1
Bin	1	0	37065	1

Signal:

RAM_MEMORY(7)(23)

	From	To	Count	Threshold
Bin	0	1	2469	1
Bin	1	0	36668	1

Signal:

RAM_MEMORY(7)(22)

	From	To	Count	Threshold
Bin	0	1	2470	1
Bin	1	0	36779	1

Signal:

RAM_MEMORY(7)(21)

	From	To	Count	Threshold
Bin	0	1	2508	1
Bin	1	0	36691	1

Signal:

RAM_MEMORY(7)(20)

	From	To	Count	Threshold
Bin	0	1	2451	1
Bin	1	0	36874	1

Signal:

RAM_MEMORY(7)(19)

	From	To	Count	Threshold
Bin	0	1	2392	1
Bin	1	0	37079	1

Signal:

RAM_MEMORY(7)(18)

	From	To	Count	Threshold
Bin	0	1	2477	1
Bin	1	0	37092	1

Signal:

RAM_MEMORY(7)(17)

	From	To	Count	Threshold
Bin	0	1	2398	1
Bin	1	0	37055	1

Signal:

RAM_MEMORY(7)(16)

	From	To	Count	Threshold
Bin	0	1	2729	1
Bin	1	0	37138	1

Signal:

RAM_MEMORY(7)(15)

	From	To	Count	Threshold
Bin	0	1	2282	1
Bin	1	0	37170	1

Signal:

RAM_MEMORY(7)(14)

	From	To	Count	Threshold
Bin	0	1	2684	1
Bin	1	0	37141	1

Signal:

RAM_MEMORY(7)(13)

	From	To	Count	Threshold
Bin	0	1	2374	1
Bin	1	0	37073	1

Signal:

RAM_MEMORY(7)(12)

	From	To	Count	Threshold
Bin	0	1	2621	1
Bin	1	0	37236	1

Signal:

RAM_MEMORY(7)(11)

	From	To	Count	Threshold
Bin	0	1	2389	1
Bin	1	0	37089	1

Signal:

RAM_MEMORY(7)(10)

	From	To	Count	Threshold
Bin	0	1	2478	1
Bin	1	0	36611	1

Signal:

RAM_MEMORY(7)(9)

	From	To	Count	Threshold
Bin	0	1	2872	1
Bin	1	0	37210	1

Signal:

RAM_MEMORY(7)(8)

	From	To	Count	Threshold
Bin	0	1	2710	1
Bin	1	0	36918	1

Signal:

RAM_MEMORY(7)(7)

	From	To	Count	Threshold
Bin	0	1	2689	1
Bin	1	0	37316	1

Signal:

RAM_MEMORY(7)(6)

	From	To	Count	Threshold
Bin	0	1	2904	1
Bin	1	0	37474	1

Signal:

RAM_MEMORY(7)(5)

	From	To	Count	Threshold
Bin	0	1	2519	1
Bin	1	0	37508	1

Signal:

RAM_MEMORY(7)(4)

	From	To	Count	Threshold
Bin	0	1	2568	1
Bin	1	0	37324	1

Signal:

RAM_MEMORY(7)(3)

	From	To	Count	Threshold
Bin	0	1	2354	1
Bin	1	0	36781	1

Signal:

RAM_MEMORY(7)(2)

	From	To	Count	Threshold
Bin	0	1	2742	1
Bin	1	0	37317	1

Signal:

RAM_MEMORY(7)(1)

	From	To	Count	Threshold
Bin	0	1	2303	1
Bin	1	0	37106	1

Signal:

RAM_MEMORY(7)(0)

	From	To	Count	Threshold
Bin	0	1	3083	1
Bin	1	0	36925	1

Signal:

RAM_MEMORY(8)(31)

	From	To	Count	Threshold
Bin	0	1	2157	1
Bin	1	0	36251	1

Signal:

RAM_MEMORY(8)(30)

	From	To	Count	Threshold
Bin	0	1	2245	1
Bin	1	0	35913	1

Signal:

RAM_MEMORY(8)(29)

	From	To	Count	Threshold
Bin	0	1	2076	1
Bin	1	0	36020	1

Signal:

RAM_MEMORY(8)(28)

	From	To	Count	Threshold
Bin	0	1	2623	1
Bin	1	0	36429	1

Signal:

RAM_MEMORY(8)(27)

	From	To	Count	Threshold
Bin	0	1	2328	1
Bin	1	0	36858	1

Signal:

RAM_MEMORY(8)(26)

	From	To	Count	Threshold
Bin	0	1	2333	1
Bin	1	0	35812	1

Signal:

RAM_MEMORY(8)(25)

	From	To	Count	Threshold
Bin	0	1	2370	1
Bin	1	0	36877	1

Signal:

RAM_MEMORY(8)(24)

	From	To	Count	Threshold
Bin	0	1	2534	1
Bin	1	0	36380	1

Signal:

RAM_MEMORY(8)(23)

	From	To	Count	Threshold
Bin	0	1	2223	1
Bin	1	0	36367	1

Signal:

RAM_MEMORY(8)(22)

	From	To	Count	Threshold
Bin	0	1	2382	1
Bin	1	0	36009	1

Signal:

RAM_MEMORY(8)(21)

	From	To	Count	Threshold
Bin	0	1	2286	1
Bin	1	0	36400	1

Signal:

RAM_MEMORY(8)(20)

	From	To	Count	Threshold
Bin	0	1	2448	1
Bin	1	0	36063	1

Signal:

RAM_MEMORY(8)(19)

	From	To	Count	Threshold
Bin	0	1	2385	1
Bin	1	0	36097	1

Signal:

RAM_MEMORY(8)(18)

	From	To	Count	Threshold
Bin	0	1	2330	1
Bin	1	0	36522	1

Signal:

RAM_MEMORY(8)(17)

	From	To	Count	Threshold
Bin	0	1	2190	1
Bin	1	0	36270	1

Signal:

RAM_MEMORY(8)(16)

	From	To	Count	Threshold
Bin	0	1	2784	1
Bin	1	0	36464	1

Signal:

RAM_MEMORY(8)(15)

	From	To	Count	Threshold
Bin	0	1	2178	1
Bin	1	0	36084	1

Signal:

RAM_MEMORY(8)(14)

	From	To	Count	Threshold
Bin	0	1	2541	1
Bin	1	0	35920	1

Signal:

RAM_MEMORY(8)(13)

	From	To	Count	Threshold
Bin	0	1	2158	1
Bin	1	0	36466	1

Signal:

RAM_MEMORY(8)(12)

	From	To	Count	Threshold
Bin	0	1	2535	1
Bin	1	0	35968	1

Signal:

RAM_MEMORY(8)(11)

	From	To	Count	Threshold
Bin	0	1	2603	1
Bin	1	0	36553	1

Signal:

RAM_MEMORY(8)(10)

	From	To	Count	Threshold
Bin	0	1	2365	1
Bin	1	0	36173	1

Signal:

RAM_MEMORY(8)(9)

	From	To	Count	Threshold
Bin	0	1	2350	1
Bin	1	0	36872	1

Signal:

RAM_MEMORY(8)(8)

	From	To	Count	Threshold
Bin	0	1	2717	1
Bin	1	0	36593	1

Signal:

RAM_MEMORY(8)(7)

	From	To	Count	Threshold
Bin	0	1	2062	1
Bin	1	0	35782	1

Signal:

RAM_MEMORY(8)(6)

	From	To	Count	Threshold
Bin	0	1	2684	1
Bin	1	0	36229	1

Signal:

RAM_MEMORY(8)(5)

	From	To	Count	Threshold
Bin	0	1	2326	1
Bin	1	0	36056	1

Signal:

RAM_MEMORY(8)(4)

	From	To	Count	Threshold
Bin	0	1	2420	1
Bin	1	0	36208	1

Signal:

RAM_MEMORY(8)(3)

	From	To	Count	Threshold
Bin	0	1	2451	1
Bin	1	0	36434	1

Signal:

RAM_MEMORY(8)(2)

	From	To	Count	Threshold
Bin	0	1	2354	1
Bin	1	0	36244	1

Signal:

RAM_MEMORY(8)(1)

	From	To	Count	Threshold
Bin	0	1	2135	1
Bin	1	0	35894	1

Signal:

RAM_MEMORY(8)(0)

	From	To	Count	Threshold
Bin	0	1	2482	1
Bin	1	0	36332	1

Signal:

RAM_MEMORY(9)(31)

	From	To	Count	Threshold
Bin	0	1	1993	1
Bin	1	0	35464	1

Signal:

RAM_MEMORY(9)(30)

	From	To	Count	Threshold
Bin	0	1	2183	1
Bin	1	0	35671	1

Signal:

RAM_MEMORY(9)(29)

	From	To	Count	Threshold
Bin	0	1	1709	1
Bin	1	0	35060	1

Signal:

RAM_MEMORY(9)(28)

	From	To	Count	Threshold
Bin	0	1	2165	1
Bin	1	0	35501	1

Signal:

RAM_MEMORY(9)(27)

	From	To	Count	Threshold
Bin	0	1	1985	1
Bin	1	0	34803	1

Signal:

RAM_MEMORY(9)(26)

	From	To	Count	Threshold
Bin	0	1	2332	1
Bin	1	0	35352	1

Signal:

RAM_MEMORY(9)(25)

	From	To	Count	Threshold
Bin	0	1	1918	1
Bin	1	0	35174	1

Signal:

RAM_MEMORY(9)(24)

	From	To	Count	Threshold
Bin	0	1	2502	1
Bin	1	0	35511	1

Signal:

RAM_MEMORY(9)(23)

	From	To	Count	Threshold
Bin	0	1	1968	1
Bin	1	0	35386	1

Signal:

RAM_MEMORY(9)(22)

	From	To	Count	Threshold
Bin	0	1	2391	1
Bin	1	0	35690	1

Signal:

RAM_MEMORY(9)(21)

	From	To	Count	Threshold
Bin	0	1	1891	1
Bin	1	0	35179	1

Signal:

RAM_MEMORY(9)(20)

	From	To	Count	Threshold
Bin	0	1	2360	1
Bin	1	0	35478	1

Signal:

RAM_MEMORY(9)(19)

	From	To	Count	Threshold
Bin	0	1	1898	1
Bin	1	0	35316	1

Signal:

RAM_MEMORY(9)(18)

	From	To	Count	Threshold
Bin	0	1	2587	1
Bin	1	0	35500	1

Signal:

RAM_MEMORY(9)(17)

	From	To	Count	Threshold
Bin	0	1	2384	1
Bin	1	0	35150	1

Signal:

RAM_MEMORY(9)(16)

	From	To	Count	Threshold
Bin	0	1	2347	1
Bin	1	0	34685	1

Signal:

RAM_MEMORY(9)(15)

	From	To	Count	Threshold
Bin	0	1	2121	1
Bin	1	0	35361	1

Signal:

RAM_MEMORY(9)(14)

	From	To	Count	Threshold
Bin	0	1	2206	1
Bin	1	0	35450	1

Signal:

RAM_MEMORY(9)(13)

	From	To	Count	Threshold
Bin	0	1	2213	1
Bin	1	0	35223	1

Signal:

RAM_MEMORY(9)(12)

	From	To	Count	Threshold
Bin	0	1	2100	1
Bin	1	0	35063	1

Signal:

RAM_MEMORY(9)(11)

	From	To	Count	Threshold
Bin	0	1	2005	1
Bin	1	0	35910	1

Signal:

RAM_MEMORY(9)(10)

	From	To	Count	Threshold
Bin	0	1	2673	1
Bin	1	0	35653	1

Signal:

RAM_MEMORY(9)(9)

	From	To	Count	Threshold
Bin	0	1	2133	1
Bin	1	0	35432	1

Signal:

RAM_MEMORY(9)(8)

	From	To	Count	Threshold
Bin	0	1	2436	1
Bin	1	0	35337	1

Signal:

RAM_MEMORY(9)(7)

	From	To	Count	Threshold
Bin	0	1	2174	1
Bin	1	0	35369	1

Signal:

RAM_MEMORY(9)(6)

	From	To	Count	Threshold
Bin	0	1	2150	1
Bin	1	0	35431	1

Signal:

RAM_MEMORY(9)(5)

	From	To	Count	Threshold
Bin	0	1	2390	1
Bin	1	0	35847	1

Signal:

RAM_MEMORY(9)(4)

	From	To	Count	Threshold
Bin	0	1	2019	1
Bin	1	0	35286	1

Signal:

RAM_MEMORY(9)(3)

	From	To	Count	Threshold
Bin	0	1	2081	1
Bin	1	0	35161	1

Signal:

RAM_MEMORY(9)(2)

	From	To	Count	Threshold
Bin	0	1	2259	1
Bin	1	0	35585	1

Signal:

RAM_MEMORY(9)(1)

	From	To	Count	Threshold
Bin	0	1	1909	1
Bin	1	0	34954	1

Signal:

RAM_MEMORY(9)(0)

	From	To	Count	Threshold
Bin	0	1	2613	1
Bin	1	0	35732	1

Signal:

RAM_MEMORY(10)(31)

	From	To	Count	Threshold
Bin	0	1	1427	1
Bin	1	0	34642	1

Signal:

RAM_MEMORY(10)(30)

	From	To	Count	Threshold
Bin	0	1	2459	1
Bin	1	0	34931	1

Signal:

RAM_MEMORY(10)(29)

	From	To	Count	Threshold
Bin	0	1	1560	1
Bin	1	0	34918	1

Signal:

RAM_MEMORY(10)(28)

	From	To	Count	Threshold
Bin	0	1	1851	1
Bin	1	0	34801	1

Signal:

RAM_MEMORY(10)(27)

	From	To	Count	Threshold
Bin	0	1	2168	1
Bin	1	0	34772	1

Signal:

RAM_MEMORY(10)(26)

	From	To	Count	Threshold
Bin	0	1	1870	1
Bin	1	0	34900	1

Signal:

RAM_MEMORY(10)(25)

	From	To	Count	Threshold
Bin	0	1	1881	1
Bin	1	0	34665	1

Signal:

RAM_MEMORY(10)(24)

	From	To	Count	Threshold
Bin	0	1	1946	1
Bin	1	0	34596	1

Signal:

RAM_MEMORY(10)(23)

	From	To	Count	Threshold
Bin	0	1	1546	1
Bin	1	0	34556	1

Signal:

RAM_MEMORY(10)(22)

	From	To	Count	Threshold
Bin	0	1	2472	1
Bin	1	0	35076	1

Signal:

RAM_MEMORY(10)(21)

	From	To	Count	Threshold
Bin	0	1	1734	1
Bin	1	0	34856	1

Signal:

RAM_MEMORY(10)(20)

	From	To	Count	Threshold
Bin	0	1	2323	1
Bin	1	0	35209	1

Signal:

RAM_MEMORY(10)(19)

	From	To	Count	Threshold
Bin	0	1	1682	1
Bin	1	0	34920	1

Signal:

RAM_MEMORY(10)(18)

	From	To	Count	Threshold
Bin	0	1	2232	1
Bin	1	0	34765	1

Signal:

RAM_MEMORY(10)(17)

	From	To	Count	Threshold
Bin	0	1	1619	1
Bin	1	0	34643	1

Signal:

RAM_MEMORY(10)(16)

	From	To	Count	Threshold
Bin	0	1	1950	1
Bin	1	0	34865	1

Signal:

RAM_MEMORY(10)(15)

	From	To	Count	Threshold
Bin	0	1	2180	1
Bin	1	0	35307	1

Signal:

RAM_MEMORY(10)(14)

	From	To	Count	Threshold
Bin	0	1	2073	1
Bin	1	0	35111	1

Signal:

RAM_MEMORY(10)(13)

	From	To	Count	Threshold
Bin	0	1	1726	1
Bin	1	0	35060	1

Signal:

RAM_MEMORY(10)(12)

	From	To	Count	Threshold
Bin	0	1	2091	1
Bin	1	0	34783	1

Signal:

RAM_MEMORY(10)(11)

	From	To	Count	Threshold
Bin	0	1	1823	1
Bin	1	0	34837	1

Signal:

RAM_MEMORY(10)(10)

	From	To	Count	Threshold
Bin	0	1	2505	1
Bin	1	0	35069	1

Signal:

RAM_MEMORY(10)(9)

	From	To	Count	Threshold
Bin	0	1	1634	1
Bin	1	0	34535	1

Signal:

RAM_MEMORY(10)(8)

	From	To	Count	Threshold
Bin	0	1	1754	1
Bin	1	0	34407	1

Signal:

RAM_MEMORY(10)(7)

	From	To	Count	Threshold
Bin	0	1	2147	1
Bin	1	0	34746	1

Signal:

RAM_MEMORY(10)(6)

	From	To	Count	Threshold
Bin	0	1	1864	1
Bin	1	0	34893	1

Signal:

RAM_MEMORY(10)(5)

	From	To	Count	Threshold
Bin	0	1	1898	1
Bin	1	0	34759	1

Signal:

RAM_MEMORY(10)(4)

	From	To	Count	Threshold
Bin	0	1	2477	1
Bin	1	0	35102	1

Signal:

RAM_MEMORY(10)(3)

	From	To	Count	Threshold
Bin	0	1	2087	1
Bin	1	0	35011	1

Signal:

RAM_MEMORY(10)(2)

	From	To	Count	Threshold
Bin	0	1	2409	1
Bin	1	0	34832	1

Signal:

RAM_MEMORY(10)(1)

	From	To	Count	Threshold
Bin	0	1	2273	1
Bin	1	0	35157	1

Signal:

RAM_MEMORY(10)(0)

	From	To	Count	Threshold
Bin	0	1	2572	1
Bin	1	0	35141	1

Signal:

RAM_MEMORY(11)(31)

	From	To	Count	Threshold
Bin	0	1	1967	1
Bin	1	0	33395	1

Signal:

RAM_MEMORY(11)(30)

	From	To	Count	Threshold
Bin	0	1	2253	1
Bin	1	0	33229	1

Signal:

RAM_MEMORY(11)(29)

	From	To	Count	Threshold
Bin	0	1	1582	1
Bin	1	0	33726	1

Signal:

RAM_MEMORY(11)(28)

	From	To	Count	Threshold
Bin	0	1	1921	1
Bin	1	0	33581	1

Signal:

RAM_MEMORY(11)(27)

	From	To	Count	Threshold
Bin	0	1	1714	1
Bin	1	0	33452	1

Signal:

RAM_MEMORY(11)(26)

	From	To	Count	Threshold
Bin	0	1	2146	1
Bin	1	0	33679	1

Signal:

RAM_MEMORY(11)(25)

	From	To	Count	Threshold
Bin	0	1	1613	1
Bin	1	0	33392	1

Signal:

RAM_MEMORY(11)(24)

	From	To	Count	Threshold
Bin	0	1	1617	1
Bin	1	0	33221	1

Signal:

RAM_MEMORY(11)(23)

	From	To	Count	Threshold
Bin	0	1	1613	1
Bin	1	0	33411	1

Signal:

RAM_MEMORY(11)(22)

	From	To	Count	Threshold
Bin	0	1	2289	1
Bin	1	0	33829	1

Signal:

RAM_MEMORY(11)(21)

	From	To	Count	Threshold
Bin	0	1	1687	1
Bin	1	0	33673	1

Signal:

RAM_MEMORY(11)(20)

	From	To	Count	Threshold
Bin	0	1	1825	1
Bin	1	0	33515	1

Signal:

RAM_MEMORY(11)(19)

	From	To	Count	Threshold
Bin	0	1	1545	1
Bin	1	0	33421	1

Signal:

RAM_MEMORY(11)(18)

	From	To	Count	Threshold
Bin	0	1	2230	1
Bin	1	0	33622	1

Signal:

RAM_MEMORY(11)(17)

	From	To	Count	Threshold
Bin	0	1	1579	1
Bin	1	0	33528	1

Signal:

RAM_MEMORY(11)(16)

	From	To	Count	Threshold
Bin	0	1	2114	1
Bin	1	0	33249	1

Signal:

RAM_MEMORY(11)(15)

	From	To	Count	Threshold
Bin	0	1	1989	1
Bin	1	0	33316	1

Signal:

RAM_MEMORY(11)(14)

	From	To	Count	Threshold
Bin	0	1	1826	1
Bin	1	0	33358	1

Signal:

RAM_MEMORY(11)(13)

	From	To	Count	Threshold
Bin	0	1	1671	1
Bin	1	0	33583	1

Signal:

RAM_MEMORY(11)(12)

	From	To	Count	Threshold
Bin	0	1	2110	1
Bin	1	0	33136	1

Signal:

RAM_MEMORY(11)(11)

	From	To	Count	Threshold
Bin	0	1	1659	1
Bin	1	0	33575	1

Signal:

RAM_MEMORY(11)(10)

	From	To	Count	Threshold
Bin	0	1	2217	1
Bin	1	0	33443	1

Signal:

RAM_MEMORY(11)(9)

	From	To	Count	Threshold
Bin	0	1	1410	1
Bin	1	0	32853	1

Signal:

RAM_MEMORY(11)(8)

	From	To	Count	Threshold
Bin	0	1	2171	1
Bin	1	0	33143	1

Signal:

RAM_MEMORY(11)(7)

	From	To	Count	Threshold
Bin	0	1	2152	1
Bin	1	0	33113	1

Signal:

RAM_MEMORY(11)(6)

	From	To	Count	Threshold
Bin	0	1	2260	1
Bin	1	0	33298	1

Signal:

RAM_MEMORY(11)(5)

	From	To	Count	Threshold
Bin	0	1	1824	1
Bin	1	0	33606	1

Signal:

RAM_MEMORY(11)(4)

	From	To	Count	Threshold
Bin	0	1	1773	1
Bin	1	0	33230	1

Signal:

RAM_MEMORY(11)(3)

	From	To	Count	Threshold
Bin	0	1	2142	1
Bin	1	0	33291	1

Signal:

RAM_MEMORY(11)(2)

	From	To	Count	Threshold
Bin	0	1	1750	1
Bin	1	0	33094	1

Signal:

RAM_MEMORY(11)(1)

	From	To	Count	Threshold
Bin	0	1	1741	1
Bin	1	0	33008	1

Signal:

RAM_MEMORY(11)(0)

	From	To	Count	Threshold
Bin	0	1	2336	1
Bin	1	0	33531	1

Signal:

RAM_MEMORY(12)(31)

	From	To	Count	Threshold
Bin	0	1	1114	1
Bin	1	0	32749	1

Signal:

RAM_MEMORY(12)(30)

	From	To	Count	Threshold
Bin	0	1	1544	1
Bin	1	0	33115	1

Signal:

RAM_MEMORY(12)(29)

	From	To	Count	Threshold
Bin	0	1	1364	1
Bin	1	0	33021	1

Signal:

RAM_MEMORY(12)(28)

	From	To	Count	Threshold
Bin	0	1	1401	1
Bin	1	0	33441	1

Signal:

RAM_MEMORY(12)(27)

	From	To	Count	Threshold
Bin	0	1	1204	1
Bin	1	0	32835	1

Signal:

RAM_MEMORY(12)(26)

	From	To	Count	Threshold
Bin	0	1	1585	1
Bin	1	0	32919	1

Signal:

RAM_MEMORY(12)(25)

	From	To	Count	Threshold
Bin	0	1	1565	1
Bin	1	0	33179	1

Signal:

RAM_MEMORY(12)(24)

	From	To	Count	Threshold
Bin	0	1	1655	1
Bin	1	0	33071	1

Signal:

RAM_MEMORY(12)(23)

	From	To	Count	Threshold
Bin	0	1	967	1
Bin	1	0	32758	1

Signal:

RAM_MEMORY(12)(22)

	From	To	Count	Threshold
Bin	0	1	1401	1
Bin	1	0	33065	1

Signal:

RAM_MEMORY(12)(21)

	From	To	Count	Threshold
Bin	0	1	1260	1
Bin	1	0	33087	1

Signal:

RAM_MEMORY(12)(20)

	From	To	Count	Threshold
Bin	0	1	1398	1
Bin	1	0	33076	1

Signal:

RAM_MEMORY(12)(19)

	From	To	Count	Threshold
Bin	0	1	1176	1
Bin	1	0	33365	1

Signal:

RAM_MEMORY(12)(18)

	From	To	Count	Threshold
Bin	0	1	1369	1
Bin	1	0	32807	1

Signal:

RAM_MEMORY(12)(17)

	From	To	Count	Threshold
Bin	0	1	1393	1
Bin	1	0	32993	1

Signal:

RAM_MEMORY(12)(16)

	From	To	Count	Threshold
Bin	0	1	1686	1
Bin	1	0	33241	1

Signal:

RAM_MEMORY(12)(15)

	From	To	Count	Threshold
Bin	0	1	1388	1
Bin	1	0	33287	1

Signal:

RAM_MEMORY(12)(14)

	From	To	Count	Threshold
Bin	0	1	1569	1
Bin	1	0	33275	1

Signal:

RAM_MEMORY(12)(13)

	From	To	Count	Threshold
Bin	0	1	1220	1
Bin	1	0	33051	1

Signal:

RAM_MEMORY(12)(12)

	From	To	Count	Threshold
Bin	0	1	1387	1
Bin	1	0	32956	1

Signal:

RAM_MEMORY(12)(11)

	From	To	Count	Threshold
Bin	0	1	1130	1
Bin	1	0	33221	1

Signal:

RAM_MEMORY(12)(10)

	From	To	Count	Threshold
Bin	0	1	1656	1
Bin	1	0	32923	1

Signal:

RAM_MEMORY(12)(9)

	From	To	Count	Threshold
Bin	0	1	1448	1
Bin	1	0	33261	1

Signal:

RAM_MEMORY(12)(8)

	From	To	Count	Threshold
Bin	0	1	1649	1
Bin	1	0	33229	1

Signal:

RAM_MEMORY(12)(7)

	From	To	Count	Threshold
Bin	0	1	1103	1
Bin	1	0	33161	1

Signal:

RAM_MEMORY(12)(6)

	From	To	Count	Threshold
Bin	0	1	1619	1
Bin	1	0	33411	1

Signal:

RAM_MEMORY(12)(5)

	From	To	Count	Threshold
Bin	0	1	1425	1
Bin	1	0	33227	1

Signal:

RAM_MEMORY(12)(4)

	From	To	Count	Threshold
Bin	0	1	1256	1
Bin	1	0	32842	1

Signal:

RAM_MEMORY(12)(3)

	From	To	Count	Threshold
Bin	0	1	1178	1
Bin	1	0	33170	1

Signal:

RAM_MEMORY(12)(2)

	From	To	Count	Threshold
Bin	0	1	1624	1
Bin	1	0	33095	1

Signal:

RAM_MEMORY(12)(1)

	From	To	Count	Threshold
Bin	0	1	1338	1
Bin	1	0	32807	1

Signal:

RAM_MEMORY(12)(0)

	From	To	Count	Threshold
Bin	0	1	1658	1
Bin	1	0	32899	1

Signal:

RAM_MEMORY(13)(31)

	From	To	Count	Threshold
Bin	0	1	1088	1
Bin	1	0	31708	1

Signal:

RAM_MEMORY(13)(30)

	From	To	Count	Threshold
Bin	0	1	1505	1
Bin	1	0	31575	1

Signal:

RAM_MEMORY(13)(29)

	From	To	Count	Threshold
Bin	0	1	1156	1
Bin	1	0	31490	1

Signal:

RAM_MEMORY(13)(28)

	From	To	Count	Threshold
Bin	0	1	1491	1
Bin	1	0	31831	1

Signal:

RAM_MEMORY(13)(27)

	From	To	Count	Threshold
Bin	0	1	1404	1
Bin	1	0	31775	1

Signal:

RAM_MEMORY(13)(26)

	From	To	Count	Threshold
Bin	0	1	1367	1
Bin	1	0	31649	1

Signal:

RAM_MEMORY(13)(25)

	From	To	Count	Threshold
Bin	0	1	1125	1
Bin	1	0	31400	1

Signal:

RAM_MEMORY(13)(24)

	From	To	Count	Threshold
Bin	0	1	1422	1
Bin	1	0	31741	1

Signal:

RAM_MEMORY(13)(23)

	From	To	Count	Threshold
Bin	0	1	1168	1
Bin	1	0	31360	1

Signal:

RAM_MEMORY(13)(22)

	From	To	Count	Threshold
Bin	0	1	1662	1
Bin	1	0	31944	1

Signal:

RAM_MEMORY(13)(21)

	From	To	Count	Threshold
Bin	0	1	1079	1
Bin	1	0	31632	1

Signal:

RAM_MEMORY(13)(20)

	From	To	Count	Threshold
Bin	0	1	1311	1
Bin	1	0	31611	1

Signal:

RAM_MEMORY(13)(19)

	From	To	Count	Threshold
Bin	0	1	1153	1
Bin	1	0	31534	1

Signal:

RAM_MEMORY(13)(18)

	From	To	Count	Threshold
Bin	0	1	1689	1
Bin	1	0	31435	1

Signal:

RAM_MEMORY(13)(17)

	From	To	Count	Threshold
Bin	0	1	1285	1
Bin	1	0	31367	1

Signal:

RAM_MEMORY(13)(16)

	From	To	Count	Threshold
Bin	0	1	1535	1
Bin	1	0	31395	1

Signal:

RAM_MEMORY(13)(15)

	From	To	Count	Threshold
Bin	0	1	1054	1
Bin	1	0	31456	1

Signal:

RAM_MEMORY(13)(14)

	From	To	Count	Threshold
Bin	0	1	1535	1
Bin	1	0	31597	1

Signal:

RAM_MEMORY(13)(13)

	From	To	Count	Threshold
Bin	0	1	1229	1
Bin	1	0	31552	1

Signal:

RAM_MEMORY(13)(12)

	From	To	Count	Threshold
Bin	0	1	1493	1
Bin	1	0	31903	1

Signal:

RAM_MEMORY(13)(11)

	From	To	Count	Threshold
Bin	0	1	1114	1
Bin	1	0	31645	1

Signal:

RAM_MEMORY(13)(10)

	From	To	Count	Threshold
Bin	0	1	1447	1
Bin	1	0	31508	1

Signal:

RAM_MEMORY(13)(9)

	From	To	Count	Threshold
Bin	0	1	1267	1
Bin	1	0	31361	1

Signal:

RAM_MEMORY(13)(8)

	From	To	Count	Threshold
Bin	0	1	1484	1
Bin	1	0	31373	1

Signal:

RAM_MEMORY(13)(7)

	From	To	Count	Threshold
Bin	0	1	1041	1
Bin	1	0	31579	1

Signal:

RAM_MEMORY(13)(6)

	From	To	Count	Threshold
Bin	0	1	1504	1
Bin	1	0	31820	1

Signal:

RAM_MEMORY(13)(5)

	From	To	Count	Threshold
Bin	0	1	1340	1
Bin	1	0	31767	1

Signal:

RAM_MEMORY(13)(4)

	From	To	Count	Threshold
Bin	0	1	1560	1
Bin	1	0	31873	1

Signal:

RAM_MEMORY(13)(3)

	From	To	Count	Threshold
Bin	0	1	1430	1
Bin	1	0	32121	1

Signal:

RAM_MEMORY(13)(2)

	From	To	Count	Threshold
Bin	0	1	1467	1
Bin	1	0	31381	1

Signal:

RAM_MEMORY(13)(1)

	From	To	Count	Threshold
Bin	0	1	1437	1
Bin	1	0	31930	1

Signal:

RAM_MEMORY(13)(0)

	From	To	Count	Threshold
Bin	0	1	1473	1
Bin	1	0	31185	1

Signal:

RAM_MEMORY(14)(31)

	From	To	Count	Threshold
Bin	0	1	1375	1
Bin	1	0	30178	1

Signal:

RAM_MEMORY(14)(30)

	From	To	Count	Threshold
Bin	0	1	1606	1
Bin	1	0	30204	1

Signal:

RAM_MEMORY(14)(29)

	From	To	Count	Threshold
Bin	0	1	1246	1
Bin	1	0	30200	1

Signal:

RAM_MEMORY(14)(28)

	From	To	Count	Threshold
Bin	0	1	1128	1
Bin	1	0	30126	1

Signal:

RAM_MEMORY(14)(27)

	From	To	Count	Threshold
Bin	0	1	1402	1
Bin	1	0	30236	1

Signal:

RAM_MEMORY(14)(26)

	From	To	Count	Threshold
Bin	0	1	1307	1
Bin	1	0	30277	1

Signal:

RAM_MEMORY(14)(25)

	From	To	Count	Threshold
Bin	0	1	1264	1
Bin	1	0	30054	1

Signal:

RAM_MEMORY(14)(24)

	From	To	Count	Threshold
Bin	0	1	1522	1
Bin	1	0	30406	1

Signal:

RAM_MEMORY(14)(23)

	From	To	Count	Threshold
Bin	0	1	1399	1
Bin	1	0	30345	1

Signal:

RAM_MEMORY(14)(22)

	From	To	Count	Threshold
Bin	0	1	1503	1
Bin	1	0	30297	1

Signal:

RAM_MEMORY(14)(21)

	From	To	Count	Threshold
Bin	0	1	1333	1
Bin	1	0	29927	1

Signal:

RAM_MEMORY(14)(20)

	From	To	Count	Threshold
Bin	0	1	1485	1
Bin	1	0	30386	1

Signal:

RAM_MEMORY(14)(19)

	From	To	Count	Threshold
Bin	0	1	1409	1
Bin	1	0	30360	1

Signal:

RAM_MEMORY(14)(18)

	From	To	Count	Threshold
Bin	0	1	1416	1
Bin	1	0	30246	1

Signal:

RAM_MEMORY(14)(17)

	From	To	Count	Threshold
Bin	0	1	1469	1
Bin	1	0	30169	1

Signal:

RAM_MEMORY(14)(16)

	From	To	Count	Threshold
Bin	0	1	1343	1
Bin	1	0	30220	1

Signal:

RAM_MEMORY(14)(15)

	From	To	Count	Threshold
Bin	0	1	1208	1
Bin	1	0	30089	1

Signal:

RAM_MEMORY(14)(14)

	From	To	Count	Threshold
Bin	0	1	1635	1
Bin	1	0	30080	1

Signal:

RAM_MEMORY(14)(13)

	From	To	Count	Threshold
Bin	0	1	1313	1
Bin	1	0	30347	1

Signal:

RAM_MEMORY(14)(12)

	From	To	Count	Threshold
Bin	0	1	1299	1
Bin	1	0	30089	1

Signal:

RAM_MEMORY(14)(11)

	From	To	Count	Threshold
Bin	0	1	1414	1
Bin	1	0	30422	1

Signal:

RAM_MEMORY(14)(10)

	From	To	Count	Threshold
Bin	0	1	1312	1
Bin	1	0	30244	1

Signal:

RAM_MEMORY(14)(9)

	From	To	Count	Threshold
Bin	0	1	1134	1
Bin	1	0	30339	1

Signal:

RAM_MEMORY(14)(8)

	From	To	Count	Threshold
Bin	0	1	1398	1
Bin	1	0	30142	1

Signal:

RAM_MEMORY(14)(7)

	From	To	Count	Threshold
Bin	0	1	1166	1
Bin	1	0	30173	1

Signal:

RAM_MEMORY(14)(6)

	From	To	Count	Threshold
Bin	0	1	1439	1
Bin	1	0	30026	1

Signal:

RAM_MEMORY(14)(5)

	From	To	Count	Threshold
Bin	0	1	1303	1
Bin	1	0	30111	1

Signal:

RAM_MEMORY(14)(4)

	From	To	Count	Threshold
Bin	0	1	1354	1
Bin	1	0	29948	1

Signal:

RAM_MEMORY(14)(3)

	From	To	Count	Threshold
Bin	0	1	1554	1
Bin	1	0	30351	1

Signal:

RAM_MEMORY(14)(2)

	From	To	Count	Threshold
Bin	0	1	1441	1
Bin	1	0	30300	1

Signal:

RAM_MEMORY(14)(1)

	From	To	Count	Threshold
Bin	0	1	1100	1
Bin	1	0	30145	1

Signal:

RAM_MEMORY(14)(0)

	From	To	Count	Threshold
Bin	0	1	1664	1
Bin	1	0	30405	1

Signal:

RAM_MEMORY(15)(31)

	From	To	Count	Threshold
Bin	0	1	1000	1
Bin	1	0	28413	1

Signal:

RAM_MEMORY(15)(30)

	From	To	Count	Threshold
Bin	0	1	1429	1
Bin	1	0	28787	1

Signal:

RAM_MEMORY(15)(29)

	From	To	Count	Threshold
Bin	0	1	1262	1
Bin	1	0	29009	1

Signal:

RAM_MEMORY(15)(28)

	From	To	Count	Threshold
Bin	0	1	1425	1
Bin	1	0	28689	1

Signal:

RAM_MEMORY(15)(27)

	From	To	Count	Threshold
Bin	0	1	1287	1
Bin	1	0	28818	1

Signal:

RAM_MEMORY(15)(26)

	From	To	Count	Threshold
Bin	0	1	1597	1
Bin	1	0	28899	1

Signal:

RAM_MEMORY(15)(25)

	From	To	Count	Threshold
Bin	0	1	1120	1
Bin	1	0	28460	1

Signal:

RAM_MEMORY(15)(24)

	From	To	Count	Threshold
Bin	0	1	1723	1
Bin	1	0	28794	1

Signal:

RAM_MEMORY(15)(23)

	From	To	Count	Threshold
Bin	0	1	1188	1
Bin	1	0	28645	1

Signal:

RAM_MEMORY(15)(22)

	From	To	Count	Threshold
Bin	0	1	1392	1
Bin	1	0	28527	1

Signal:

RAM_MEMORY(15)(21)

	From	To	Count	Threshold
Bin	0	1	1132	1
Bin	1	0	28832	1

Signal:

RAM_MEMORY(15)(20)

	From	To	Count	Threshold
Bin	0	1	1235	1
Bin	1	0	28681	1

Signal:

RAM_MEMORY(15)(19)

	From	To	Count	Threshold
Bin	0	1	1237	1
Bin	1	0	28669	1

Signal:

RAM_MEMORY(15)(18)

	From	To	Count	Threshold
Bin	0	1	1537	1
Bin	1	0	28991	1

Signal:

RAM_MEMORY(15)(17)

	From	To	Count	Threshold
Bin	0	1	1333	1
Bin	1	0	28719	1

Signal:

RAM_MEMORY(15)(16)

	From	To	Count	Threshold
Bin	0	1	1310	1
Bin	1	0	28695	1

Signal:

RAM_MEMORY(15)(15)

	From	To	Count	Threshold
Bin	0	1	1131	1
Bin	1	0	28858	1

Signal:

RAM_MEMORY(15)(14)

	From	To	Count	Threshold
Bin	0	1	1638	1
Bin	1	0	28852	1

Signal:

RAM_MEMORY(15)(13)

	From	To	Count	Threshold
Bin	0	1	1210	1
Bin	1	0	28888	1

Signal:

RAM_MEMORY(15)(12)

	From	To	Count	Threshold
Bin	0	1	1369	1
Bin	1	0	28644	1

Signal:

RAM_MEMORY(15)(11)

	From	To	Count	Threshold
Bin	0	1	1151	1
Bin	1	0	28997	1

Signal:

RAM_MEMORY(15)(10)

	From	To	Count	Threshold
Bin	0	1	1431	1
Bin	1	0	28704	1

Signal:

RAM_MEMORY(15)(9)

	From	To	Count	Threshold
Bin	0	1	1275	1
Bin	1	0	28580	1

Signal:

RAM_MEMORY(15)(8)

	From	To	Count	Threshold
Bin	0	1	1418	1
Bin	1	0	28756	1

Signal:

RAM_MEMORY(15)(7)

	From	To	Count	Threshold
Bin	0	1	1192	1
Bin	1	0	28739	1

Signal:

RAM_MEMORY(15)(6)

	From	To	Count	Threshold
Bin	0	1	1579	1
Bin	1	0	28689	1

Signal:

RAM_MEMORY(15)(5)

	From	To	Count	Threshold
Bin	0	1	1625	1
Bin	1	0	28913	1

Signal:

RAM_MEMORY(15)(4)

	From	To	Count	Threshold
Bin	0	1	1415	1
Bin	1	0	28660	1

Signal:

RAM_MEMORY(15)(3)

	From	To	Count	Threshold
Bin	0	1	1124	1
Bin	1	0	28647	1

Signal:

RAM_MEMORY(15)(2)

	From	To	Count	Threshold
Bin	0	1	1311	1
Bin	1	0	28711	1

Signal:

RAM_MEMORY(15)(1)

	From	To	Count	Threshold
Bin	0	1	1172	1
Bin	1	0	28835	1

Signal:

RAM_MEMORY(15)(0)

	From	To	Count	Threshold
Bin	0	1	1444	1
Bin	1	0	28860	1

Signal:

RAM_MEMORY(16)(31)

	From	To	Count	Threshold
Bin	0	1	738	1
Bin	1	0	28116	1

Signal:

RAM_MEMORY(16)(30)

	From	To	Count	Threshold
Bin	0	1	1116	1
Bin	1	0	28227	1

Signal:

RAM_MEMORY(16)(29)

	From	To	Count	Threshold
Bin	0	1	934	1
Bin	1	0	28310	1

Signal:

RAM_MEMORY(16)(28)

	From	To	Count	Threshold
Bin	0	1	1148	1
Bin	1	0	28418	1

Signal:

RAM_MEMORY(16)(27)

	From	To	Count	Threshold
Bin	0	1	946	1
Bin	1	0	28405	1

Signal:

RAM_MEMORY(16)(26)

	From	To	Count	Threshold
Bin	0	1	1149	1
Bin	1	0	28176	1

Signal:

RAM_MEMORY(16)(25)

	From	To	Count	Threshold
Bin	0	1	1031	1
Bin	1	0	28225	1

Signal:

RAM_MEMORY(16)(24)

	From	To	Count	Threshold
Bin	0	1	1030	1
Bin	1	0	28242	1

Signal:

RAM_MEMORY(16)(23)

	From	To	Count	Threshold
Bin	0	1	824	1
Bin	1	0	28172	1

Signal:

RAM_MEMORY(16)(22)

	From	To	Count	Threshold
Bin	0	1	1103	1
Bin	1	0	28459	1

Signal:

RAM_MEMORY(16)(21)

	From	To	Count	Threshold
Bin	0	1	910	1
Bin	1	0	28292	1

Signal:

RAM_MEMORY(16)(20)

	From	To	Count	Threshold
Bin	0	1	800	1
Bin	1	0	28162	1

Signal:

RAM_MEMORY(16)(19)

	From	To	Count	Threshold
Bin	0	1	994	1
Bin	1	0	28302	1

Signal:

RAM_MEMORY(16)(18)

	From	To	Count	Threshold
Bin	0	1	1152	1
Bin	1	0	28309	1

Signal:

RAM_MEMORY(16)(17)

	From	To	Count	Threshold
Bin	0	1	1007	1
Bin	1	0	28132	1

Signal:

RAM_MEMORY(16)(16)

	From	To	Count	Threshold
Bin	0	1	965	1
Bin	1	0	28158	1

Signal:

RAM_MEMORY(16)(15)

	From	To	Count	Threshold
Bin	0	1	993	1
Bin	1	0	28150	1

Signal:

RAM_MEMORY(16)(14)

	From	To	Count	Threshold
Bin	0	1	1141	1
Bin	1	0	28157	1

Signal:

RAM_MEMORY(16)(13)

	From	To	Count	Threshold
Bin	0	1	660	1
Bin	1	0	28133	1

Signal:

RAM_MEMORY(16)(12)

	From	To	Count	Threshold
Bin	0	1	1072	1
Bin	1	0	28193	1

Signal:

RAM_MEMORY(16)(11)

	From	To	Count	Threshold
Bin	0	1	901	1
Bin	1	0	28231	1

Signal:

RAM_MEMORY(16)(10)

	From	To	Count	Threshold
Bin	0	1	1327	1
Bin	1	0	28309	1

Signal:

RAM_MEMORY(16)(9)

	From	To	Count	Threshold
Bin	0	1	965	1
Bin	1	0	28132	1

Signal:

RAM_MEMORY(16)(8)

	From	To	Count	Threshold
Bin	0	1	1200	1
Bin	1	0	28220	1

Signal:

RAM_MEMORY(16)(7)

	From	To	Count	Threshold
Bin	0	1	930	1
Bin	1	0	28185	1

Signal:

RAM_MEMORY(16)(6)

	From	To	Count	Threshold
Bin	0	1	978	1
Bin	1	0	28203	1

Signal:

RAM_MEMORY(16)(5)

	From	To	Count	Threshold
Bin	0	1	937	1
Bin	1	0	28242	1

Signal:

RAM_MEMORY(16)(4)

	From	To	Count	Threshold
Bin	0	1	1164	1
Bin	1	0	28196	1

Signal:

RAM_MEMORY(16)(3)

	From	To	Count	Threshold
Bin	0	1	936	1
Bin	1	0	28241	1

Signal:

RAM_MEMORY(16)(2)

	From	To	Count	Threshold
Bin	0	1	1146	1
Bin	1	0	28120	1

Signal:

RAM_MEMORY(16)(1)

	From	To	Count	Threshold
Bin	0	1	954	1
Bin	1	0	28286	1

Signal:

RAM_MEMORY(16)(0)

	From	To	Count	Threshold
Bin	0	1	1098	1
Bin	1	0	28160	1

Signal:

RAM_MEMORY(17)(31)

	From	To	Count	Threshold
Bin	0	1	973	1
Bin	1	0	26813	1

Signal:

RAM_MEMORY(17)(30)

	From	To	Count	Threshold
Bin	0	1	1087	1
Bin	1	0	26804	1

Signal:

RAM_MEMORY(17)(29)

	From	To	Count	Threshold
Bin	0	1	978	1
Bin	1	0	26817	1

Signal:

RAM_MEMORY(17)(28)

	From	To	Count	Threshold
Bin	0	1	991	1
Bin	1	0	26715	1

Signal:

RAM_MEMORY(17)(27)

	From	To	Count	Threshold
Bin	0	1	905	1
Bin	1	0	26743	1

Signal:

RAM_MEMORY(17)(26)

	From	To	Count	Threshold
Bin	0	1	1191	1
Bin	1	0	26708	1

Signal:

RAM_MEMORY(17)(25)

	From	To	Count	Threshold
Bin	0	1	828	1
Bin	1	0	26689	1

Signal:

RAM_MEMORY(17)(24)

	From	To	Count	Threshold
Bin	0	1	1238	1
Bin	1	0	26911	1

Signal:

RAM_MEMORY(17)(23)

	From	To	Count	Threshold
Bin	0	1	874	1
Bin	1	0	26767	1

Signal:

RAM_MEMORY(17)(22)

	From	To	Count	Threshold
Bin	0	1	881	1
Bin	1	0	26765	1

Signal:

RAM_MEMORY(17)(21)

	From	To	Count	Threshold
Bin	0	1	736	1
Bin	1	0	26654	1

Signal:

RAM_MEMORY(17)(20)

	From	To	Count	Threshold
Bin	0	1	999	1
Bin	1	0	26835	1

Signal:

RAM_MEMORY(17)(19)

	From	To	Count	Threshold
Bin	0	1	920	1
Bin	1	0	26927	1

Signal:

RAM_MEMORY(17)(18)

	From	To	Count	Threshold
Bin	0	1	843	1
Bin	1	0	26633	1

Signal:

RAM_MEMORY(17)(17)

	From	To	Count	Threshold
Bin	0	1	724	1
Bin	1	0	26495	1

Signal:

RAM_MEMORY(17)(16)

	From	To	Count	Threshold
Bin	0	1	1128	1
Bin	1	0	26645	1

Signal:

RAM_MEMORY(17)(15)

	From	To	Count	Threshold
Bin	0	1	919	1
Bin	1	0	26632	1

Signal:

RAM_MEMORY(17)(14)

	From	To	Count	Threshold
Bin	0	1	840	1
Bin	1	0	26686	1

Signal:

RAM_MEMORY(17)(13)

	From	To	Count	Threshold
Bin	0	1	911	1
Bin	1	0	26842	1

Signal:

RAM_MEMORY(17)(12)

	From	To	Count	Threshold
Bin	0	1	1179	1
Bin	1	0	26892	1

Signal:

RAM_MEMORY(17)(11)

	From	To	Count	Threshold
Bin	0	1	882	1
Bin	1	0	26744	1

Signal:

RAM_MEMORY(17)(10)

	From	To	Count	Threshold
Bin	0	1	1026	1
Bin	1	0	26865	1

Signal:

RAM_MEMORY(17)(9)

	From	To	Count	Threshold
Bin	0	1	1018	1
Bin	1	0	26767	1

Signal:

RAM_MEMORY(17)(8)

	From	To	Count	Threshold
Bin	0	1	786	1
Bin	1	0	26494	1

Signal:

RAM_MEMORY(17)(7)

	From	To	Count	Threshold
Bin	0	1	970	1
Bin	1	0	26583	1

Signal:

RAM_MEMORY(17)(6)

	From	To	Count	Threshold
Bin	0	1	918	1
Bin	1	0	26699	1

Signal:

RAM_MEMORY(17)(5)

	From	To	Count	Threshold
Bin	0	1	663	1
Bin	1	0	26561	1

Signal:

RAM_MEMORY(17)(4)

	From	To	Count	Threshold
Bin	0	1	879	1
Bin	1	0	26604	1

Signal:

RAM_MEMORY(17)(3)

	From	To	Count	Threshold
Bin	0	1	887	1
Bin	1	0	26781	1

Signal:

RAM_MEMORY(17)(2)

	From	To	Count	Threshold
Bin	0	1	942	1
Bin	1	0	26654	1

Signal:

RAM_MEMORY(17)(1)

	From	To	Count	Threshold
Bin	0	1	870	1
Bin	1	0	26587	1

Signal:

RAM_MEMORY(17)(0)

	From	To	Count	Threshold
Bin	0	1	1137	1
Bin	1	0	26718	1

Signal:

RAM_MEMORY(18)(31)

	From	To	Count	Threshold
Bin	0	1	904	1
Bin	1	0	25250	1

Signal:

RAM_MEMORY(18)(30)

	From	To	Count	Threshold
Bin	0	1	1144	1
Bin	1	0	25176	1

Signal:

RAM_MEMORY(18)(29)

	From	To	Count	Threshold
Bin	0	1	906	1
Bin	1	0	25223	1

Signal:

RAM_MEMORY(18)(28)

	From	To	Count	Threshold
Bin	0	1	841	1
Bin	1	0	25183	1

Signal:

RAM_MEMORY(18)(27)

	From	To	Count	Threshold
Bin	0	1	916	1
Bin	1	0	25179	1

Signal:

RAM_MEMORY(18)(26)

	From	To	Count	Threshold
Bin	0	1	1003	1
Bin	1	0	25248	1

Signal:

RAM_MEMORY(18)(25)

	From	To	Count	Threshold
Bin	0	1	873	1
Bin	1	0	25289	1

Signal:

RAM_MEMORY(18)(24)

	From	To	Count	Threshold
Bin	0	1	946	1
Bin	1	0	25241	1

Signal:

RAM_MEMORY(18)(23)

	From	To	Count	Threshold
Bin	0	1	857	1
Bin	1	0	25174	1

Signal:

RAM_MEMORY(18)(22)

	From	To	Count	Threshold
Bin	0	1	797	1
Bin	1	0	25058	1

Signal:

RAM_MEMORY(18)(21)

	From	To	Count	Threshold
Bin	0	1	905	1
Bin	1	0	25311	1

Signal:

RAM_MEMORY(18)(20)

	From	To	Count	Threshold
Bin	0	1	950	1
Bin	1	0	25260	1

Signal:

RAM_MEMORY(18)(19)

	From	To	Count	Threshold
Bin	0	1	917	1
Bin	1	0	25318	1

Signal:

RAM_MEMORY(18)(18)

	From	To	Count	Threshold
Bin	0	1	976	1
Bin	1	0	25250	1

Signal:

RAM_MEMORY(18)(17)

	From	To	Count	Threshold
Bin	0	1	837	1
Bin	1	0	25146	1

Signal:

RAM_MEMORY(18)(16)

	From	To	Count	Threshold
Bin	0	1	1015	1
Bin	1	0	25087	1

Signal:

RAM_MEMORY(18)(15)

	From	To	Count	Threshold
Bin	0	1	831	1
Bin	1	0	25209	1

Signal:

RAM_MEMORY(18)(14)

	From	To	Count	Threshold
Bin	0	1	984	1
Bin	1	0	25320	1

Signal:

RAM_MEMORY(18)(13)

	From	To	Count	Threshold
Bin	0	1	1001	1
Bin	1	0	25240	1

Signal:

RAM_MEMORY(18)(12)

	From	To	Count	Threshold
Bin	0	1	811	1
Bin	1	0	25097	1

Signal:

RAM_MEMORY(18)(11)

	From	To	Count	Threshold
Bin	0	1	1049	1
Bin	1	0	25335	1

Signal:

RAM_MEMORY(18)(10)

	From	To	Count	Threshold
Bin	0	1	1024	1
Bin	1	0	25240	1

Signal:

RAM_MEMORY(18)(9)

	From	To	Count	Threshold
Bin	0	1	940	1
Bin	1	0	25235	1

Signal:

RAM_MEMORY(18)(8)

	From	To	Count	Threshold
Bin	0	1	1185	1
Bin	1	0	25394	1

Signal:

RAM_MEMORY(18)(7)

	From	To	Count	Threshold
Bin	0	1	832	1
Bin	1	0	25179	1

Signal:

RAM_MEMORY(18)(6)

	From	To	Count	Threshold
Bin	0	1	1115	1
Bin	1	0	25204	1

Signal:

RAM_MEMORY(18)(5)

	From	To	Count	Threshold
Bin	0	1	1001	1
Bin	1	0	25297	1

Signal:

RAM_MEMORY(18)(4)

	From	To	Count	Threshold
Bin	0	1	924	1
Bin	1	0	25275	1

Signal:

RAM_MEMORY(18)(3)

	From	To	Count	Threshold
Bin	0	1	805	1
Bin	1	0	25291	1

Signal:

RAM_MEMORY(18)(2)

	From	To	Count	Threshold
Bin	0	1	1216	1
Bin	1	0	25300	1

Signal:

RAM_MEMORY(18)(1)

	From	To	Count	Threshold
Bin	0	1	880	1
Bin	1	0	25318	1

Signal:

RAM_MEMORY(18)(0)

	From	To	Count	Threshold
Bin	0	1	1204	1
Bin	1	0	25281	1

Signal:

RAM_MEMORY(19)(31)

	From	To	Count	Threshold
Bin	0	1	845	1
Bin	1	0	23724	1

Signal:

RAM_MEMORY(19)(30)

	From	To	Count	Threshold
Bin	0	1	927	1
Bin	1	0	23661	1

Signal:

RAM_MEMORY(19)(29)

	From	To	Count	Threshold
Bin	0	1	709	1
Bin	1	0	23680	1

Signal:

RAM_MEMORY(19)(28)

	From	To	Count	Threshold
Bin	0	1	904	1
Bin	1	0	23885	1

Signal:

RAM_MEMORY(19)(27)

	From	To	Count	Threshold
Bin	0	1	893	1
Bin	1	0	23763	1

Signal:

RAM_MEMORY(19)(26)

	From	To	Count	Threshold
Bin	0	1	1040	1
Bin	1	0	23954	1

Signal:

RAM_MEMORY(19)(25)

	From	To	Count	Threshold
Bin	0	1	787	1
Bin	1	0	23825	1

Signal:

RAM_MEMORY(19)(24)

	From	To	Count	Threshold
Bin	0	1	1218	1
Bin	1	0	23828	1

Signal:

RAM_MEMORY(19)(23)

	From	To	Count	Threshold
Bin	0	1	907	1
Bin	1	0	23848	1

Signal:

RAM_MEMORY(19)(22)

	From	To	Count	Threshold
Bin	0	1	1062	1
Bin	1	0	23687	1

Signal:

RAM_MEMORY(19)(21)

	From	To	Count	Threshold
Bin	0	1	842	1
Bin	1	0	23688	1

Signal:

RAM_MEMORY(19)(20)

	From	To	Count	Threshold
Bin	0	1	933	1
Bin	1	0	23732	1

Signal:

RAM_MEMORY(19)(19)

	From	To	Count	Threshold
Bin	0	1	682	1
Bin	1	0	23804	1

Signal:

RAM_MEMORY(19)(18)

	From	To	Count	Threshold
Bin	0	1	1039	1
Bin	1	0	23732	1

Signal:

RAM_MEMORY(19)(17)

	From	To	Count	Threshold
Bin	0	1	834	1
Bin	1	0	23820	1

Signal:

RAM_MEMORY(19)(16)

	From	To	Count	Threshold
Bin	0	1	921	1
Bin	1	0	23694	1

Signal:

RAM_MEMORY(19)(15)

	From	To	Count	Threshold
Bin	0	1	857	1
Bin	1	0	23607	1

Signal:

RAM_MEMORY(19)(14)

	From	To	Count	Threshold
Bin	0	1	1065	1
Bin	1	0	23872	1

Signal:

RAM_MEMORY(19)(13)

	From	To	Count	Threshold
Bin	0	1	928	1
Bin	1	0	23888	1

Signal:

RAM_MEMORY(19)(12)

	From	To	Count	Threshold
Bin	0	1	1090	1
Bin	1	0	23816	1

Signal:

RAM_MEMORY(19)(11)

	From	To	Count	Threshold
Bin	0	1	837	1
Bin	1	0	23696	1

Signal:

RAM_MEMORY(19)(10)

	From	To	Count	Threshold
Bin	0	1	1160	1
Bin	1	0	24000	1

Signal:

RAM_MEMORY(19)(9)

	From	To	Count	Threshold
Bin	0	1	694	1
Bin	1	0	23782	1

Signal:

RAM_MEMORY(19)(8)

	From	To	Count	Threshold
Bin	0	1	1114	1
Bin	1	0	23801	1

Signal:

RAM_MEMORY(19)(7)

	From	To	Count	Threshold
Bin	0	1	878	1
Bin	1	0	23838	1

Signal:

RAM_MEMORY(19)(6)

	From	To	Count	Threshold
Bin	0	1	1003	1
Bin	1	0	23879	1

Signal:

RAM_MEMORY(19)(5)

	From	To	Count	Threshold
Bin	0	1	816	1
Bin	1	0	23761	1

Signal:

RAM_MEMORY(19)(4)

	From	To	Count	Threshold
Bin	0	1	803	1
Bin	1	0	23699	1

Signal:

RAM_MEMORY(19)(3)

	From	To	Count	Threshold
Bin	0	1	902	1
Bin	1	0	24020	1

Signal:

RAM_MEMORY(19)(2)

	From	To	Count	Threshold
Bin	0	1	979	1
Bin	1	0	23863	1

Signal:

RAM_MEMORY(19)(1)

	From	To	Count	Threshold
Bin	0	1	732	1
Bin	1	0	23571	1

Signal:

RAM_MEMORY(19)(0)

	From	To	Count	Threshold
Bin	0	1	1138	1
Bin	1	0	23791	1

Signal:

RAM_MEMORY(20)(31)

	From	To	Count	Threshold
Bin	0	1	473	1
Bin	1	0	24207	1

Signal:

RAM_MEMORY(20)(30)

	From	To	Count	Threshold
Bin	0	1	247	1
Bin	1	0	24002	1

Signal:

RAM_MEMORY(20)(29)

	From	To	Count	Threshold
Bin	0	1	410	1
Bin	1	0	24086	1

Signal:

RAM_MEMORY(20)(28)

	From	To	Count	Threshold
Bin	0	1	410	1
Bin	1	0	24065	1

Signal:

RAM_MEMORY(20)(27)

	From	To	Count	Threshold
Bin	0	1	410	1
Bin	1	0	24044	1

Signal:

RAM_MEMORY(20)(26)

	From	To	Count	Threshold
Bin	0	1	410	1
Bin	1	0	24065	1

Signal:

RAM_MEMORY(20)(25)

	From	To	Count	Threshold
Bin	0	1	473	1
Bin	1	0	24207	1

Signal:

RAM_MEMORY(20)(24)

	From	To	Count	Threshold
Bin	0	1	268	1
Bin	1	0	24002	1

Signal:

RAM_MEMORY(20)(23)

	From	To	Count	Threshold
Bin	0	1	494	1
Bin	1	0	24207	1

Signal:

RAM_MEMORY(20)(22)

	From	To	Count	Threshold
Bin	0	1	247	1
Bin	1	0	24002	1

Signal:

RAM_MEMORY(20)(21)

	From	To	Count	Threshold
Bin	0	1	410	1
Bin	1	0	24044	1

Signal:

RAM_MEMORY(20)(20)

	From	To	Count	Threshold
Bin	0	1	410	1
Bin	1	0	24065	1

Signal:

RAM_MEMORY(20)(19)

	From	To	Count	Threshold
Bin	0	1	410	1
Bin	1	0	24044	1

Signal:

RAM_MEMORY(20)(18)

	From	To	Count	Threshold
Bin	0	1	410	1
Bin	1	0	24044	1

Signal:

RAM_MEMORY(20)(17)

	From	To	Count	Threshold
Bin	0	1	452	1
Bin	1	0	24207	1

Signal:

RAM_MEMORY(20)(16)

	From	To	Count	Threshold
Bin	0	1	247	1
Bin	1	0	24002	1

Signal:

RAM_MEMORY(20)(15)

	From	To	Count	Threshold
Bin	0	1	473	1
Bin	1	0	22771	1

Signal:

RAM_MEMORY(20)(14)

	From	To	Count	Threshold
Bin	0	1	268	1
Bin	1	0	22566	1

Signal:

RAM_MEMORY(20)(13)

	From	To	Count	Threshold
Bin	0	1	410	1
Bin	1	0	22587	1

Signal:

RAM_MEMORY(20)(12)

	From	To	Count	Threshold
Bin	0	1	476	1
Bin	1	0	22683	1

Signal:

RAM_MEMORY(20)(11)

	From	To	Count	Threshold
Bin	0	1	555	1
Bin	1	0	22794	1

Signal:

RAM_MEMORY(20)(10)

	From	To	Count	Threshold
Bin	0	1	578	1
Bin	1	0	22822	1

Signal:

RAM_MEMORY(20)(9)

	From	To	Count	Threshold
Bin	0	1	757	1
Bin	1	0	23118	1

Signal:

RAM_MEMORY(20)(8)

	From	To	Count	Threshold
Bin	0	1	705	1
Bin	1	0	23117	1

Signal:

RAM_MEMORY(20)(7)

	From	To	Count	Threshold
Bin	0	1	473	1
Bin	1	0	22766	1

Signal:

RAM_MEMORY(20)(6)

	From	To	Count	Threshold
Bin	0	1	247	1
Bin	1	0	22561	1

Signal:

RAM_MEMORY(20)(5)

	From	To	Count	Threshold
Bin	0	1	410	1
Bin	1	0	22603	1

Signal:

RAM_MEMORY(20)(4)

	From	To	Count	Threshold
Bin	0	1	410	1
Bin	1	0	22624	1

Signal:

RAM_MEMORY(20)(3)

	From	To	Count	Threshold
Bin	0	1	410	1
Bin	1	0	22624	1

Signal:

RAM_MEMORY(20)(2)

	From	To	Count	Threshold
Bin	0	1	677	1
Bin	1	0	22860	1

Signal:

RAM_MEMORY(20)(1)

	From	To	Count	Threshold
Bin	0	1	988	1
Bin	1	0	22905	1

Signal:

RAM_MEMORY(20)(0)

	From	To	Count	Threshold
Bin	0	1	550	1
Bin	1	0	22825	1

Signal:

INT_READ_DATA(31)

	From	To	Count	Threshold
Bin	0	1	7996	1
Bin	1	0	9544	1

Signal:

INT_READ_DATA(30)

	From	To	Count	Threshold
Bin	0	1	8401	1
Bin	1	0	9950	1

Signal:

INT_READ_DATA(29)

	From	To	Count	Threshold
Bin	0	1	7970	1
Bin	1	0	9517	1

Signal:

INT_READ_DATA(28)

	From	To	Count	Threshold
Bin	0	1	32299	1
Bin	1	0	33846	1

Signal:

INT_READ_DATA(27)

	From	To	Count	Threshold
Bin	0	1	25847	1
Bin	1	0	27394	1

Signal:

INT_READ_DATA(26)

	From	To	Count	Threshold
Bin	0	1	32831	1
Bin	1	0	34376	1

Signal:

INT_READ_DATA(25)

	From	To	Count	Threshold
Bin	0	1	27830	1
Bin	1	0	29376	1

Signal:

INT_READ_DATA(24)

	From	To	Count	Threshold
Bin	0	1	33449	1
Bin	1	0	34998	1

Signal:

INT_READ_DATA(23)

	From	To	Count	Threshold
Bin	0	1	28350	1
Bin	1	0	29896	1

Signal:

INT_READ_DATA(22)

	From	To	Count	Threshold
Bin	0	1	33161	1
Bin	1	0	34709	1

Signal:

INT_READ_DATA(21)

	From	To	Count	Threshold
Bin	0	1	28491	1
Bin	1	0	30040	1

Signal:

INT_READ_DATA(20)

	From	To	Count	Threshold
Bin	0	1	33151	1
Bin	1	0	34699	1

Signal:

INT_READ_DATA(19)

	From	To	Count	Threshold
Bin	0	1	28882	1
Bin	1	0	30430	1

Signal:

INT_READ_DATA(18)

	From	To	Count	Threshold
Bin	0	1	34045	1
Bin	1	0	35592	1

Signal:

INT_READ_DATA(17)

	From	To	Count	Threshold
Bin	0	1	15562	1
Bin	1	0	17111	1

Signal:

INT_READ_DATA(16)

	From	To	Count	Threshold
Bin	0	1	17018	1
Bin	1	0	18566	1

Signal:

INT_READ_DATA(15)

	From	To	Count	Threshold
Bin	0	1	16183	1
Bin	1	0	17732	1

Signal:

INT_READ_DATA(14)

	From	To	Count	Threshold
Bin	0	1	16987	1
Bin	1	0	18536	1

Signal:

INT_READ_DATA(13)

	From	To	Count	Threshold
Bin	0	1	16626	1
Bin	1	0	18175	1

Signal:

INT_READ_DATA(12)

	From	To	Count	Threshold
Bin	0	1	17813	1
Bin	1	0	19361	1

Signal:

INT_READ_DATA(11)

	From	To	Count	Threshold
Bin	0	1	16071	1
Bin	1	0	17617	1

Signal:

INT_READ_DATA(10)

	From	To	Count	Threshold
Bin	0	1	17316	1
Bin	1	0	18864	1

Signal:

INT_READ_DATA(9)

	From	To	Count	Threshold
Bin	0	1	30310	1
Bin	1	0	31857	1

Signal:

INT_READ_DATA(8)

	From	To	Count	Threshold
Bin	0	1	18370	1
Bin	1	0	19916	1

Signal:

INT_READ_DATA(7)

	From	To	Count	Threshold
Bin	0	1	41655	1
Bin	1	0	43202	1

Signal:

INT_READ_DATA(6)

	From	To	Count	Threshold
Bin	0	1	26682	1
Bin	1	0	28231	1

Signal:

INT_READ_DATA(5)

	From	To	Count	Threshold
Bin	0	1	21132	1
Bin	1	0	22679	1

Signal:

INT_READ_DATA(4)

	From	To	Count	Threshold
Bin	0	1	19259	1
Bin	1	0	20807	1

Signal:

INT_READ_DATA(3)

	From	To	Count	Threshold
Bin	0	1	32491	1
Bin	1	0	34037	1

Signal:

INT_READ_DATA(2)

	From	To	Count	Threshold
Bin	0	1	31898	1
Bin	1	0	33445	1

Signal:

INT_READ_DATA(1)

	From	To	Count	Threshold
Bin	0	1	32524	1
Bin	1	0	34069	1

Signal:

INT_READ_DATA(0)

	From	To	Count	Threshold
Bin	0	1	43007	1
Bin	1	0	44555	1

Signal:

BYTE_WE(3)

	From	To	Count	Threshold
Bin	0	1	158140	1
Bin	1	0	160340	1

Signal:

BYTE_WE(2)

	From	To	Count	Threshold
Bin	0	1	158140	1
Bin	1	0	160340	1

Signal:

BYTE_WE(1)

	From	To	Count	Threshold
Bin	0	1	158140	1
Bin	1	0	160340	1

Signal:

BYTE_WE(0)

	From	To	Count	Threshold
Bin	0	1	158140	1
Bin	1	0	160340	1

Uncovered expressions:

Excluded expressions:

Covered expressions:

Uncovered FSM states:

Excluded FSM states:

Covered FSM states:

Uncovered functional coverage:

Excluded functional coverage:

Covered functional coverage: