NVC code coverage report

Hierarchy

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.MEMORY_REGISTERS_INST.TEST_REGISTERS_GEN_TRUE.TXT_BUF_TEST_DATA_PADDING_GEN(3).TXT_BUF_PADDING_INDEX_GEN_TRUE

File:  /__w/ctu-can-regression/ctu-can-regression/src/memory_registers/memory_registers.vhd


Current Instance Statement Branch Toggle Expression FSM state Functional Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.MEMORY_REGISTERS_INST.TEST_REGISTERS_GEN_TRUE.TXT_BUF_TEST_DATA_PADDING_GEN(3).TXT_BUF_PADDING_INDEX_GEN_TRUE 100.0 % (1/1) N.A. N.A. N.A. N.A. N.A. 100.0 % (1/1)

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.


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Signal assignment statement on line 518:

518:                mr_tst_rdata_tst_rdata_txb_i(i) <= mr_tst_rdata_tst_rdata_txb(i)
Count: 3484
Threshold: 1

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