NVC code coverage report

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.MEMORY_REGISTERS_INST.CONTROL_REGISTERS_REG_MAP_COMP.FILTER_A_MASK_PRESENT_GEN_T

File:  /__w/ctu-can-regression/ctu-can-regression/src/memory_registers/generated/control_registers_reg_map.vhd

Sub-instances:

Instance Statement Branch Toggle Expression FSM state Functional Average
FILTER_A_MASK_BIT_MASK_A_VAL_SLICE_1_REG_COMP 100.0 % (33/33) 100.0 % (48/48) 100.0 % (58/58) 100.0 % (35/35) N.A. N.A. 100.0 % (174/174)
FILTER_A_MASK_BIT_MASK_A_VAL_SLICE_2_REG_COMP 100.0 % (33/33) 100.0 % (48/48) 100.0 % (58/58) 100.0 % (35/35) N.A. N.A. 100.0 % (174/174)
FILTER_A_MASK_BIT_MASK_A_VAL_SLICE_3_REG_COMP 100.0 % (33/33) 100.0 % (48/48) 100.0 % (58/58) 100.0 % (35/35) N.A. N.A. 100.0 % (174/174)
FILTER_A_MASK_BIT_MASK_A_VAL_SLICE_4_REG_COMP 100.0 % (21/21) 100.0 % (30/30) 100.0 % (40/40) 100.0 % (23/23) N.A. N.A. 100.0 % (114/114)

Current Instance:

Instance Statement Branch Toggle Expression FSM state Functional Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.MEMORY_REGISTERS_INST.CONTROL_REGISTERS_REG_MAP_COMP.FILTER_A_MASK_PRESENT_GEN_T N.A. N.A. N.A. N.A. N.A. N.A. N.A.

Details:

The limit of printed items was reached (5000). Total 261615 items are not displayed.

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