NVC code coverage report

File: /__w/ctu-can-regression/ctu-can-regression/src/memory_registers/memory_registers.vhd

Current Instance	Statement	Branch	Toggle	Expression	FSM state	Functional	Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.MEMORY_REGISTERS_INST.MT_5_TXT_BUFFS	100.0 % (4/4)	100.0 % (2/2)	N.A.	100.0 % (5/5)	N.A.	N.A.	100.0 % (11/11)

Current Instance

Statement

Branch

Toggle

Expression

FSM state

Functional

Average

CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.DUT.MEMORY_REGISTERS_INST.MT_5_TXT_BUFFS

100.0 % (4/4)

100.0 % (2/2)

N.A.

100.0 % (5/5)

N.A.

100.0 % (11/11)

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.

Statement

Branch

Toggle

Expression

FSM state

Functional

Uncovered statements:

Excluded statements:

Covered statements:

Signal assignment statement on line 648:

648: mr_tx_priority(5) <= mr_ctrl_out_i.tx_priority_txt6p;
Count: 413
Threshold: 1

If statement on lines 649 to 651:

649:        mr_tx_command_txbi(5)   <= mr_ctrl_out_i.tx_command_txb6 when (mr_ctrl_out_i.mode_txbbm = '0') 
650:                                                                 else 
651:                                   mr_ctrl_out_i.tx_command_txb5 or mr_ctrl_out_i.tx_command_txb6;

Count: 566
Threshold: 1

Signal assignment statement on line 649:

649:        mr_tx_command_txbi(5)   <= mr_ctrl_out_i.tx_command_txb6 when (mr_ctrl_out_i.mode_txbbm = '0')

Count: 373
Threshold: 1

Signal assignment statement on line 651:

651:                                   mr_ctrl_out_i.tx_command_txb5 or mr_ctrl_out_i.tx_command_txb6;

Count: 193
Threshold: 1

Uncovered branches:

Excluded branches:

Covered branches:

"if" / "when" / "else" condition on line 649:

649:        mr_tx_command_txbi(5)   <= mr_ctrl_out_i.tx_command_txb6 when (mr_ctrl_out_i.mode_txbbm = '0')

	Evaluated to	Count	Threshold
Bin	True	373	1
Bin	False	193	1

Uncovered toggles:

Excluded toggles:

Covered toggles:

Uncovered expressions:

Excluded expressions:

Covered expressions:

"=" expression on line 649:

mr_ctrl_out_i.mode_txbbm = '0'

	Evaluated to	Count	Threshold
Bin	False	193	1
Bin	True	373	1

"or" expression on line 651:

 mr_ctrl_out_i.tx_command_txb5 or mr_ctrl_out_i.tx_command_txb6 
 <------------LHS------------>    <------------RHS------------>

	LHS	RHS	Count	Threshold
Bin	'0'	'0'	16	1
Bin	'0'	'1'	2	1
Bin	'1'	'0'	10	1