NVC code coverage report

Hierarchy

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.I_DUT.I_MR_TOP.I_CONTROL_REGISTERS_REG_MAP.G_FILTER_C_MASK_BIT_MASK_C_VAL_SLICE_2_F

File:  /__w/CTU-CAN-FD/CTU-CAN-FD/src/memory_registers/generated/control_registers_reg_map.vhd


Current Instance Statement Branch Toggle Expression FSM state Functional Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.I_DUT.I_MR_TOP.I_CONTROL_REGISTERS_REG_MAP.G_FILTER_C_MASK_BIT_MASK_C_VAL_SLICE_2_F 100.0 % (1/1) N.A. N.A. N.A. N.A. N.A. 100.0 % (1/1)

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.


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Signal assignment statement on line 1982:

1982:        control_registers_out_i.filter_c_mask_bit_mask_c_val(15 downto 8) <= (others => '0'); 
Count: 1436
Threshold: 1

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