NVC code coverage report

Signal assignment statement on line 208:

208:    txtb_port_b_data_out <= txtb_port_b_data_out_i; 
Count: 18383
Threshold: 1

---

If statement on lines 277 to 280:

277:    tst_ena <= '1' when (mr_tst_control_tmaena = '1') and 
278:                        (mr_tst_dest_tst_mtgt = std_logic_vector(to_unsigned(G_ID + 2, 4))) 
279:                   else 
280:               '0'; 
Count: 4626
Threshold: 1

---

Signal assignment statement on line 277:

277:    tst_ena <= '1' when (mr_tst_control_tmaena = '1') and 
Count: 303
Threshold: 1

---

Signal assignment statement on line 280:

280:               '0'; 
Count: 4323
Threshold: 1

---

If statement on lines 283 to 285:

283:    txtb_port_a_address_i <= txtb_port_a_address when (tst_ena = '0') 
284:                                                 else 
285:                             mr_tst_dest_tst_addr(4 downto 0); 
Count: 49940803
Threshold: 1

---

Signal assignment statement on line 283:

283:    txtb_port_a_address_i <= txtb_port_a_address when (tst_ena = '0') 
Count: 49886107
Threshold: 1

---

Signal assignment statement on line 285:

285:                             mr_tst_dest_tst_addr(4 downto 0); 
Count: 54696
Threshold: 1

---

If statement on lines 287 to 289:

287:    txtb_port_a_write_i <= txtb_port_a_write when (tst_ena = '0') 
288:                                             else 
289:                           mr_tst_control_twrstb; 
Count: 188470
Threshold: 1

---

Signal assignment statement on line 287:

287:    txtb_port_a_write_i <= txtb_port_a_write when (tst_ena = '0') 
Count: 184340
Threshold: 1

---

Signal assignment statement on line 289:

289:                           mr_tst_control_twrstb; 
Count: 4130
Threshold: 1

---

If statement on lines 291 to 293:

291:    txtb_port_a_data_i <= txtb_port_a_data_in when (tst_ena = '0') 
292:                                              else 
293:                          mr_tst_wdata_tst_wdata; 
Count: 1598808
Threshold: 1

---

Signal assignment statement on line 291:

291:    txtb_port_a_data_i <= txtb_port_a_data_in when (tst_ena = '0') 
Count: 1564285
Threshold: 1

---

Signal assignment statement on line 293:

293:                          mr_tst_wdata_tst_wdata; 
Count: 34523
Threshold: 1

---

If statement on lines 296 to 298:

296:    txtb_port_b_address_i <= txtb_port_b_address when (tst_ena = '0') 
297:                                                 else 
298:                             mr_tst_dest_tst_addr(4 downto 0); 
Count: 183291
Threshold: 1

---

Signal assignment statement on line 296:

296:    txtb_port_b_address_i <= txtb_port_b_address when (tst_ena = '0') 
Count: 179417
Threshold: 1

---

Signal assignment statement on line 298:

298:                             mr_tst_dest_tst_addr(4 downto 0); 
Count: 3874
Threshold: 1

---

If statement on lines 300 to 302:

300:    mr_tst_rdata_tst_rdata <= txtb_port_b_data_out_i when (tst_ena = '1') 
301:                                                     else 
302:                                     (others => '0'); 
Count: 19649
Threshold: 1

---

Signal assignment statement on line 300:

300:    mr_tst_rdata_tst_rdata <= txtb_port_b_data_out_i when (tst_ena = '1') 
Count: 2309
Threshold: 1

---

Signal assignment statement on line 302:

302:                                     (others => '0'); 
Count: 17340
Threshold: 1

"if" / "when" / "else" condition on lines 277 to 278:

277:    tst_ena <= '1' when (mr_tst_control_tmaena = '1') and 
278:                        (mr_tst_dest_tst_mtgt = std_logic_vector(to_unsigned(G_ID + 2, 4))) 

	Evaluated to	Count	Threshold
Bin	True	303	1
Bin	False	4323	1

---

"if" / "when" / "else" condition on line 283:

283:    txtb_port_a_address_i <= txtb_port_a_address when (tst_ena = '0') 

	Evaluated to	Count	Threshold
Bin	True	49886107	1
Bin	False	54696	1

---

"if" / "when" / "else" condition on line 287:

287:    txtb_port_a_write_i <= txtb_port_a_write when (tst_ena = '0') 

	Evaluated to	Count	Threshold
Bin	True	184340	1
Bin	False	4130	1

---

"if" / "when" / "else" condition on line 291:

291:    txtb_port_a_data_i <= txtb_port_a_data_in when (tst_ena = '0') 

	Evaluated to	Count	Threshold
Bin	True	1564285	1
Bin	False	34523	1

---

"if" / "when" / "else" condition on line 296:

296:    txtb_port_b_address_i <= txtb_port_b_address when (tst_ena = '0') 

	Evaluated to	Count	Threshold
Bin	True	179417	1
Bin	False	3874	1

---

"if" / "when" / "else" condition on line 300:

300:    mr_tst_rdata_tst_rdata <= txtb_port_b_data_out_i when (tst_ena = '1') 

	Evaluated to	Count	Threshold
Bin	True	2309	1
Bin	False	17340	1

Port:

 CLK_SYS

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 RST_N

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 MR_SETTINGS_PCHKE

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 MR_TST_CONTROL_TMAENA

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 MR_TST_CONTROL_TWRSTB

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 MR_TST_DEST_TST_ADDR

	Element	From	To	Count	Threshold	Excluded due to
Bin	(4)	0	1	0	1	Exclude file
Bin	(4)	1	0	0	1	Exclude file
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

---

Port:

 MR_TST_DEST_TST_MTGT

	Element	From	To	Count	Threshold	Excluded due to
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

---

Port:

 MR_TST_WDATA_TST_WDATA

	Element	From	To	Count	Threshold	Excluded due to
Bin	(31)	0	1	0	1	Exclude file
Bin	(31)	1	0	0	1	Exclude file
Bin	(30)	0	1	0	1	Exclude file
Bin	(30)	1	0	0	1	Exclude file
Bin	(29)	0	1	0	1	Exclude file
Bin	(29)	1	0	0	1	Exclude file
Bin	(28)	0	1	0	1	Exclude file
Bin	(28)	1	0	0	1	Exclude file
Bin	(27)	0	1	0	1	Exclude file
Bin	(27)	1	0	0	1	Exclude file
Bin	(26)	0	1	0	1	Exclude file
Bin	(26)	1	0	0	1	Exclude file
Bin	(25)	0	1	0	1	Exclude file
Bin	(25)	1	0	0	1	Exclude file
Bin	(24)	0	1	0	1	Exclude file
Bin	(24)	1	0	0	1	Exclude file
Bin	(23)	0	1	0	1	Exclude file
Bin	(23)	1	0	0	1	Exclude file
Bin	(22)	0	1	0	1	Exclude file
Bin	(22)	1	0	0	1	Exclude file
Bin	(21)	0	1	0	1	Exclude file
Bin	(21)	1	0	0	1	Exclude file
Bin	(20)	0	1	0	1	Exclude file
Bin	(20)	1	0	0	1	Exclude file
Bin	(19)	0	1	0	1	Exclude file
Bin	(19)	1	0	0	1	Exclude file
Bin	(18)	0	1	0	1	Exclude file
Bin	(18)	1	0	0	1	Exclude file
Bin	(17)	0	1	0	1	Exclude file
Bin	(17)	1	0	0	1	Exclude file
Bin	(16)	0	1	0	1	Exclude file
Bin	(16)	1	0	0	1	Exclude file
Bin	(15)	0	1	0	1	Exclude file
Bin	(15)	1	0	0	1	Exclude file
Bin	(14)	0	1	0	1	Exclude file
Bin	(14)	1	0	0	1	Exclude file
Bin	(13)	0	1	0	1	Exclude file
Bin	(13)	1	0	0	1	Exclude file
Bin	(12)	0	1	0	1	Exclude file
Bin	(12)	1	0	0	1	Exclude file
Bin	(11)	0	1	0	1	Exclude file
Bin	(11)	1	0	0	1	Exclude file
Bin	(10)	0	1	0	1	Exclude file
Bin	(10)	1	0	0	1	Exclude file
Bin	(9)	0	1	0	1	Exclude file
Bin	(9)	1	0	0	1	Exclude file
Bin	(8)	0	1	0	1	Exclude file
Bin	(8)	1	0	0	1	Exclude file
Bin	(7)	0	1	0	1	Exclude file
Bin	(7)	1	0	0	1	Exclude file
Bin	(6)	0	1	0	1	Exclude file
Bin	(6)	1	0	0	1	Exclude file
Bin	(5)	0	1	0	1	Exclude file
Bin	(5)	1	0	0	1	Exclude file
Bin	(4)	0	1	0	1	Exclude file
Bin	(4)	1	0	0	1	Exclude file
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

---

Port:

 TXTB_PORT_A_ADDRESS

	Element	From	To	Count	Threshold	Excluded due to
Bin	(4)	0	1	0	1	Exclude file
Bin	(4)	1	0	0	1	Exclude file
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

---

Port:

 TXTB_PORT_A_DATA_IN

	Element	From	To	Count	Threshold	Excluded due to
Bin	(31)	0	1	0	1	Exclude file
Bin	(31)	1	0	0	1	Exclude file
Bin	(30)	0	1	0	1	Exclude file
Bin	(30)	1	0	0	1	Exclude file
Bin	(29)	0	1	0	1	Exclude file
Bin	(29)	1	0	0	1	Exclude file
Bin	(28)	0	1	0	1	Exclude file
Bin	(28)	1	0	0	1	Exclude file
Bin	(27)	0	1	0	1	Exclude file
Bin	(27)	1	0	0	1	Exclude file
Bin	(26)	0	1	0	1	Exclude file
Bin	(26)	1	0	0	1	Exclude file
Bin	(25)	0	1	0	1	Exclude file
Bin	(25)	1	0	0	1	Exclude file
Bin	(24)	0	1	0	1	Exclude file
Bin	(24)	1	0	0	1	Exclude file
Bin	(23)	0	1	0	1	Exclude file
Bin	(23)	1	0	0	1	Exclude file
Bin	(22)	0	1	0	1	Exclude file
Bin	(22)	1	0	0	1	Exclude file
Bin	(21)	0	1	0	1	Exclude file
Bin	(21)	1	0	0	1	Exclude file
Bin	(20)	0	1	0	1	Exclude file
Bin	(20)	1	0	0	1	Exclude file
Bin	(19)	0	1	0	1	Exclude file
Bin	(19)	1	0	0	1	Exclude file
Bin	(18)	0	1	0	1	Exclude file
Bin	(18)	1	0	0	1	Exclude file
Bin	(17)	0	1	0	1	Exclude file
Bin	(17)	1	0	0	1	Exclude file
Bin	(16)	0	1	0	1	Exclude file
Bin	(16)	1	0	0	1	Exclude file
Bin	(15)	0	1	0	1	Exclude file
Bin	(15)	1	0	0	1	Exclude file
Bin	(14)	0	1	0	1	Exclude file
Bin	(14)	1	0	0	1	Exclude file
Bin	(13)	0	1	0	1	Exclude file
Bin	(13)	1	0	0	1	Exclude file
Bin	(12)	0	1	0	1	Exclude file
Bin	(12)	1	0	0	1	Exclude file
Bin	(11)	0	1	0	1	Exclude file
Bin	(11)	1	0	0	1	Exclude file
Bin	(10)	0	1	0	1	Exclude file
Bin	(10)	1	0	0	1	Exclude file
Bin	(9)	0	1	0	1	Exclude file
Bin	(9)	1	0	0	1	Exclude file
Bin	(8)	0	1	0	1	Exclude file
Bin	(8)	1	0	0	1	Exclude file
Bin	(7)	0	1	0	1	Exclude file
Bin	(7)	1	0	0	1	Exclude file
Bin	(6)	0	1	0	1	Exclude file
Bin	(6)	1	0	0	1	Exclude file
Bin	(5)	0	1	0	1	Exclude file
Bin	(5)	1	0	0	1	Exclude file
Bin	(4)	0	1	0	1	Exclude file
Bin	(4)	1	0	0	1	Exclude file
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

---

Port:

 TXTB_PORT_A_PARITY

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 TXTB_PORT_A_WRITE

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 TXTB_PORT_A_BE

	Element	From	To	Count	Threshold	Excluded due to
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

---

Port:

 TXTB_PORT_B_ADDRESS

	Element	From	To	Count	Threshold	Excluded due to
Bin	(4)	0	1	0	1	Exclude file
Bin	(4)	1	0	0	1	Exclude file
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

Port:

 MR_TST_RDATA_TST_RDATA

	Element	From	To	Count	Threshold
Bin	(31)	0	1	482	1
Bin	(31)	1	0	1142	1
Bin	(30)	0	1	457	1
Bin	(30)	1	0	1117	1
Bin	(29)	0	1	492	1
Bin	(29)	1	0	1152	1
Bin	(28)	0	1	524	1
Bin	(28)	1	0	1184	1
Bin	(27)	0	1	557	1
Bin	(27)	1	0	1217	1
Bin	(26)	0	1	527	1
Bin	(26)	1	0	1187	1
Bin	(25)	0	1	557	1
Bin	(25)	1	0	1217	1
Bin	(24)	0	1	535	1
Bin	(24)	1	0	1195	1
Bin	(23)	0	1	556	1
Bin	(23)	1	0	1216	1
Bin	(22)	0	1	539	1
Bin	(22)	1	0	1199	1
Bin	(21)	0	1	563	1
Bin	(21)	1	0	1223	1
Bin	(20)	0	1	558	1
Bin	(20)	1	0	1218	1
Bin	(19)	0	1	546	1
Bin	(19)	1	0	1206	1
Bin	(18)	0	1	565	1
Bin	(18)	1	0	1225	1
Bin	(17)	0	1	503	1
Bin	(17)	1	0	1163	1
Bin	(16)	0	1	519	1
Bin	(16)	1	0	1179	1
Bin	(15)	0	1	525	1
Bin	(15)	1	0	1185	1
Bin	(14)	0	1	504	1
Bin	(14)	1	0	1164	1
Bin	(13)	0	1	517	1
Bin	(13)	1	0	1177	1
Bin	(12)	0	1	524	1
Bin	(12)	1	0	1184	1
Bin	(11)	0	1	529	1
Bin	(11)	1	0	1189	1
Bin	(10)	0	1	520	1
Bin	(10)	1	0	1180	1
Bin	(9)	0	1	525	1
Bin	(9)	1	0	1185	1
Bin	(8)	0	1	521	1
Bin	(8)	1	0	1181	1
Bin	(7)	0	1	543	1
Bin	(7)	1	0	1203	1
Bin	(6)	0	1	517	1
Bin	(6)	1	0	1177	1
Bin	(5)	0	1	536	1
Bin	(5)	1	0	1196	1
Bin	(4)	0	1	521	1
Bin	(4)	1	0	1181	1
Bin	(3)	0	1	506	1
Bin	(3)	1	0	1166	1
Bin	(2)	0	1	527	1
Bin	(2)	1	0	1187	1
Bin	(1)	0	1	517	1
Bin	(1)	1	0	1177	1
Bin	(0)	0	1	541	1
Bin	(0)	1	0	1201	1

---

Port:

 TXTB_PORT_B_DATA_OUT

	Element	From	To	Count	Threshold
Bin	(31)	0	1	1073	1
Bin	(31)	1	0	1693	1
Bin	(30)	0	1	1106	1
Bin	(30)	1	0	1726	1
Bin	(29)	0	1	1097	1
Bin	(29)	1	0	1717	1
Bin	(28)	0	1	2387	1
Bin	(28)	1	0	2997	1
Bin	(27)	0	1	2595	1
Bin	(27)	1	0	3207	1
Bin	(26)	0	1	2817	1
Bin	(26)	1	0	3420	1
Bin	(25)	0	1	2892	1
Bin	(25)	1	0	3502	1
Bin	(24)	0	1	2593	1
Bin	(24)	1	0	3197	1
Bin	(23)	0	1	3046	1
Bin	(23)	1	0	3656	1
Bin	(22)	0	1	2794	1
Bin	(22)	1	0	3400	1
Bin	(21)	0	1	3264	1
Bin	(21)	1	0	3870	1
Bin	(20)	0	1	2764	1
Bin	(20)	1	0	3372	1
Bin	(19)	0	1	3194	1
Bin	(19)	1	0	3799	1
Bin	(18)	0	1	2936	1
Bin	(18)	1	0	3538	1
Bin	(17)	0	1	2089	1
Bin	(17)	1	0	2705	1
Bin	(16)	0	1	1865	1
Bin	(16)	1	0	2482	1
Bin	(15)	0	1	2056	1
Bin	(15)	1	0	2671	1
Bin	(14)	0	1	2009	1
Bin	(14)	1	0	2624	1
Bin	(13)	0	1	1865	1
Bin	(13)	1	0	2482	1
Bin	(12)	0	1	1731	1
Bin	(12)	1	0	2343	1
Bin	(11)	0	1	2379	1
Bin	(11)	1	0	2994	1
Bin	(10)	0	1	2096	1
Bin	(10)	1	0	2710	1
Bin	(9)	0	1	3023	1
Bin	(9)	1	0	3623	1
Bin	(8)	0	1	2045	1
Bin	(8)	1	0	2660	1
Bin	(7)	0	1	3787	1
Bin	(7)	1	0	4371	1
Bin	(6)	0	1	3070	1
Bin	(6)	1	0	3661	1
Bin	(5)	0	1	2747	1
Bin	(5)	1	0	3349	1
Bin	(4)	0	1	1988	1
Bin	(4)	1	0	2602	1
Bin	(3)	0	1	2955	1
Bin	(3)	1	0	3555	1
Bin	(2)	0	1	3257	1
Bin	(2)	1	0	3858	1
Bin	(1)	0	1	2942	1
Bin	(1)	1	0	3538	1
Bin	(0)	0	1	3403	1
Bin	(0)	1	0	4008	1

---

Port:

 PARITY_MISMATCH

	From	To	Count	Threshold
Bin	0	1	1600	1
Bin	1	0	2260	1

---

Signal:

 TXTB_PORT_A_ADDRESS_I

	Element	From	To	Count	Threshold
Bin	(4)	0	1	248557	1
Bin	(4)	1	0	24652919	1
Bin	(3)	0	1	398793	1
Bin	(3)	1	0	24502651	1
Bin	(2)	0	1	301943	1
Bin	(2)	1	0	24599949	1
Bin	(1)	0	1	24358350	1
Bin	(1)	1	0	544380	1
Bin	(0)	0	1	16107645	1
Bin	(0)	1	0	8796783	1

---

Signal:

 TXTB_PORT_A_WRITE_I

	From	To	Count	Threshold
Bin	0	1	45627	1
Bin	1	0	46437	1

---

Signal:

 TXTB_PORT_A_DATA_I

	Element	From	To	Count	Threshold
Bin	(31)	0	1	25995	1
Bin	(31)	1	0	752819	1
Bin	(30)	0	1	26747	1
Bin	(30)	1	0	752051	1
Bin	(29)	0	1	27229	1
Bin	(29)	1	0	751567	1
Bin	(28)	0	1	40995	1
Bin	(28)	1	0	737851	1
Bin	(27)	0	1	40186	1
Bin	(27)	1	0	738654	1
Bin	(26)	0	1	35684	1
Bin	(26)	1	0	743168	1
Bin	(25)	0	1	46433	1
Bin	(25)	1	0	732427	1
Bin	(24)	0	1	37276	1
Bin	(24)	1	0	741582	1
Bin	(23)	0	1	35254	1
Bin	(23)	1	0	743614	1
Bin	(22)	0	1	42259	1
Bin	(22)	1	0	736605	1
Bin	(21)	0	1	38004	1
Bin	(21)	1	0	740842	1
Bin	(20)	0	1	38198	1
Bin	(20)	1	0	740650	1
Bin	(19)	0	1	65535	1
Bin	(19)	1	0	713321	1
Bin	(18)	0	1	76976	1
Bin	(18)	1	0	701948	1
Bin	(17)	0	1	77243	1
Bin	(17)	1	0	701605	1
Bin	(16)	0	1	136807	1
Bin	(16)	1	0	642040	1
Bin	(15)	0	1	34417	1
Bin	(15)	1	0	744419	1
Bin	(14)	0	1	41206	1
Bin	(14)	1	0	737624	1
Bin	(13)	0	1	37201	1
Bin	(13)	1	0	741621	1
Bin	(12)	0	1	38690	1
Bin	(12)	1	0	740166	1
Bin	(11)	0	1	61286	1
Bin	(11)	1	0	717568	1
Bin	(10)	0	1	61261	1
Bin	(10)	1	0	717585	1
Bin	(9)	0	1	78304	1
Bin	(9)	1	0	700554	1
Bin	(8)	0	1	82322	1
Bin	(8)	1	0	696534	1
Bin	(7)	0	1	70119	1
Bin	(7)	1	0	708739	1
Bin	(6)	0	1	68416	1
Bin	(6)	1	0	710438	1
Bin	(5)	0	1	68682	1
Bin	(5)	1	0	710184	1
Bin	(4)	0	1	83187	1
Bin	(4)	1	0	695667	1
Bin	(3)	0	1	88846	1
Bin	(3)	1	0	689991	1
Bin	(2)	0	1	99553	1
Bin	(2)	1	0	679325	1
Bin	(1)	0	1	158359	1
Bin	(1)	1	0	620513	1
Bin	(0)	0	1	136222	1
Bin	(0)	1	0	642766	1

---

Signal:

 TXTB_PORT_B_ADDRESS_I

	Element	From	To	Count	Threshold
Bin	(4)	0	1	11227	1
Bin	(4)	1	0	11887	1
Bin	(3)	0	1	777	1
Bin	(3)	1	0	1437	1
Bin	(2)	0	1	17408	1
Bin	(2)	1	0	18068	1
Bin	(1)	0	1	13817	1
Bin	(1)	1	0	13817	1
Bin	(0)	0	1	38544	1
Bin	(0)	1	0	39204	1

---

Signal:

 TXTB_PORT_B_DATA_OUT_I

	Element	From	To	Count	Threshold
Bin	(31)	0	1	1073	1
Bin	(31)	1	0	1693	1
Bin	(30)	0	1	1106	1
Bin	(30)	1	0	1726	1
Bin	(29)	0	1	1097	1
Bin	(29)	1	0	1717	1
Bin	(28)	0	1	2387	1
Bin	(28)	1	0	2997	1
Bin	(27)	0	1	2595	1
Bin	(27)	1	0	3207	1
Bin	(26)	0	1	2817	1
Bin	(26)	1	0	3420	1
Bin	(25)	0	1	2892	1
Bin	(25)	1	0	3502	1
Bin	(24)	0	1	2593	1
Bin	(24)	1	0	3197	1
Bin	(23)	0	1	3046	1
Bin	(23)	1	0	3656	1
Bin	(22)	0	1	2794	1
Bin	(22)	1	0	3400	1
Bin	(21)	0	1	3264	1
Bin	(21)	1	0	3870	1
Bin	(20)	0	1	2764	1
Bin	(20)	1	0	3372	1
Bin	(19)	0	1	3194	1
Bin	(19)	1	0	3799	1
Bin	(18)	0	1	2936	1
Bin	(18)	1	0	3538	1
Bin	(17)	0	1	2089	1
Bin	(17)	1	0	2705	1
Bin	(16)	0	1	1865	1
Bin	(16)	1	0	2482	1
Bin	(15)	0	1	2056	1
Bin	(15)	1	0	2671	1
Bin	(14)	0	1	2009	1
Bin	(14)	1	0	2624	1
Bin	(13)	0	1	1865	1
Bin	(13)	1	0	2482	1
Bin	(12)	0	1	1731	1
Bin	(12)	1	0	2343	1
Bin	(11)	0	1	2379	1
Bin	(11)	1	0	2994	1
Bin	(10)	0	1	2096	1
Bin	(10)	1	0	2710	1
Bin	(9)	0	1	3023	1
Bin	(9)	1	0	3623	1
Bin	(8)	0	1	2045	1
Bin	(8)	1	0	2660	1
Bin	(7)	0	1	3787	1
Bin	(7)	1	0	4371	1
Bin	(6)	0	1	3070	1
Bin	(6)	1	0	3661	1
Bin	(5)	0	1	2747	1
Bin	(5)	1	0	3349	1
Bin	(4)	0	1	1988	1
Bin	(4)	1	0	2602	1
Bin	(3)	0	1	2955	1
Bin	(3)	1	0	3555	1
Bin	(2)	0	1	3257	1
Bin	(2)	1	0	3858	1
Bin	(1)	0	1	2942	1
Bin	(1)	1	0	3538	1
Bin	(0)	0	1	3403	1
Bin	(0)	1	0	4008	1

---

Signal:

 TST_ENA

	From	To	Count	Threshold
Bin	0	1	303	1
Bin	1	0	963	1

---

Signal:

 PARITY_WORD

	Element	From	To	Count	Threshold
Bin	(20)	0	1	88	1
Bin	(20)	1	0	2631	1
Bin	(19)	0	1	4	1
Bin	(19)	1	0	2715	1
Bin	(18)	0	1	8	1
Bin	(18)	1	0	2711	1
Bin	(17)	0	1	12	1
Bin	(17)	1	0	2707	1
Bin	(16)	0	1	16	1
Bin	(16)	1	0	2703	1
Bin	(15)	0	1	20	1
Bin	(15)	1	0	2699	1
Bin	(14)	0	1	32	1
Bin	(14)	1	0	2687	1
Bin	(13)	0	1	40	1
Bin	(13)	1	0	2679	1
Bin	(12)	0	1	43	1
Bin	(12)	1	0	2676	1
Bin	(11)	0	1	55	1
Bin	(11)	1	0	2664	1
Bin	(10)	0	1	48	1
Bin	(10)	1	0	2671	1
Bin	(9)	0	1	110	1
Bin	(9)	1	0	2609	1
Bin	(8)	0	1	98	1
Bin	(8)	1	0	2621	1
Bin	(7)	0	1	150	1
Bin	(7)	1	0	2569	1
Bin	(6)	0	1	191	1
Bin	(6)	1	0	2528	1
Bin	(5)	0	1	277	1
Bin	(5)	1	0	2442	1
Bin	(4)	0	1	639	1
Bin	(4)	1	0	2080	1
Bin	(3)	0	1	1148	1
Bin	(3)	1	0	1571	1
Bin	(2)	0	1	1445	1
Bin	(2)	1	0	1274	1
Bin	(1)	0	1	932	1
Bin	(1)	1	0	1787	1
Bin	(0)	0	1	880	1
Bin	(0)	1	0	1839	1

---

Signal:

 PARITY_READ_REAL

	From	To	Count	Threshold
Bin	0	1	4702	1
Bin	1	0	4119	1

---

Signal:

 PARITY_READ_EXP

	From	To	Count	Threshold
Bin	0	1	4487	1
Bin	1	0	5147	1

"and" expression on lines 277 to 278:

 (mr_tst_control_tmaena = '1') and (mr_tst_dest_tst_mtgt = std_logic_vector(to_unsigned(G_ID + 2, 4))) 
  <-----------LHS----------->       <------------------------------RHS------------------------------>  

	LHS	RHS	Count	Threshold	Exclude Command
Bin	False	True	0	1	Copy to Clipboard

"and" expression on lines 277 to 278:

 (mr_tst_control_tmaena = '1') and (mr_tst_dest_tst_mtgt = std_logic_vector(to_unsigned(G_ID + 2, 4))) 
  <-----------LHS----------->       <------------------------------RHS------------------------------>  

	LHS	RHS	Count	Threshold
Bin	True	False	1448	1
Bin	True	True	303	1

---

"=" expression on line 277:

 mr_tst_control_tmaena = '1' 

	Evaluated to	Count	Threshold
Bin	False	2875	1
Bin	True	1751	1

---

"=" expression on line 283:

 tst_ena = '0' 

	Evaluated to	Count	Threshold
Bin	False	54696	1
Bin	True	49886107	1

---

"=" expression on line 287:

 tst_ena = '0' 

	Evaluated to	Count	Threshold
Bin	False	4130	1
Bin	True	184340	1

---

"=" expression on line 291:

 tst_ena = '0' 

	Evaluated to	Count	Threshold
Bin	False	34523	1
Bin	True	1564285	1

---

"=" expression on line 296:

 tst_ena = '0' 

	Evaluated to	Count	Threshold
Bin	False	3874	1
Bin	True	179417	1

---

"=" expression on line 300:

 tst_ena = '1' 

	Evaluated to	Count	Threshold
Bin	False	17340	1
Bin	True	2309	1