NVC code coverage report

Hierarchy

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.I_DUT.I_MR_TOP.G_MT_5_TXT_BUFFS

File:  /__w/CTU-CAN-FD/CTU-CAN-FD/src/memory_registers/mr_top.vhd


Current Instance Statement Branch Toggle Expression FSM state Functional Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.I_DUT.I_MR_TOP.G_MT_5_TXT_BUFFS 100.0 % (4/4) 100.0 % (2/2) N.A. 100.0 % (5/5) N.A. N.A. 100.0 % (11/11)

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.


Statement Branch Toggle Expression FSM state Functional

Uncovered statements:

Excluded statements:

Covered statements:

Signal assignment statement on line 650:

650:        mr_tx_priority(5)       <= mr_ctrl_out_i.tx_priority_txt6p
Count: 415
Threshold: 1

If statement on lines 651 to 653:

651:        mr_tx_command_txbi(5)   <= mr_ctrl_out_i.tx_command_txb6 when (mr_ctrl_out_i.mode_txbbm = '0') 
652:                                                                 else 
653:                                   mr_ctrl_out_i.tx_command_txb5 or mr_ctrl_out_i.tx_command_txb6; 

Count: 564
Threshold: 1

Signal assignment statement on line 651:

651:        mr_tx_command_txbi(5)   <= mr_ctrl_out_i.tx_command_txb6 when (mr_ctrl_out_i.mode_txbbm = '0') 
Count: 363
Threshold: 1

Signal assignment statement on line 653:

653:                                   mr_ctrl_out_i.tx_command_txb5 or mr_ctrl_out_i.tx_command_txb6
Count: 201
Threshold: 1

Uncovered branches:

Excluded branches:

Covered branches:

"if" / "when" / "else" condition on line 651:

651:        mr_tx_command_txbi(5)   <= mr_ctrl_out_i.tx_command_txb6 when (mr_ctrl_out_i.mode_txbbm = '0'
Evaluated toCountThreshold
BinTrue3631
BinFalse2011

Uncovered toggles:

Excluded toggles:

Covered toggles:

Uncovered expressions:

Excluded expressions:

Covered expressions:

"=" expression on line 651:

 mr_ctrl_out_i.mode_txbbm = '0' 
Evaluated toCountThreshold
BinFalse2011
BinTrue3631

"or" expression on line 653:

 mr_ctrl_out_i.tx_command_txb5 or mr_ctrl_out_i.tx_command_txb6 
 <------------LHS------------>    <------------RHS------------> 

LHSRHSCountThreshold
Bin'0''0'201
Bin'0''1'21
Bin'1''0'141

Uncovered FSM states:

Excluded FSM states:

Covered FSM states:

Uncovered functional coverage:

Excluded functional coverage:

Covered functional coverage: