| Current Instance | Statement | Branch | Toggle | Expression | FSM state | Functional | Average |
|---|---|---|---|---|---|---|---|
| CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.I_DUT.G_TXT_BUF_COMP(6).G_TXT_BUF_EVEN.I_TXTB_EVEN_TOP.I_CLK_GATE_TXTB_RAM_COMP.G_TECH_ASIC | 100.0 % (3/3) | 100.0 % (2/2) | N.A. | 100.0 % (8/8) | N.A. | N.A. | 100.0 % (13/13) |
| Statement | Branch | Toggle | Expression | FSM state | Functional |
|---|
113: if (clk_in = '0') then
114: clk_en_q <= clk_en or scan_mode;
115: end if; 114: clk_en_q <= clk_en or scan_mode; 119: clk_out <= clk_in AND clk_en_q; 113: if (clk_in = '0') then | Evaluated to | Count | Threshold | |
|---|---|---|---|
| Bin | True | 17724891 | 1 |
| Bin | False | 17742575 | 1 |
clk_in = '0' | Evaluated to | Count | Threshold | |
|---|---|---|---|
| Bin | False | 17742575 | 1 |
| Bin | True | 17724891 | 1 |
clk_en or scan_mode
<LHS-> <--RHS--> | LHS | RHS | Count | Threshold | |
|---|---|---|---|---|
| Bin | '0' | '0' | 17388254 | 1 |
| Bin | '0' | '1' | 10 | 1 |
| Bin | '1' | '0' | 336627 | 1 |
clk_in AND clk_en_q
<LHS-> <-RHS--> | LHS | RHS | Count | Threshold | |
|---|---|---|---|---|
| Bin | '0' | '1' | 356744 | 1 |
| Bin | '1' | '0' | 17376824 | 1 |
| Bin | '1' | '1' | 336637 | 1 |