NVC code coverage report

Signal assignment statement on line 208:

208:    txtb_port_b_data_out <= txtb_port_b_data_out_i; 
Count: 15958
Threshold: 1

---

If statement on lines 277 to 280:

277:    tst_ena <= '1' when (mr_tst_control_tmaena = '1') and 
278:                        (mr_tst_dest_tst_mtgt = std_logic_vector(to_unsigned(G_ID + 2, 4))) 
279:                   else 
280:               '0'; 
Count: 4626
Threshold: 1

---

Signal assignment statement on line 277:

277:    tst_ena <= '1' when (mr_tst_control_tmaena = '1') and 
Count: 236
Threshold: 1

---

Signal assignment statement on line 280:

280:               '0'; 
Count: 4390
Threshold: 1

---

If statement on lines 283 to 285:

283:    txtb_port_a_address_i <= txtb_port_a_address when (tst_ena = '0') 
284:                                                 else 
285:                             mr_tst_dest_tst_addr(4 downto 0); 
Count: 49940669
Threshold: 1

---

Signal assignment statement on line 283:

283:    txtb_port_a_address_i <= txtb_port_a_address when (tst_ena = '0') 
Count: 49913723
Threshold: 1

---

Signal assignment statement on line 285:

285:                             mr_tst_dest_tst_addr(4 downto 0); 
Count: 26946
Threshold: 1

---

If statement on lines 287 to 289:

287:    txtb_port_a_write_i <= txtb_port_a_write when (tst_ena = '0') 
288:                                             else 
289:                           mr_tst_control_twrstb; 
Count: 189234
Threshold: 1

---

Signal assignment statement on line 287:

287:    txtb_port_a_write_i <= txtb_port_a_write when (tst_ena = '0') 
Count: 185431
Threshold: 1

---

Signal assignment statement on line 289:

289:                           mr_tst_control_twrstb; 
Count: 3803
Threshold: 1

---

If statement on lines 291 to 293:

291:    txtb_port_a_data_i <= txtb_port_a_data_in when (tst_ena = '0') 
292:                                              else 
293:                          mr_tst_wdata_tst_wdata; 
Count: 1598674
Threshold: 1

---

Signal assignment statement on line 291:

291:    txtb_port_a_data_i <= txtb_port_a_data_in when (tst_ena = '0') 
Count: 1581988
Threshold: 1

---

Signal assignment statement on line 293:

293:                          mr_tst_wdata_tst_wdata; 
Count: 16686
Threshold: 1

---

If statement on lines 296 to 298:

296:    txtb_port_b_address_i <= txtb_port_b_address when (tst_ena = '0') 
297:                                                 else 
298:                             mr_tst_dest_tst_addr(4 downto 0); 
Count: 183157
Threshold: 1

---

Signal assignment statement on line 296:

296:    txtb_port_b_address_i <= txtb_port_b_address when (tst_ena = '0') 
Count: 179388
Threshold: 1

---

Signal assignment statement on line 298:

298:                             mr_tst_dest_tst_addr(4 downto 0); 
Count: 3769
Threshold: 1

---

If statement on lines 300 to 302:

300:    mr_tst_rdata_tst_rdata <= txtb_port_b_data_out_i when (tst_ena = '1') 
301:                                                     else 
302:                                     (others => '0'); 
Count: 17090
Threshold: 1

---

Signal assignment statement on line 300:

300:    mr_tst_rdata_tst_rdata <= txtb_port_b_data_out_i when (tst_ena = '1') 
Count: 2111
Threshold: 1

---

Signal assignment statement on line 302:

302:                                     (others => '0'); 
Count: 14979
Threshold: 1

"if" / "when" / "else" condition on lines 277 to 278:

277:    tst_ena <= '1' when (mr_tst_control_tmaena = '1') and 
278:                        (mr_tst_dest_tst_mtgt = std_logic_vector(to_unsigned(G_ID + 2, 4))) 

	Evaluated to	Count	Threshold
Bin	True	236	1
Bin	False	4390	1

---

"if" / "when" / "else" condition on line 283:

283:    txtb_port_a_address_i <= txtb_port_a_address when (tst_ena = '0') 

	Evaluated to	Count	Threshold
Bin	True	49913723	1
Bin	False	26946	1

---

"if" / "when" / "else" condition on line 287:

287:    txtb_port_a_write_i <= txtb_port_a_write when (tst_ena = '0') 

	Evaluated to	Count	Threshold
Bin	True	185431	1
Bin	False	3803	1

---

"if" / "when" / "else" condition on line 291:

291:    txtb_port_a_data_i <= txtb_port_a_data_in when (tst_ena = '0') 

	Evaluated to	Count	Threshold
Bin	True	1581988	1
Bin	False	16686	1

---

"if" / "when" / "else" condition on line 296:

296:    txtb_port_b_address_i <= txtb_port_b_address when (tst_ena = '0') 

	Evaluated to	Count	Threshold
Bin	True	179388	1
Bin	False	3769	1

---

"if" / "when" / "else" condition on line 300:

300:    mr_tst_rdata_tst_rdata <= txtb_port_b_data_out_i when (tst_ena = '1') 

	Evaluated to	Count	Threshold
Bin	True	2111	1
Bin	False	14979	1

Port:

 CLK_SYS

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 RST_N

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 MR_SETTINGS_PCHKE

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 MR_TST_CONTROL_TMAENA

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 MR_TST_CONTROL_TWRSTB

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 MR_TST_DEST_TST_ADDR

	Element	From	To	Count	Threshold	Excluded due to
Bin	(4)	0	1	0	1	Exclude file
Bin	(4)	1	0	0	1	Exclude file
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

---

Port:

 MR_TST_DEST_TST_MTGT

	Element	From	To	Count	Threshold	Excluded due to
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

---

Port:

 MR_TST_WDATA_TST_WDATA

	Element	From	To	Count	Threshold	Excluded due to
Bin	(31)	0	1	0	1	Exclude file
Bin	(31)	1	0	0	1	Exclude file
Bin	(30)	0	1	0	1	Exclude file
Bin	(30)	1	0	0	1	Exclude file
Bin	(29)	0	1	0	1	Exclude file
Bin	(29)	1	0	0	1	Exclude file
Bin	(28)	0	1	0	1	Exclude file
Bin	(28)	1	0	0	1	Exclude file
Bin	(27)	0	1	0	1	Exclude file
Bin	(27)	1	0	0	1	Exclude file
Bin	(26)	0	1	0	1	Exclude file
Bin	(26)	1	0	0	1	Exclude file
Bin	(25)	0	1	0	1	Exclude file
Bin	(25)	1	0	0	1	Exclude file
Bin	(24)	0	1	0	1	Exclude file
Bin	(24)	1	0	0	1	Exclude file
Bin	(23)	0	1	0	1	Exclude file
Bin	(23)	1	0	0	1	Exclude file
Bin	(22)	0	1	0	1	Exclude file
Bin	(22)	1	0	0	1	Exclude file
Bin	(21)	0	1	0	1	Exclude file
Bin	(21)	1	0	0	1	Exclude file
Bin	(20)	0	1	0	1	Exclude file
Bin	(20)	1	0	0	1	Exclude file
Bin	(19)	0	1	0	1	Exclude file
Bin	(19)	1	0	0	1	Exclude file
Bin	(18)	0	1	0	1	Exclude file
Bin	(18)	1	0	0	1	Exclude file
Bin	(17)	0	1	0	1	Exclude file
Bin	(17)	1	0	0	1	Exclude file
Bin	(16)	0	1	0	1	Exclude file
Bin	(16)	1	0	0	1	Exclude file
Bin	(15)	0	1	0	1	Exclude file
Bin	(15)	1	0	0	1	Exclude file
Bin	(14)	0	1	0	1	Exclude file
Bin	(14)	1	0	0	1	Exclude file
Bin	(13)	0	1	0	1	Exclude file
Bin	(13)	1	0	0	1	Exclude file
Bin	(12)	0	1	0	1	Exclude file
Bin	(12)	1	0	0	1	Exclude file
Bin	(11)	0	1	0	1	Exclude file
Bin	(11)	1	0	0	1	Exclude file
Bin	(10)	0	1	0	1	Exclude file
Bin	(10)	1	0	0	1	Exclude file
Bin	(9)	0	1	0	1	Exclude file
Bin	(9)	1	0	0	1	Exclude file
Bin	(8)	0	1	0	1	Exclude file
Bin	(8)	1	0	0	1	Exclude file
Bin	(7)	0	1	0	1	Exclude file
Bin	(7)	1	0	0	1	Exclude file
Bin	(6)	0	1	0	1	Exclude file
Bin	(6)	1	0	0	1	Exclude file
Bin	(5)	0	1	0	1	Exclude file
Bin	(5)	1	0	0	1	Exclude file
Bin	(4)	0	1	0	1	Exclude file
Bin	(4)	1	0	0	1	Exclude file
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

---

Port:

 TXTB_PORT_A_ADDRESS

	Element	From	To	Count	Threshold	Excluded due to
Bin	(4)	0	1	0	1	Exclude file
Bin	(4)	1	0	0	1	Exclude file
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

---

Port:

 TXTB_PORT_A_DATA_IN

	Element	From	To	Count	Threshold	Excluded due to
Bin	(31)	0	1	0	1	Exclude file
Bin	(31)	1	0	0	1	Exclude file
Bin	(30)	0	1	0	1	Exclude file
Bin	(30)	1	0	0	1	Exclude file
Bin	(29)	0	1	0	1	Exclude file
Bin	(29)	1	0	0	1	Exclude file
Bin	(28)	0	1	0	1	Exclude file
Bin	(28)	1	0	0	1	Exclude file
Bin	(27)	0	1	0	1	Exclude file
Bin	(27)	1	0	0	1	Exclude file
Bin	(26)	0	1	0	1	Exclude file
Bin	(26)	1	0	0	1	Exclude file
Bin	(25)	0	1	0	1	Exclude file
Bin	(25)	1	0	0	1	Exclude file
Bin	(24)	0	1	0	1	Exclude file
Bin	(24)	1	0	0	1	Exclude file
Bin	(23)	0	1	0	1	Exclude file
Bin	(23)	1	0	0	1	Exclude file
Bin	(22)	0	1	0	1	Exclude file
Bin	(22)	1	0	0	1	Exclude file
Bin	(21)	0	1	0	1	Exclude file
Bin	(21)	1	0	0	1	Exclude file
Bin	(20)	0	1	0	1	Exclude file
Bin	(20)	1	0	0	1	Exclude file
Bin	(19)	0	1	0	1	Exclude file
Bin	(19)	1	0	0	1	Exclude file
Bin	(18)	0	1	0	1	Exclude file
Bin	(18)	1	0	0	1	Exclude file
Bin	(17)	0	1	0	1	Exclude file
Bin	(17)	1	0	0	1	Exclude file
Bin	(16)	0	1	0	1	Exclude file
Bin	(16)	1	0	0	1	Exclude file
Bin	(15)	0	1	0	1	Exclude file
Bin	(15)	1	0	0	1	Exclude file
Bin	(14)	0	1	0	1	Exclude file
Bin	(14)	1	0	0	1	Exclude file
Bin	(13)	0	1	0	1	Exclude file
Bin	(13)	1	0	0	1	Exclude file
Bin	(12)	0	1	0	1	Exclude file
Bin	(12)	1	0	0	1	Exclude file
Bin	(11)	0	1	0	1	Exclude file
Bin	(11)	1	0	0	1	Exclude file
Bin	(10)	0	1	0	1	Exclude file
Bin	(10)	1	0	0	1	Exclude file
Bin	(9)	0	1	0	1	Exclude file
Bin	(9)	1	0	0	1	Exclude file
Bin	(8)	0	1	0	1	Exclude file
Bin	(8)	1	0	0	1	Exclude file
Bin	(7)	0	1	0	1	Exclude file
Bin	(7)	1	0	0	1	Exclude file
Bin	(6)	0	1	0	1	Exclude file
Bin	(6)	1	0	0	1	Exclude file
Bin	(5)	0	1	0	1	Exclude file
Bin	(5)	1	0	0	1	Exclude file
Bin	(4)	0	1	0	1	Exclude file
Bin	(4)	1	0	0	1	Exclude file
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

---

Port:

 TXTB_PORT_A_PARITY

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 TXTB_PORT_A_WRITE

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 TXTB_PORT_A_BE

	Element	From	To	Count	Threshold	Excluded due to
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

---

Port:

 TXTB_PORT_B_ADDRESS

	Element	From	To	Count	Threshold	Excluded due to
Bin	(4)	0	1	0	1	Exclude file
Bin	(4)	1	0	0	1	Exclude file
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

Port:

 MR_TST_RDATA_TST_RDATA

	Element	From	To	Count	Threshold
Bin	(31)	0	1	470	1
Bin	(31)	1	0	1130	1
Bin	(30)	0	1	463	1
Bin	(30)	1	0	1123	1
Bin	(29)	0	1	468	1
Bin	(29)	1	0	1128	1
Bin	(28)	0	1	522	1
Bin	(28)	1	0	1182	1
Bin	(27)	0	1	484	1
Bin	(27)	1	0	1144	1
Bin	(26)	0	1	524	1
Bin	(26)	1	0	1184	1
Bin	(25)	0	1	504	1
Bin	(25)	1	0	1164	1
Bin	(24)	0	1	511	1
Bin	(24)	1	0	1171	1
Bin	(23)	0	1	506	1
Bin	(23)	1	0	1166	1
Bin	(22)	0	1	498	1
Bin	(22)	1	0	1158	1
Bin	(21)	0	1	507	1
Bin	(21)	1	0	1167	1
Bin	(20)	0	1	494	1
Bin	(20)	1	0	1154	1
Bin	(19)	0	1	521	1
Bin	(19)	1	0	1181	1
Bin	(18)	0	1	517	1
Bin	(18)	1	0	1177	1
Bin	(17)	0	1	491	1
Bin	(17)	1	0	1151	1
Bin	(16)	0	1	495	1
Bin	(16)	1	0	1155	1
Bin	(15)	0	1	504	1
Bin	(15)	1	0	1164	1
Bin	(14)	0	1	496	1
Bin	(14)	1	0	1156	1
Bin	(13)	0	1	495	1
Bin	(13)	1	0	1155	1
Bin	(12)	0	1	503	1
Bin	(12)	1	0	1163	1
Bin	(11)	0	1	492	1
Bin	(11)	1	0	1152	1
Bin	(10)	0	1	490	1
Bin	(10)	1	0	1150	1
Bin	(9)	0	1	496	1
Bin	(9)	1	0	1156	1
Bin	(8)	0	1	486	1
Bin	(8)	1	0	1146	1
Bin	(7)	0	1	519	1
Bin	(7)	1	0	1179	1
Bin	(6)	0	1	498	1
Bin	(6)	1	0	1158	1
Bin	(5)	0	1	514	1
Bin	(5)	1	0	1174	1
Bin	(4)	0	1	497	1
Bin	(4)	1	0	1157	1
Bin	(3)	0	1	492	1
Bin	(3)	1	0	1152	1
Bin	(2)	0	1	502	1
Bin	(2)	1	0	1162	1
Bin	(1)	0	1	510	1
Bin	(1)	1	0	1170	1
Bin	(0)	0	1	503	1
Bin	(0)	1	0	1163	1

---

Port:

 TXTB_PORT_B_DATA_OUT

	Element	From	To	Count	Threshold
Bin	(31)	0	1	1072	1
Bin	(31)	1	0	1692	1
Bin	(30)	0	1	1058	1
Bin	(30)	1	0	1678	1
Bin	(29)	0	1	1077	1
Bin	(29)	1	0	1697	1
Bin	(28)	0	1	2372	1
Bin	(28)	1	0	2982	1
Bin	(27)	0	1	2186	1
Bin	(27)	1	0	2795	1
Bin	(26)	0	1	2422	1
Bin	(26)	1	0	3033	1
Bin	(25)	0	1	2336	1
Bin	(25)	1	0	2946	1
Bin	(24)	0	1	2230	1
Bin	(24)	1	0	2834	1
Bin	(23)	0	1	2554	1
Bin	(23)	1	0	3165	1
Bin	(22)	0	1	2351	1
Bin	(22)	1	0	2955	1
Bin	(21)	0	1	2638	1
Bin	(21)	1	0	3241	1
Bin	(20)	0	1	2094	1
Bin	(20)	1	0	2697	1
Bin	(19)	0	1	2536	1
Bin	(19)	1	0	3136	1
Bin	(18)	0	1	2733	1
Bin	(18)	1	0	3337	1
Bin	(17)	0	1	1853	1
Bin	(17)	1	0	2466	1
Bin	(16)	0	1	1639	1
Bin	(16)	1	0	2252	1
Bin	(15)	0	1	1932	1
Bin	(15)	1	0	2542	1
Bin	(14)	0	1	2041	1
Bin	(14)	1	0	2651	1
Bin	(13)	0	1	2017	1
Bin	(13)	1	0	2631	1
Bin	(12)	0	1	1894	1
Bin	(12)	1	0	2505	1
Bin	(11)	0	1	2157	1
Bin	(11)	1	0	2768	1
Bin	(10)	0	1	2057	1
Bin	(10)	1	0	2668	1
Bin	(9)	0	1	3108	1
Bin	(9)	1	0	3706	1
Bin	(8)	0	1	2117	1
Bin	(8)	1	0	2734	1
Bin	(7)	0	1	3436	1
Bin	(7)	1	0	4013	1
Bin	(6)	0	1	2743	1
Bin	(6)	1	0	3331	1
Bin	(5)	0	1	2843	1
Bin	(5)	1	0	3449	1
Bin	(4)	0	1	1814	1
Bin	(4)	1	0	2424	1
Bin	(3)	0	1	2911	1
Bin	(3)	1	0	3509	1
Bin	(2)	0	1	2685	1
Bin	(2)	1	0	3280	1
Bin	(1)	0	1	2812	1
Bin	(1)	1	0	3400	1
Bin	(0)	0	1	3267	1
Bin	(0)	1	0	3863	1

---

Port:

 PARITY_MISMATCH

	From	To	Count	Threshold
Bin	0	1	1290	1
Bin	1	0	1950	1

---

Signal:

 TXTB_PORT_A_ADDRESS_I

	Element	From	To	Count	Threshold
Bin	(4)	0	1	248557	1
Bin	(4)	1	0	24666743	1
Bin	(3)	0	1	398792	1
Bin	(3)	1	0	24516474	1
Bin	(2)	0	1	301924	1
Bin	(2)	1	0	24613754	1
Bin	(1)	0	1	24364452	1
Bin	(1)	1	0	552022	1
Bin	(0)	0	1	16118771	1
Bin	(0)	1	0	8799384	1

---

Signal:

 TXTB_PORT_A_WRITE_I

	From	To	Count	Threshold
Bin	0	1	46020	1
Bin	1	0	46784	1

---

Signal:

 TXTB_PORT_A_DATA_I

	Element	From	To	Count	Threshold
Bin	(31)	0	1	26315	1
Bin	(31)	1	0	761342	1
Bin	(30)	0	1	27066	1
Bin	(30)	1	0	760577	1
Bin	(29)	0	1	27546	1
Bin	(29)	1	0	760103	1
Bin	(28)	0	1	41308	1
Bin	(28)	1	0	746377	1
Bin	(27)	0	1	40504	1
Bin	(27)	1	0	747133	1
Bin	(26)	0	1	35963	1
Bin	(26)	1	0	751690	1
Bin	(25)	0	1	46765	1
Bin	(25)	1	0	740890	1
Bin	(24)	0	1	37568	1
Bin	(24)	1	0	750095	1
Bin	(23)	0	1	35550	1
Bin	(23)	1	0	752107	1
Bin	(22)	0	1	42551	1
Bin	(22)	1	0	745112	1
Bin	(21)	0	1	38301	1
Bin	(21)	1	0	749366	1
Bin	(20)	0	1	38505	1
Bin	(20)	1	0	749146	1
Bin	(19)	0	1	67025	1
Bin	(19)	1	0	720652	1
Bin	(18)	0	1	81006	1
Bin	(18)	1	0	706692	1
Bin	(17)	0	1	79473	1
Bin	(17)	1	0	708201	1
Bin	(16)	0	1	138341	1
Bin	(16)	1	0	649343	1
Bin	(15)	0	1	34703	1
Bin	(15)	1	0	752954	1
Bin	(14)	0	1	41520	1
Bin	(14)	1	0	746147	1
Bin	(13)	0	1	37519	1
Bin	(13)	1	0	750142	1
Bin	(12)	0	1	38985	1
Bin	(12)	1	0	748682	1
Bin	(11)	0	1	61596	1
Bin	(11)	1	0	726057	1
Bin	(10)	0	1	61560	1
Bin	(10)	1	0	726097	1
Bin	(9)	0	1	78650	1
Bin	(9)	1	0	709023	1
Bin	(8)	0	1	82631	1
Bin	(8)	1	0	705028	1
Bin	(7)	0	1	70447	1
Bin	(7)	1	0	717250	1
Bin	(6)	0	1	68708	1
Bin	(6)	1	0	718963	1
Bin	(5)	0	1	68979	1
Bin	(5)	1	0	718690	1
Bin	(4)	0	1	84748	1
Bin	(4)	1	0	702925	1
Bin	(3)	0	1	91561	1
Bin	(3)	1	0	696119	1
Bin	(2)	0	1	102313	1
Bin	(2)	1	0	685366	1
Bin	(1)	0	1	162993	1
Bin	(1)	1	0	624697	1
Bin	(0)	0	1	140284	1
Bin	(0)	1	0	647464	1

---

Signal:

 TXTB_PORT_B_ADDRESS_I

	Element	From	To	Count	Threshold
Bin	(4)	0	1	11227	1
Bin	(4)	1	0	11887	1
Bin	(3)	0	1	776	1
Bin	(3)	1	0	1436	1
Bin	(2)	0	1	17389	1
Bin	(2)	1	0	18049	1
Bin	(1)	0	1	13775	1
Bin	(1)	1	0	13775	1
Bin	(0)	0	1	38495	1
Bin	(0)	1	0	39155	1

---

Signal:

 TXTB_PORT_B_DATA_OUT_I

	Element	From	To	Count	Threshold
Bin	(31)	0	1	1072	1
Bin	(31)	1	0	1692	1
Bin	(30)	0	1	1058	1
Bin	(30)	1	0	1678	1
Bin	(29)	0	1	1077	1
Bin	(29)	1	0	1697	1
Bin	(28)	0	1	2372	1
Bin	(28)	1	0	2982	1
Bin	(27)	0	1	2186	1
Bin	(27)	1	0	2795	1
Bin	(26)	0	1	2422	1
Bin	(26)	1	0	3033	1
Bin	(25)	0	1	2336	1
Bin	(25)	1	0	2946	1
Bin	(24)	0	1	2230	1
Bin	(24)	1	0	2834	1
Bin	(23)	0	1	2554	1
Bin	(23)	1	0	3165	1
Bin	(22)	0	1	2351	1
Bin	(22)	1	0	2955	1
Bin	(21)	0	1	2638	1
Bin	(21)	1	0	3241	1
Bin	(20)	0	1	2094	1
Bin	(20)	1	0	2697	1
Bin	(19)	0	1	2536	1
Bin	(19)	1	0	3136	1
Bin	(18)	0	1	2733	1
Bin	(18)	1	0	3337	1
Bin	(17)	0	1	1853	1
Bin	(17)	1	0	2466	1
Bin	(16)	0	1	1639	1
Bin	(16)	1	0	2252	1
Bin	(15)	0	1	1932	1
Bin	(15)	1	0	2542	1
Bin	(14)	0	1	2041	1
Bin	(14)	1	0	2651	1
Bin	(13)	0	1	2017	1
Bin	(13)	1	0	2631	1
Bin	(12)	0	1	1894	1
Bin	(12)	1	0	2505	1
Bin	(11)	0	1	2157	1
Bin	(11)	1	0	2768	1
Bin	(10)	0	1	2057	1
Bin	(10)	1	0	2668	1
Bin	(9)	0	1	3108	1
Bin	(9)	1	0	3706	1
Bin	(8)	0	1	2117	1
Bin	(8)	1	0	2734	1
Bin	(7)	0	1	3436	1
Bin	(7)	1	0	4013	1
Bin	(6)	0	1	2743	1
Bin	(6)	1	0	3331	1
Bin	(5)	0	1	2843	1
Bin	(5)	1	0	3449	1
Bin	(4)	0	1	1814	1
Bin	(4)	1	0	2424	1
Bin	(3)	0	1	2911	1
Bin	(3)	1	0	3509	1
Bin	(2)	0	1	2685	1
Bin	(2)	1	0	3280	1
Bin	(1)	0	1	2812	1
Bin	(1)	1	0	3400	1
Bin	(0)	0	1	3267	1
Bin	(0)	1	0	3863	1

---

Signal:

 TST_ENA

	From	To	Count	Threshold
Bin	0	1	236	1
Bin	1	0	896	1

---

Signal:

 PARITY_WORD

	Element	From	To	Count	Threshold
Bin	(20)	0	1	96	1
Bin	(20)	1	0	3002	1
Bin	(19)	0	1	4	1
Bin	(19)	1	0	3094	1
Bin	(18)	0	1	9	1
Bin	(18)	1	0	3089	1
Bin	(17)	0	1	12	1
Bin	(17)	1	0	3086	1
Bin	(16)	0	1	18	1
Bin	(16)	1	0	3080	1
Bin	(15)	0	1	20	1
Bin	(15)	1	0	3078	1
Bin	(14)	0	1	24	1
Bin	(14)	1	0	3074	1
Bin	(13)	0	1	31	1
Bin	(13)	1	0	3067	1
Bin	(12)	0	1	33	1
Bin	(12)	1	0	3065	1
Bin	(11)	0	1	60	1
Bin	(11)	1	0	3038	1
Bin	(10)	0	1	57	1
Bin	(10)	1	0	3041	1
Bin	(9)	0	1	94	1
Bin	(9)	1	0	3004	1
Bin	(8)	0	1	96	1
Bin	(8)	1	0	3002	1
Bin	(7)	0	1	137	1
Bin	(7)	1	0	2961	1
Bin	(6)	0	1	170	1
Bin	(6)	1	0	2928	1
Bin	(5)	0	1	292	1
Bin	(5)	1	0	2806	1
Bin	(4)	0	1	744	1
Bin	(4)	1	0	2354	1
Bin	(3)	0	1	1297	1
Bin	(3)	1	0	1801	1
Bin	(2)	0	1	1676	1
Bin	(2)	1	0	1422	1
Bin	(1)	0	1	1103	1
Bin	(1)	1	0	1995	1
Bin	(0)	0	1	1064	1
Bin	(0)	1	0	2034	1

---

Signal:

 PARITY_READ_REAL

	From	To	Count	Threshold
Bin	0	1	3540	1
Bin	1	0	2961	1

---

Signal:

 PARITY_READ_EXP

	From	To	Count	Threshold
Bin	0	1	3855	1
Bin	1	0	4515	1

"and" expression on lines 277 to 278:

 (mr_tst_control_tmaena = '1') and (mr_tst_dest_tst_mtgt = std_logic_vector(to_unsigned(G_ID + 2, 4))) 
  <-----------LHS----------->       <------------------------------RHS------------------------------>  

	LHS	RHS	Count	Threshold	Exclude Command
Bin	False	True	0	1	Copy to Clipboard

"and" expression on lines 277 to 278:

 (mr_tst_control_tmaena = '1') and (mr_tst_dest_tst_mtgt = std_logic_vector(to_unsigned(G_ID + 2, 4))) 
  <-----------LHS----------->       <------------------------------RHS------------------------------>  

	LHS	RHS	Count	Threshold
Bin	True	False	1515	1
Bin	True	True	236	1

---

"=" expression on line 277:

 mr_tst_control_tmaena = '1' 

	Evaluated to	Count	Threshold
Bin	False	2875	1
Bin	True	1751	1

---

"=" expression on line 283:

 tst_ena = '0' 

	Evaluated to	Count	Threshold
Bin	False	26946	1
Bin	True	49913723	1

---

"=" expression on line 287:

 tst_ena = '0' 

	Evaluated to	Count	Threshold
Bin	False	3803	1
Bin	True	185431	1

---

"=" expression on line 291:

 tst_ena = '0' 

	Evaluated to	Count	Threshold
Bin	False	16686	1
Bin	True	1581988	1

---

"=" expression on line 296:

 tst_ena = '0' 

	Evaluated to	Count	Threshold
Bin	False	3769	1
Bin	True	179388	1

---

"=" expression on line 300:

 tst_ena = '1' 

	Evaluated to	Count	Threshold
Bin	False	14979	1
Bin	True	2111	1