NVC code coverage report

Hierarchy

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.I_DUT.I_MAC_TOP.I_MAC_PC_TOP.I_MAC_PC_FSM.I_DLC_DECODER_TX

File:  /__w/CTU-CAN-FD/CTU-CAN-FD/src/medium_access_control/mac_pc_fsm.vhd


Current Instance Statement Branch Toggle Expression FSM state Functional Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.I_DUT.I_MAC_TOP.I_MAC_PC_TOP.I_MAC_PC_FSM.I_DLC_DECODER_TX 100.0 % (19/19) 100.0 % (20/20) 100.0 % (46/46) 100.0 % (6/6) N.A. N.A. 100.0 % (91/91)

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.


Statement Branch Toggle Expression FSM state Functional

Uncovered statements:

Excluded statements:

Covered statements:

Signal assignment statement on line 114:

114:    dlc_int <= to_integer(unsigned(dlc))
Count: 14472
Threshold: 1

If statement on lines 117 to 125:

117:    data_len_8_to_64_integer <= 
118:        12 when (dlc = "1001") else 
...
124:        64 when (dlc = "1111") else 
125:        0; 

Count: 14472
Threshold: 1

Signal assignment statement on line 118:

118:        12 when (dlc = "1001") else 
Count: 159
Threshold: 1

Signal assignment statement on line 119:

119:        16 when (dlc = "1010") else 
Count: 213
Threshold: 1

Signal assignment statement on line 120:

120:        20 when (dlc = "1011") else 
Count: 145
Threshold: 1

Signal assignment statement on line 121:

121:        24 when (dlc = "1100") else 
Count: 215
Threshold: 1

Signal assignment statement on line 122:

122:        32 when (dlc = "1101") else 
Count: 162
Threshold: 1

Signal assignment statement on line 123:

123:        48 when (dlc = "1110") else 
Count: 159
Threshold: 1

Signal assignment statement on line 124:

124:        64 when (dlc = "1111") else 
Count: 91
Threshold: 1

Signal assignment statement on line 125:

125:        0
Count: 13328
Threshold: 1

If statement on lines 130 to 132:

130:    data_len_can_2_0 <= dlc when (dlc_int <= 8) 
131:                            else 
132:                        "1000"; 

Count: 25742
Threshold: 1

Signal assignment statement on line 130:

130:    data_len_can_2_0 <= dlc when (dlc_int <= 8) 
Count: 23455
Threshold: 1

Signal assignment statement on line 132:

132:                        "1000"
Count: 2287
Threshold: 1

If statement on lines 137 to 139:

137:    data_len_can_fd <= ("000" & dlc) when (dlc_int <= 8) 
138:                                     else 
139:                       std_logic_vector(to_unsigned(data_len_8_to_64_integer, 7)); 

Count: 25742
Threshold: 1

Signal assignment statement on line 137:

137:    data_len_can_fd <= ("000" & dlc) when (dlc_int <= 8) 
Count: 23455
Threshold: 1

Signal assignment statement on line 139:

139:                       std_logic_vector(to_unsigned(data_len_8_to_64_integer, 7))
Count: 2287
Threshold: 1

If statement on lines 142 to 144:

142:    data_length <= "000" & data_len_can_2_0 when (frame_type = NORMAL_CAN) 
143:                                            else 
144:                   data_len_can_fd; 

Count: 18522
Threshold: 1

Signal assignment statement on line 142:

142:    data_length <= "000" & data_len_can_2_0 when (frame_type = NORMAL_CAN) 
Count: 12473
Threshold: 1

Signal assignment statement on line 144:

144:                   data_len_can_fd
Count: 6049
Threshold: 1

Uncovered branches:

Excluded branches:

Covered branches:

"if" / "when" / "else" condition on line 118:

118:        12 when (dlc = "1001") else 
Evaluated toCountThreshold
BinTrue1591
BinFalse143131

"if" / "when" / "else" condition on line 119:

119:        16 when (dlc = "1010") else 
Evaluated toCountThreshold
BinTrue2131
BinFalse141001

"if" / "when" / "else" condition on line 120:

120:        20 when (dlc = "1011") else 
Evaluated toCountThreshold
BinTrue1451
BinFalse139551

"if" / "when" / "else" condition on line 121:

121:        24 when (dlc = "1100") else 
Evaluated toCountThreshold
BinTrue2151
BinFalse137401

"if" / "when" / "else" condition on line 122:

122:        32 when (dlc = "1101") else 
Evaluated toCountThreshold
BinTrue1621
BinFalse135781

"if" / "when" / "else" condition on line 123:

123:        48 when (dlc = "1110") else 
Evaluated toCountThreshold
BinTrue1591
BinFalse134191

"if" / "when" / "else" condition on line 124:

124:        64 when (dlc = "1111") else 
Evaluated toCountThreshold
BinTrue911
BinFalse133281

"if" / "when" / "else" condition on line 130:

130:    data_len_can_2_0 <= dlc when (dlc_int <= 8
Evaluated toCountThreshold
BinTrue234551
BinFalse22871

"if" / "when" / "else" condition on line 137:

137:    data_len_can_fd <= ("000" & dlc) when (dlc_int <= 8
Evaluated toCountThreshold
BinTrue234551
BinFalse22871

"if" / "when" / "else" condition on line 142:

142:    data_length <= "000" & data_len_can_2_0 when (frame_type = NORMAL_CAN
Evaluated toCountThreshold
BinTrue124731
BinFalse60491

Uncovered toggles:

Excluded toggles:

Port:

 DLC
ElementFromToCountThresholdExcluded due to
Bin(3)0101Exclude file
Bin(3)1001Exclude file
Bin(2)0101Exclude file
Bin(2)1001Exclude file
Bin(1)0101Exclude file
Bin(1)1001Exclude file
Bin(0)0101Exclude file
Bin(0)1001Exclude file

Port:

 FRAME_TYPE
FromToCountThresholdExcluded due to
Bin0101Exclude file
Bin1001Exclude file

Covered toggles:

Port:

 DATA_LENGTH
ElementFromToCountThreshold
Bin(6)01861
Bin(6)1016871
Bin(5)011861
Bin(5)1017871
Bin(4)014171
Bin(4)1020181
Bin(3)0118331
Bin(3)1034331
Bin(2)0121301
Bin(2)1037311
Bin(1)0119381
Bin(1)1035391
Bin(0)0135511
Bin(0)1051521

Signal:

 DATA_LEN_CAN_2_0
ElementFromToCountThreshold
Bin(3)0114961
Bin(3)1030961
Bin(2)0119711
Bin(2)1035721
Bin(1)0119381
Bin(1)1035391
Bin(0)0135511
Bin(0)1051521

Signal:

 DATA_LEN_CAN_FD
ElementFromToCountThreshold
Bin(6)01911
Bin(6)1016921
Bin(5)013121
Bin(5)1019131
Bin(4)016981
Bin(4)1022981
Bin(3)0115551
Bin(3)1031551
Bin(2)0122511
Bin(2)1038521
Bin(1)0119381
Bin(1)1035391
Bin(0)0135511
Bin(0)1051521

Uncovered expressions:

Excluded expressions:

Covered expressions:

"<=" expression on line 130:

 dlc_int <= 8 
Evaluated toCountThreshold
BinFalse22871
BinTrue234551

"<=" expression on line 137:

 dlc_int <= 8 
Evaluated toCountThreshold
BinFalse22871
BinTrue234551

"=" expression on line 142:

 frame_type = NORMAL_CAN 
Evaluated toCountThreshold
BinFalse60491
BinTrue124731

Uncovered FSM states:

Excluded FSM states:

Covered FSM states:

Uncovered functional coverage:

Excluded functional coverage:

Covered functional coverage: