NVC code coverage report

Hierarchy

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.I_DUT.I_RXB_TOP.I_RXB_RAM.I_DP_INF_RAM.G_SYNC

File:  /__w/CTU-CAN-FD/CTU-CAN-FD/src/common_blocks/dp_inf_ram.vhd


Current Instance Statement Branch Toggle Expression FSM state Functional Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.I_DUT.I_RXB_TOP.I_RXB_RAM.I_DP_INF_RAM.G_SYNC 100.0 % (2/2) 100.0 % (2/2) N.A. N.A. N.A. N.A. 100.0 % (4/4)

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.


Statement Branch Toggle Expression FSM state Functional

Uncovered statements:

Excluded statements:

Covered statements:

If statement on lines 180 to 182:

180:            if (rising_edge(clk_sys)) then 
181:                data_out <= int_read_data; 
182:            end if; 
Count: 27384912
Threshold: 1

Signal assignment statement on line 181:

181:                data_out <= int_read_data; 
Count: 13690855
Threshold: 1

Uncovered branches:

Excluded branches:

Covered branches:

"if" / "when" / "else" condition on line 180:

180:            if (rising_edge(clk_sys)) then 
Evaluated toCountThreshold
BinTrue136908551
BinFalse136940571

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Uncovered functional coverage:

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