NVC code coverage report

Hierarchy

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.I_DUT.I_MAC_TOP.I_MAC_FC_TOP.I_MAC_FC_FSM

File:  /__w/CTU-CAN-FD/CTU-CAN-FD/src/medium_access_control/mac_fc_top.vhd


Current Instance Statement Branch Toggle Expression FSM state Functional Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.I_DUT.I_MAC_TOP.I_MAC_FC_TOP.I_MAC_FC_FSM 100.0 % (47/47) 100.0 % (38/38) 100.0 % (100/100) 100.0 % (33/33) 100.0 % (6/6) N.A. 100.0 % (224/224)

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.


Statement Branch Toggle Expression FSM state Functional

Uncovered statements:

Excluded statements:

Covered statements:

If statement on lines 169 to 171:

169:    tx_err_ctr_mt_erp <= '1' when (unsigned(tx_err_ctr) >= unsigned(mr_erp_erp_limit)) 
170:                             else 
171:                         '0'; 

Count: 34041
Threshold: 1

Signal assignment statement on line 169:

169:    tx_err_ctr_mt_erp <= '1' when (unsigned(tx_err_ctr) >= unsigned(mr_erp_erp_limit)) 
Count: 2039
Threshold: 1

Signal assignment statement on line 171:

171:                         '0'
Count: 32002
Threshold: 1

If statement on lines 174 to 176:

174:    rx_err_ctr_mt_erp <= '1' when (unsigned(rx_err_ctr) >= unsigned(mr_erp_erp_limit)) 
175:                             else 
176:                         '0'; 

Count: 27444
Threshold: 1

Signal assignment statement on line 174:

174:    rx_err_ctr_mt_erp <= '1' when (unsigned(rx_err_ctr) >= unsigned(mr_erp_erp_limit)) 
Count: 8874
Threshold: 1

Signal assignment statement on line 176:

176:                         '0'
Count: 18570
Threshold: 1

If statement on lines 179 to 181:

179:    tx_err_ctr_mt_255 <= '1' when (unsigned(tx_err_ctr) > 255) 
180:                             else 
181:                         '0'; 

Count: 33872
Threshold: 1

Signal assignment statement on line 179:

179:    tx_err_ctr_mt_255 <= '1' when (unsigned(tx_err_ctr) > 255) 
Count: 249
Threshold: 1

Signal assignment statement on line 181:

181:                         '0'
Count: 33623
Threshold: 1

If statement on lines 184 to 186:

184:    tx_err_ctr_mt_ewl <= '1' when (unsigned(tx_err_ctr) >= ('0' & unsigned(mr_ewl_ew_limit))) 
185:                             else 
186:                         '0'; 

Count: 34041
Threshold: 1

Signal assignment statement on line 184:

184:    tx_err_ctr_mt_ewl <= '1' when (unsigned(tx_err_ctr) >= ('0' & unsigned(mr_ewl_ew_limit))) 
Count: 2622
Threshold: 1

Signal assignment statement on line 186:

186:                         '0'
Count: 31419
Threshold: 1

If statement on lines 189 to 191:

189:    rx_err_ctr_mt_ewl <= '1' when (unsigned(rx_err_ctr) >= ('0' & unsigned(mr_ewl_ew_limit))) 
190:                             else 
191:                         '0'; 

Count: 27444
Threshold: 1

Signal assignment statement on line 189:

189:    rx_err_ctr_mt_ewl <= '1' when (unsigned(rx_err_ctr) >= ('0' & unsigned(mr_ewl_ew_limit))) 
Count: 9291
Threshold: 1

Signal assignment statement on line 191:

191:                         '0'
Count: 18153
Threshold: 1

If statement on lines 193 to 195:

193:    err_warning_limit_d <= '1' when (tx_err_ctr_mt_ewl = '1' or rx_err_ctr_mt_ewl = '1') 
194:                               else 
195:                           '0'; 

Count: 5170
Threshold: 1

Signal assignment statement on line 193:

193:    err_warning_limit_d <= '1' when (tx_err_ctr_mt_ewl = '1' or rx_err_ctr_mt_ewl = '1') 
Count: 1189
Threshold: 1

Signal assignment statement on line 195:

195:                           '0'
Count: 3981
Threshold: 1

If statement on lines 202 to 206:

202:        if (rst_n = '0') then 
203:            err_warning_limit_q <= '0'; 
204:        elsif (rising_edge(clk_sys)) then 
205:            err_warning_limit_q <= err_warning_limit_d; 
206:        end if; 

Count: 1096781321
Threshold: 1

Signal assignment statement on line 203:

203:            err_warning_limit_q <= '0'; 
Count: 2422674
Threshold: 1

Signal assignment statement on line 205:

205:            err_warning_limit_q <= err_warning_limit_d; 
Count: 547174334
Threshold: 1

If statement on lines 209 to 211:

209:    err_warning_limit_pulse <= '1' when (err_warning_limit_d /= err_warning_limit_q) 
210:                                   else 
211:                               '0'; 

Count: 7921
Threshold: 1

Signal assignment statement on line 209:

209:    err_warning_limit_pulse <= '1' when (err_warning_limit_d /= err_warning_limit_q) 
Count: 3160
Threshold: 1

Signal assignment statement on line 211:

211:                               '0'
Count: 4761
Threshold: 1

Signal assignment statement on line 213:

213:    mr_status_ewl <= err_warning_limit_d
Count: 4761
Threshold: 1

Signal assignment statement on line 221:

221:        next_state <= curr_state; 
Count: 34459
Threshold: 1

Sequential statement on lines 223 to 240:

223:        case curr_state is 
224:        when s_fc_err_active => 
...
239:            end if; 
240:        end case; 

Count: 34459
Threshold: 1

If statement on lines 225 to 227:

225:            if (tx_err_ctr_mt_erp = '1' or rx_err_ctr_mt_erp = '1') then 
226:                next_state <= s_fc_err_passive; 
227:            end if; 

Count: 17605
Threshold: 1

Signal assignment statement on line 226:

226:                next_state <= s_fc_err_passive; 
Count: 1111
Threshold: 1

If statement on lines 230 to 234:

230:            if (tx_err_ctr_mt_255 = '1') then 
231:                next_state <= s_fc_bus_off; 
232:            elsif (tx_err_ctr_mt_erp = '0' and rx_err_ctr_mt_erp = '0') then 
233:                next_state <= s_fc_err_active; 
234:            end if; 

Count: 1557
Threshold: 1

Signal assignment statement on line 231:

231:                next_state <= s_fc_bus_off; 
Count: 267
Threshold: 1

Signal assignment statement on line 233:

233:                next_state <= s_fc_err_active; 
Count: 188
Threshold: 1

If statement on lines 237 to 239:

237:            if (set_err_active = '1') then 
238:                next_state <= s_fc_err_active; 
239:            end if; 

Count: 15297
Threshold: 1

Signal assignment statement on line 238:

238:                next_state <= s_fc_err_active; 
Count: 6637
Threshold: 1

If statement on lines 249 to 253:

249:        if (rst_n = '0') then 
250:            curr_state <= s_fc_bus_off; 
251:        elsif (rising_edge(clk_sys)) then 
252:            curr_state <= next_state; 
253:        end if; 

Count: 1096781321
Threshold: 1

Signal assignment statement on line 250:

250:            curr_state <= s_fc_bus_off; 
Count: 2422674
Threshold: 1

Signal assignment statement on line 252:

252:            curr_state <= next_state; 
Count: 547174334
Threshold: 1

Signal assignment statement on line 261:

261:        is_err_active     <= '0'; 
Count: 17424
Threshold: 1

Signal assignment statement on line 262:

262:        is_err_passive    <= '0'; 
Count: 17424
Threshold: 1

Signal assignment statement on line 263:

263:        is_bus_off        <= '0'; 
Count: 17424
Threshold: 1

Sequential statement on lines 265 to 274:

265:        case curr_state is 
266:        when s_fc_err_active => 
...
273:            is_bus_off <= '1'; 
274:        end case; 

Count: 17424
Threshold: 1

Signal assignment statement on line 267:

267:            is_err_active <= '1'; 
Count: 8426
Threshold: 1

Signal assignment statement on line 270:

270:            is_err_passive <= '1'; 
Count: 771
Threshold: 1

Signal assignment statement on line 273:

273:            is_bus_off <= '1'; 
Count: 8227
Threshold: 1

If statement on lines 278 to 279:

278:    fcs_changed <= '1' when (curr_state /= next_state) else 
279:                   '0'; 

Count: 33587
Threshold: 1

Signal assignment statement on line 278:

278:    fcs_changed <= '1' when (curr_state /= next_state) else 
Count: 15993
Threshold: 1

Signal assignment statement on line 279:

279:                   '0'
Count: 17594
Threshold: 1

Uncovered branches:

Excluded branches:

Covered branches:

"if" / "when" / "else" condition on line 169:

169:    tx_err_ctr_mt_erp <= '1' when (unsigned(tx_err_ctr) >= unsigned(mr_erp_erp_limit)
Evaluated toCountThreshold
BinTrue20391
BinFalse320021

"if" / "when" / "else" condition on line 174:

174:    rx_err_ctr_mt_erp <= '1' when (unsigned(rx_err_ctr) >= unsigned(mr_erp_erp_limit)
Evaluated toCountThreshold
BinTrue88741
BinFalse185701

"if" / "when" / "else" condition on line 179:

179:    tx_err_ctr_mt_255 <= '1' when (unsigned(tx_err_ctr) > 255
Evaluated toCountThreshold
BinTrue2491
BinFalse336231

"if" / "when" / "else" condition on line 184:

184:    tx_err_ctr_mt_ewl <= '1' when (unsigned(tx_err_ctr) >= ('0' & unsigned(mr_ewl_ew_limit))
Evaluated toCountThreshold
BinTrue26221
BinFalse314191

"if" / "when" / "else" condition on line 189:

189:    rx_err_ctr_mt_ewl <= '1' when (unsigned(rx_err_ctr) >= ('0' & unsigned(mr_ewl_ew_limit))
Evaluated toCountThreshold
BinTrue92911
BinFalse181531

"if" / "when" / "else" condition on line 193:

193:    err_warning_limit_d <= '1' when (tx_err_ctr_mt_ewl = '1' or rx_err_ctr_mt_ewl = '1'
Evaluated toCountThreshold
BinTrue11891
BinFalse39811

"if" / "when" / "else" condition on line 202:

202:        if (rst_n = '0') then 
Evaluated toCountThreshold
BinTrue24226741
BinFalse10943586471

"if" / "when" / "else" condition on line 204:

204:        elsif (rising_edge(clk_sys)) then 
Evaluated toCountThreshold
BinTrue5471743341
BinFalse5471843131

"if" / "when" / "else" condition on line 209:

209:    err_warning_limit_pulse <= '1' when (err_warning_limit_d /= err_warning_limit_q
Evaluated toCountThreshold
BinTrue31601
BinFalse47611

"case" / "with" / "select" choice on line 224:

224:        when s_fc_err_active => 
Choice ofCountThreshold
Bins_fc_err_active176051

"if" / "when" / "else" condition on line 225:

225:            if (tx_err_ctr_mt_erp = '1' or rx_err_ctr_mt_erp = '1') then 
Evaluated toCountThreshold
BinTrue11111
BinFalse164941

"case" / "with" / "select" choice on line 229:

229:        when s_fc_err_passive => 
Choice ofCountThreshold
Bins_fc_err_passive15571

"if" / "when" / "else" condition on line 230:

230:            if (tx_err_ctr_mt_255 = '1') then 
Evaluated toCountThreshold
BinTrue2671
BinFalse12901

"if" / "when" / "else" condition on line 232:

232:            elsif (tx_err_ctr_mt_erp = '0' and rx_err_ctr_mt_erp = '0') then 
Evaluated toCountThreshold
BinTrue1881
BinFalse11021

"case" / "with" / "select" choice on line 236:

236:        when s_fc_bus_off => 
Choice ofCountThreshold
Bins_fc_bus_off152971

"if" / "when" / "else" condition on line 237:

237:            if (set_err_active = '1') then 
Evaluated toCountThreshold
BinTrue66371
BinFalse86601

"if" / "when" / "else" condition on line 249:

249:        if (rst_n = '0') then 
Evaluated toCountThreshold
BinTrue24226741
BinFalse10943586471

"if" / "when" / "else" condition on line 251:

251:        elsif (rising_edge(clk_sys)) then 
Evaluated toCountThreshold
BinTrue5471743341
BinFalse5471843131

"case" / "with" / "select" choice on line 266:

266:        when s_fc_err_active => 
Choice ofCountThreshold
Bins_fc_err_active84261

"case" / "with" / "select" choice on line 269:

269:        when s_fc_err_passive => 
Choice ofCountThreshold
Bins_fc_err_passive7711

"case" / "with" / "select" choice on line 272:

272:        when s_fc_bus_off => 
Choice ofCountThreshold
Bins_fc_bus_off82271

"if" / "when" / "else" condition on line 278:

278:    fcs_changed <= '1' when (curr_state /= next_state) else 
Evaluated toCountThreshold
BinTrue159931
BinFalse175941

Uncovered toggles:

Excluded toggles:

Port:

 CLK_SYS
FromToCountThresholdExcluded due to
Bin0101Exclude file
Bin1001Exclude file

Port:

 RST_N
FromToCountThresholdExcluded due to
Bin0101Exclude file
Bin1001Exclude file

Port:

 SET_ERR_ACTIVE
FromToCountThresholdExcluded due to
Bin0101Exclude file
Bin1001Exclude file

Port:

 MR_EWL_EW_LIMIT
ElementFromToCountThresholdExcluded due to
Bin(7)0101Exclude file
Bin(7)1001Exclude file
Bin(6)0101Exclude file
Bin(6)1001Exclude file
Bin(5)0101Exclude file
Bin(5)1001Exclude file
Bin(4)0101Exclude file
Bin(4)1001Exclude file
Bin(3)0101Exclude file
Bin(3)1001Exclude file
Bin(2)0101Exclude file
Bin(2)1001Exclude file
Bin(1)0101Exclude file
Bin(1)1001Exclude file
Bin(0)0101Exclude file
Bin(0)1001Exclude file

Port:

 MR_ERP_ERP_LIMIT
ElementFromToCountThresholdExcluded due to
Bin(7)0101Exclude file
Bin(7)1001Exclude file
Bin(6)0101Exclude file
Bin(6)1001Exclude file
Bin(5)0101Exclude file
Bin(5)1001Exclude file
Bin(4)0101Exclude file
Bin(4)1001Exclude file
Bin(3)0101Exclude file
Bin(3)1001Exclude file
Bin(2)0101Exclude file
Bin(2)1001Exclude file
Bin(1)0101Exclude file
Bin(1)1001Exclude file
Bin(0)0101Exclude file
Bin(0)1001Exclude file

Port:

 TX_ERR_CTR
ElementFromToCountThresholdExcluded due to
Bin(8)0101Exclude file
Bin(8)1001Exclude file
Bin(7)0101Exclude file
Bin(7)1001Exclude file
Bin(6)0101Exclude file
Bin(6)1001Exclude file
Bin(5)0101Exclude file
Bin(5)1001Exclude file
Bin(4)0101Exclude file
Bin(4)1001Exclude file
Bin(3)0101Exclude file
Bin(3)1001Exclude file
Bin(2)0101Exclude file
Bin(2)1001Exclude file
Bin(1)0101Exclude file
Bin(1)1001Exclude file
Bin(0)0101Exclude file
Bin(0)1001Exclude file

Port:

 RX_ERR_CTR
ElementFromToCountThresholdExcluded due to
Bin(8)0101Exclude file
Bin(8)1001Exclude file
Bin(7)0101Exclude file
Bin(7)1001Exclude file
Bin(6)0101Exclude file
Bin(6)1001Exclude file
Bin(5)0101Exclude file
Bin(5)1001Exclude file
Bin(4)0101Exclude file
Bin(4)1001Exclude file
Bin(3)0101Exclude file
Bin(3)1001Exclude file
Bin(2)0101Exclude file
Bin(2)1001Exclude file
Bin(1)0101Exclude file
Bin(1)1001Exclude file
Bin(0)0101Exclude file
Bin(0)1001Exclude file

Covered toggles:

Port:

 MR_STATUS_EWL
FromToCountThreshold
Bin017801
Bin1023801

Port:

 IS_ERR_ACTIVE
FromToCountThreshold
Bin0184261
Bin1084151

Port:

 IS_ERR_PASSIVE
FromToCountThreshold
Bin017711
Bin1023721

Port:

 IS_BUS_OFF
FromToCountThreshold
Bin0182271
Bin1082381

Port:

 FCS_CHANGED
FromToCountThreshold
Bin01159931
Bin10175941

Port:

 ERR_WARNING_LIMIT_PULSE
FromToCountThreshold
Bin0131601
Bin1047611

Signal:

 TX_ERR_CTR_MT_ERP
FromToCountThreshold
Bin016951
Bin1022961

Signal:

 RX_ERR_CTR_MT_ERP
FromToCountThreshold
Bin015261
Bin1021271

Signal:

 TX_ERR_CTR_MT_EWL
FromToCountThreshold
Bin017081
Bin1023091

Signal:

 RX_ERR_CTR_MT_EWL
FromToCountThreshold
Bin014371
Bin1020371

Signal:

 TX_ERR_CTR_MT_255
FromToCountThreshold
Bin012491
Bin1018501

Signal:

 ERR_WARNING_LIMIT_D
FromToCountThreshold
Bin017801
Bin1023801

Signal:

 ERR_WARNING_LIMIT_Q
FromToCountThreshold
Bin017801
Bin1023801

Uncovered expressions:

Excluded expressions:

Covered expressions:

"or" expression on line 193:

 tx_err_ctr_mt_ewl = '1' or rx_err_ctr_mt_ewl = '1' 
 <---------LHS--------->    <---------RHS---------> 

LHSRHSCountThreshold
BinFalseFalse39811
BinFalseTrue2811
BinTrueFalse5431

"=" expression on line 193:

 tx_err_ctr_mt_ewl = '1' 
Evaluated toCountThreshold
BinFalse42621
BinTrue9081

"=" expression on line 193:

 rx_err_ctr_mt_ewl = '1' 
Evaluated toCountThreshold
BinFalse45241
BinTrue6461

"=" expression on line 202:

 rst_n = '0' 
Evaluated toCountThreshold
BinFalse10943586471
BinTrue24226741

"/=" expression on line 209:

 err_warning_limit_d /= err_warning_limit_q 
Evaluated toCountThreshold
BinFalse47611
BinTrue31601

"or" expression on line 225:

 tx_err_ctr_mt_erp = '1' or rx_err_ctr_mt_erp = '1' 
 <---------LHS--------->    <---------RHS---------> 

LHSRHSCountThreshold
BinFalseFalse164941
BinFalseTrue3101
BinTrueFalse5041

"=" expression on line 225:

 tx_err_ctr_mt_erp = '1' 
Evaluated toCountThreshold
BinFalse168041
BinTrue8011

"=" expression on line 225:

 rx_err_ctr_mt_erp = '1' 
Evaluated toCountThreshold
BinFalse169981
BinTrue6071

"=" expression on line 230:

 tx_err_ctr_mt_255 = '1' 
Evaluated toCountThreshold
BinFalse12901
BinTrue2671

"and" expression on line 232:

 tx_err_ctr_mt_erp = '0' and rx_err_ctr_mt_erp = '0' 
 <---------LHS--------->     <---------RHS---------> 

LHSRHSCountThreshold
BinFalseTrue4801
BinTrueFalse3101
BinTrueTrue1881

"=" expression on line 232:

 tx_err_ctr_mt_erp = '0' 
Evaluated toCountThreshold
BinFalse7921
BinTrue4981

"=" expression on line 232:

 rx_err_ctr_mt_erp = '0' 
Evaluated toCountThreshold
BinFalse6221
BinTrue6681

"=" expression on line 237:

 set_err_active = '1' 
Evaluated toCountThreshold
BinFalse86601
BinTrue66371

"=" expression on line 249:

 rst_n = '0' 
Evaluated toCountThreshold
BinFalse10943586471
BinTrue24226741

"/=" expression on line 278:

 curr_state /= next_state 
Evaluated toCountThreshold
BinFalse175941
BinTrue159931

Uncovered FSM states:

Excluded FSM states:

Covered FSM states:

"T_FAULT_CONF_STATE" FSM on line 163:

163:    signal curr_state           : t_fault_conf_state; 
StateCountThreshold
BinS_FC_ERR_ACTIVE84261
BinS_FC_ERR_PASSIVE7711
BinS_FC_BUS_OFF82271

"T_FAULT_CONF_STATE" FSM on line 164:

164:    signal next_state           : t_fault_conf_state; 
StateCountThreshold
BinS_FC_ERR_ACTIVE85961
BinS_FC_ERR_PASSIVE9411
BinS_FC_BUS_OFF82271

Uncovered functional coverage:

Excluded functional coverage:

Covered functional coverage: