NVC code coverage report

Hierarchy

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.I_DUT.I_MAC_TOP.I_MAC_PC_TOP.I_MAC_PC_FSM.I_DLC_DECODER_RX

File:  /__w/CTU-CAN-FD/CTU-CAN-FD/src/medium_access_control/mac_pc_fsm.vhd


Current Instance Statement Branch Toggle Expression FSM state Functional Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.I_DUT.I_MAC_TOP.I_MAC_PC_TOP.I_MAC_PC_FSM.I_DLC_DECODER_RX 100.0 % (19/19) 100.0 % (20/20) 100.0 % (46/46) 100.0 % (6/6) N.A. N.A. 100.0 % (91/91)

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.


Statement Branch Toggle Expression FSM state Functional

Uncovered statements:

Excluded statements:

Covered statements:

Signal assignment statement on line 114:

114:    dlc_int <= to_integer(unsigned(dlc))
Count: 80123
Threshold: 1

If statement on lines 117 to 125:

117:    data_len_8_to_64_integer <= 
118:        12 when (dlc = "1001") else 
...
124:        64 when (dlc = "1111") else 
125:        0; 

Count: 80123
Threshold: 1

Signal assignment statement on line 118:

118:        12 when (dlc = "1001") else 
Count: 435
Threshold: 1

Signal assignment statement on line 119:

119:        16 when (dlc = "1010") else 
Count: 566
Threshold: 1

Signal assignment statement on line 120:

120:        20 when (dlc = "1011") else 
Count: 352
Threshold: 1

Signal assignment statement on line 121:

121:        24 when (dlc = "1100") else 
Count: 1099
Threshold: 1

Signal assignment statement on line 122:

122:        32 when (dlc = "1101") else 
Count: 723
Threshold: 1

Signal assignment statement on line 123:

123:        48 when (dlc = "1110") else 
Count: 581
Threshold: 1

Signal assignment statement on line 124:

124:        64 when (dlc = "1111") else 
Count: 13271
Threshold: 1

Signal assignment statement on line 125:

125:        0
Count: 63096
Threshold: 1

If statement on lines 130 to 132:

130:    data_len_can_2_0 <= dlc when (dlc_int <= 8) 
131:                            else 
132:                        "1000"; 

Count: 157044
Threshold: 1

Signal assignment statement on line 130:

130:    data_len_can_2_0 <= dlc when (dlc_int <= 8) 
Count: 122991
Threshold: 1

Signal assignment statement on line 132:

132:                        "1000"
Count: 34053
Threshold: 1

If statement on lines 137 to 139:

137:    data_len_can_fd <= ("000" & dlc) when (dlc_int <= 8) 
138:                                     else 
139:                       std_logic_vector(to_unsigned(data_len_8_to_64_integer, 7)); 

Count: 157044
Threshold: 1

Signal assignment statement on line 137:

137:    data_len_can_fd <= ("000" & dlc) when (dlc_int <= 8) 
Count: 122991
Threshold: 1

Signal assignment statement on line 139:

139:                       std_logic_vector(to_unsigned(data_len_8_to_64_integer, 7))
Count: 34053
Threshold: 1

If statement on lines 142 to 144:

142:    data_length <= "000" & data_len_can_2_0 when (frame_type = NORMAL_CAN) 
143:                                            else 
144:                   data_len_can_fd; 

Count: 146226
Threshold: 1

Signal assignment statement on line 142:

142:    data_length <= "000" & data_len_can_2_0 when (frame_type = NORMAL_CAN) 
Count: 73852
Threshold: 1

Signal assignment statement on line 144:

144:                   data_len_can_fd
Count: 72374
Threshold: 1

Uncovered branches:

Excluded branches:

Covered branches:

"if" / "when" / "else" condition on line 118:

118:        12 when (dlc = "1001") else 
Evaluated toCountThreshold
BinTrue4351
BinFalse796881

"if" / "when" / "else" condition on line 119:

119:        16 when (dlc = "1010") else 
Evaluated toCountThreshold
BinTrue5661
BinFalse791221

"if" / "when" / "else" condition on line 120:

120:        20 when (dlc = "1011") else 
Evaluated toCountThreshold
BinTrue3521
BinFalse787701

"if" / "when" / "else" condition on line 121:

121:        24 when (dlc = "1100") else 
Evaluated toCountThreshold
BinTrue10991
BinFalse776711

"if" / "when" / "else" condition on line 122:

122:        32 when (dlc = "1101") else 
Evaluated toCountThreshold
BinTrue7231
BinFalse769481

"if" / "when" / "else" condition on line 123:

123:        48 when (dlc = "1110") else 
Evaluated toCountThreshold
BinTrue5811
BinFalse763671

"if" / "when" / "else" condition on line 124:

124:        64 when (dlc = "1111") else 
Evaluated toCountThreshold
BinTrue132711
BinFalse630961

"if" / "when" / "else" condition on line 130:

130:    data_len_can_2_0 <= dlc when (dlc_int <= 8
Evaluated toCountThreshold
BinTrue1229911
BinFalse340531

"if" / "when" / "else" condition on line 137:

137:    data_len_can_fd <= ("000" & dlc) when (dlc_int <= 8
Evaluated toCountThreshold
BinTrue1229911
BinFalse340531

"if" / "when" / "else" condition on line 142:

142:    data_length <= "000" & data_len_can_2_0 when (frame_type = NORMAL_CAN
Evaluated toCountThreshold
BinTrue738521
BinFalse723741

Uncovered toggles:

Excluded toggles:

Port:

 DLC
ElementFromToCountThresholdExcluded due to
Bin(3)0101Exclude file
Bin(3)1001Exclude file
Bin(2)0101Exclude file
Bin(2)1001Exclude file
Bin(1)0101Exclude file
Bin(1)1001Exclude file
Bin(0)0101Exclude file
Bin(0)1001Exclude file

Port:

 FRAME_TYPE
FromToCountThresholdExcluded due to
Bin0101Exclude file
Bin1001Exclude file

Covered toggles:

Port:

 DATA_LENGTH
ElementFromToCountThreshold
Bin(6)01127881
Bin(6)10143891
Bin(5)0110671
Bin(5)1026681
Bin(4)0119531
Bin(4)1035541
Bin(3)01346271
Bin(3)10362271
Bin(2)01218001
Bin(2)10233981
Bin(1)01215281
Bin(1)10231281
Bin(0)01269611
Bin(0)10285581

Signal:

 DATA_LEN_CAN_2_0
ElementFromToCountThreshold
Bin(3)01201311
Bin(3)10217311
Bin(2)01212721
Bin(2)10228701
Bin(1)01215281
Bin(1)10231281
Bin(0)01269611
Bin(0)10285581

Signal:

 DATA_LEN_CAN_FD
ElementFromToCountThreshold
Bin(6)01132711
Bin(6)10148721
Bin(5)0113041
Bin(5)1029051
Bin(4)0125981
Bin(4)1041981
Bin(3)01201311
Bin(3)10217311
Bin(2)01220591
Bin(2)10236571
Bin(1)01215281
Bin(1)10231281
Bin(0)01269611
Bin(0)10285581

Uncovered expressions:

Excluded expressions:

Covered expressions:

"<=" expression on line 130:

 dlc_int <= 8 
Evaluated toCountThreshold
BinFalse340531
BinTrue1229911

"<=" expression on line 137:

 dlc_int <= 8 
Evaluated toCountThreshold
BinFalse340531
BinTrue1229911

"=" expression on line 142:

 frame_type = NORMAL_CAN 
Evaluated toCountThreshold
BinFalse723741
BinTrue738521

Uncovered FSM states:

Excluded FSM states:

Covered FSM states:

Uncovered functional coverage:

Excluded functional coverage:

Covered functional coverage: