NVC code coverage report

Hierarchy

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.I_DUT.I_TXARB_TOP.I_TXARB_PRIORITY_DECODER

File:  /__w/CTU-CAN-FD/CTU-CAN-FD/src/tx_arbitrator/txarb_top.vhd

Nested Instances Statement Branch Toggle Expression FSM state Functional Average
G_L0(0) 100.0 % (2/2) N.A. N.A. N.A. N.A. N.A. 100.0 % (2/2)
G_L0(1) 100.0 % (2/2) N.A. N.A. N.A. N.A. N.A. 100.0 % (2/2)
G_L0(2) 100.0 % (2/2) N.A. N.A. N.A. N.A. N.A. 100.0 % (2/2)
G_L0(3) 100.0 % (2/2) N.A. N.A. N.A. N.A. N.A. 100.0 % (2/2)
G_L0(4) 100.0 % (2/2) N.A. N.A. N.A. N.A. N.A. 100.0 % (2/2)
G_L0(5) 100.0 % (2/2) N.A. N.A. N.A. N.A. N.A. 100.0 % (2/2)
G_L0(6) 100.0 % (2/2) N.A. N.A. N.A. N.A. N.A. 100.0 % (2/2)
G_L0(7) 100.0 % (2/2) N.A. N.A. N.A. N.A. N.A. 100.0 % (2/2)
G_FILL_ZEROES 100.0 % (2/2) N.A. N.A. N.A. N.A. N.A. 100.0 % (2/2)

Current Instance Statement Branch Toggle Expression FSM state Functional Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.I_DUT.I_TXARB_TOP.I_TXARB_PRIORITY_DECODER 100.0 % (64/64) 100.0 % (36/36) 100.0 % (194/194) 100.0 % (19/19) N.A. N.A. 100.0 % (313/313)

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.


Statement Branch Toggle Expression FSM state Functional

Uncovered statements:

Excluded statements:

Covered statements:

Variable assignment statement on line 202:

202:        tmp := (others => (others => '0')); 
Count: 60146
Threshold: 1

Loop statement on lines 203 to 232:

203:        for i in 0 to 3 loop 
204:            tmp(i) := l0_valid(2 * i + 1 downto 2 * i); 
...
231:            end case; 
232:        end loop; 

Count: 60146
Threshold: 1

Variable assignment statement on line 204:

204:            tmp(i) := l0_valid(2 * i + 1 downto 2 * i); 
Count: 240584
Threshold: 1

Sequential statement on lines 205 to 231:

205:            case tmp(i) is 
206:            when "01" => 
...
230: 
231:            end case; 

Count: 240584
Threshold: 1

Signal assignment statement on line 207:

207:                l1_prio(i)      <= l0_prio(2 * i); 
Count: 16156
Threshold: 1

Signal assignment statement on line 208:

208:                l1_valid(i)     <= '1'; 
Count: 16156
Threshold: 1

Signal assignment statement on line 209:

209:                l1_winner(i)    <= LOWER_TREE; 
Count: 16156
Threshold: 1

Signal assignment statement on line 212:

212:                l1_prio(i)      <= l0_prio(2 * i + 1); 
Count: 10347
Threshold: 1

Signal assignment statement on line 213:

213:                l1_valid(i)     <= '1'; 
Count: 10347
Threshold: 1

Signal assignment statement on line 214:

214:                l1_winner(i)    <= UPPER_TREE; 
Count: 10347
Threshold: 1

If statement on lines 217 to 223:

217:                if (unsigned(l0_prio(2 * i + 1)) > unsigned(l0_prio(2 * i))) then 
218:                    l1_prio(i)    <= l0_prio(2 * i + 1); 
...
222:                    l1_winner(i)  <= LOWER_TREE; 
223:                end if; 

Count: 1173
Threshold: 1

Signal assignment statement on line 218:

218:                    l1_prio(i)    <= l0_prio(2 * i + 1); 
Count: 146
Threshold: 1

Signal assignment statement on line 219:

219:                    l1_winner(i)  <= UPPER_TREE; 
Count: 146
Threshold: 1

Signal assignment statement on line 221:

221:                    l1_prio(i)    <= l0_prio(2 * i); 
Count: 1027
Threshold: 1

Signal assignment statement on line 222:

222:                    l1_winner(i)  <= LOWER_TREE; 
Count: 1027
Threshold: 1

Signal assignment statement on line 224:

224:                l1_valid(i)     <= '1'; 
Count: 1173
Threshold: 1

Signal assignment statement on line 227:

227:                l1_valid(i)     <= '0'; 
Count: 212908
Threshold: 1

Signal assignment statement on line 228:

228:                l1_prio(i)      <= l0_prio(2 * i + 1); 
Count: 212908
Threshold: 1

Signal assignment statement on line 229:

229:                l1_winner(i)    <= UPPER_TREE; 
Count: 212908
Threshold: 1

Variable assignment statement on line 242:

242:        tmp := (others => (others => '0')); 
Count: 59284
Threshold: 1

Loop statement on lines 243 to 273:

243:        for i in 0 to 1 loop 
244:            tmp(i) := l1_valid(2 * i + 1 downto 2 * i); 
...
272:            end case; 
273:        end loop; 

Count: 59284
Threshold: 1

Variable assignment statement on line 244:

244:            tmp(i) := l1_valid(2 * i + 1 downto 2 * i); 
Count: 118568
Threshold: 1

Sequential statement on lines 246 to 272:

246:            case tmp(i) is 
247:            when "01" => 
...
271: 
272:            end case; 

Count: 118568
Threshold: 1

Signal assignment statement on line 248:

248:                l2_prio(i)      <= l1_prio(2 * i); 
Count: 24086
Threshold: 1

Signal assignment statement on line 249:

249:                l2_valid(i)     <= '1'; 
Count: 24086
Threshold: 1

Signal assignment statement on line 250:

250:                l2_winner(i)    <= LOWER_TREE; 
Count: 24086
Threshold: 1

Signal assignment statement on line 253:

253:                l2_prio(i)      <= l1_prio(2 * i + 1); 
Count: 2299
Threshold: 1

Signal assignment statement on line 254:

254:                l2_valid(i)     <= '1'; 
Count: 2299
Threshold: 1

Signal assignment statement on line 255:

255:                l2_winner(i)    <= UPPER_TREE; 
Count: 2299
Threshold: 1

If statement on lines 258 to 264:

258:                if (unsigned(l1_prio(2 * i + 1)) > unsigned(l1_prio(2 * i))) then 
259:                    l2_prio(i)    <= l1_prio(2 * i + 1); 
...
263:                    l2_winner(i)  <= LOWER_TREE; 
264:                end if; 

Count: 321
Threshold: 1

Signal assignment statement on line 259:

259:                    l2_prio(i)    <= l1_prio(2 * i + 1); 
Count: 131
Threshold: 1

Signal assignment statement on line 260:

260:                    l2_winner(i)  <= UPPER_TREE; 
Count: 131
Threshold: 1

Signal assignment statement on line 262:

262:                    l2_prio(i)    <= l1_prio(2 * i); 
Count: 190
Threshold: 1

Signal assignment statement on line 263:

263:                    l2_winner(i)  <= LOWER_TREE; 
Count: 190
Threshold: 1

Signal assignment statement on line 265:

265:                l2_valid(i)     <= '1'; 
Count: 321
Threshold: 1

Signal assignment statement on line 268:

268:                l2_valid(i)     <= '0'; 
Count: 91862
Threshold: 1

Signal assignment statement on line 269:

269:                l2_prio(i)      <= l1_prio(2 * i + 1); 
Count: 91862
Threshold: 1

Signal assignment statement on line 270:

270:                l2_winner(i)    <= UPPER_TREE; 
Count: 91862
Threshold: 1

If statement on lines 285 to 287:

285:    l3_valid  <= '0' when l2_valid(1 downto 0) = "00" 
286:                     else 
287:                '1'; 

Count: 54440
Threshold: 1

Signal assignment statement on line 285:

285:    l3_valid  <= '0' when l2_valid(1 downto 0) = "00" 
Count: 27203
Threshold: 1

Signal assignment statement on line 287:

287:                '1'
Count: 27237
Threshold: 1

If statement on line 288:

288:    output_valid <= '1' when l3_valid = '1' else '0'; 
Count: 56007
Threshold: 1

Signal assignment statement on line 288:

288:    output_valid <= '1' when l3_valid = '1' else '0'; 
Count: 27203
Threshold: 1

Signal assignment statement on line 288:

288:    output_valid <= '1' when l3_valid = '1' else '0'
Count: 28804
Threshold: 1

If statement on lines 291 to 296:

291:    l3_winner  <= LOWER_TREE when l2_valid(1 downto 0) = "01" else 
292:                  UPPER_TREE when l2_valid(1 downto 0) = "10" else 
293:                  UPPER_TREE when (l2_valid(1 downto 0) = "11" and 
294:                                 unsigned(l2_prio(1)) > unsigned(l2_prio(0))) 
295:                             else 
296:                  LOWER_TREE; 

Count: 57847
Threshold: 1

Signal assignment statement on line 291:

291:    l3_winner  <= LOWER_TREE when l2_valid(1 downto 0) = "01" else 
Count: 25569
Threshold: 1

Signal assignment statement on line 292:

292:                  UPPER_TREE when l2_valid(1 downto 0) = "10" else 
Count: 873
Threshold: 1

Signal assignment statement on line 293:

293:                  UPPER_TREE when (l2_valid(1 downto 0) = "11" and 
Count: 37
Threshold: 1

Signal assignment statement on line 296:

296:                  LOWER_TREE
Count: 31368
Threshold: 1

If statement on lines 310 to 338:

310:        if (l3_winner = LOWER_TREE) then 
311:            if (l2_winner(0) = LOWER_TREE) then 
...
337:            end if; 
338:        end if; 

Count: 85017
Threshold: 1

If statement on lines 311 to 323:

311:            if (l2_winner(0) = LOWER_TREE) then 
312:                if (l1_winner(0) = LOWER_TREE) then 
...
322:                end if; 
323:            end if; 

Count: 81572
Threshold: 1

If statement on lines 312 to 316:

312:                if (l1_winner(0) = LOWER_TREE) then 
313:                    output_index <= 0; 
314:                else 
315:                    output_index <= 1; 
316:                end if; 

Count: 38420
Threshold: 1

Signal assignment statement on line 313:

313:                    output_index <= 0; 
Count: 15150
Threshold: 1

Signal assignment statement on line 315:

315:                    output_index <= 1; 
Count: 23270
Threshold: 1

If statement on lines 318 to 322:

318:                if (l1_winner(1) = LOWER_TREE) then 
319:                    output_index <= 2 mod G_TXT_BUF_COUNT; 
320:                else 
321:                    output_index <= 3 mod G_TXT_BUF_COUNT; 
322:                end if; 

Count: 43152
Threshold: 1

Signal assignment statement on line 319:

319:                    output_index <= 2 mod G_TXT_BUF_COUNT; 
Count: 1020
Threshold: 1

Signal assignment statement on line 321:

321:                    output_index <= 3 mod G_TXT_BUF_COUNT; 
Count: 42132
Threshold: 1

If statement on lines 325 to 337:

325:            if (l2_winner(1) = LOWER_TREE) then 
326:                if (l1_winner(2) = LOWER_TREE) then 
...
336:                end if; 
337:            end if; 

Count: 3445
Threshold: 1

If statement on lines 326 to 330:

326:                if (l1_winner(2) = LOWER_TREE) then 
327:                    output_index <= 4 mod G_TXT_BUF_COUNT; 
328:                else 
329:                    output_index <= 5 mod G_TXT_BUF_COUNT; 
330:                end if; 

Count: 690
Threshold: 1

Signal assignment statement on line 327:

327:                    output_index <= 4 mod G_TXT_BUF_COUNT; 
Count: 249
Threshold: 1

Signal assignment statement on line 329:

329:                    output_index <= 5 mod G_TXT_BUF_COUNT; 
Count: 441
Threshold: 1

If statement on lines 332 to 336:

332:                if (l1_winner(3) = LOWER_TREE) then 
333:                    output_index <= 6 mod G_TXT_BUF_COUNT; 
334:                else 
335:                    output_index <= 7 mod G_TXT_BUF_COUNT; 
336:                end if; 

Count: 2755
Threshold: 1

Signal assignment statement on line 333:

333:                    output_index <= 6 mod G_TXT_BUF_COUNT; 
Count: 261
Threshold: 1

Signal assignment statement on line 335:

335:                    output_index <= 7 mod G_TXT_BUF_COUNT; 
Count: 2494
Threshold: 1

Uncovered branches:

Excluded branches:

Covered branches:

"case" / "with" / "select" choice on line 206:

206:            when "01" => 
Choice ofCountThreshold
Bin"01"161561

"case" / "with" / "select" choice on line 211:

211:            when "10" => 
Choice ofCountThreshold
Bin"10"103471

"case" / "with" / "select" choice on line 216:

216:            when "11" => 
Choice ofCountThreshold
Bin"11"11731

"if" / "when" / "else" condition on line 217:

217:                if (unsigned(l0_prio(2 * i + 1)) > unsigned(l0_prio(2 * i))) then 
Evaluated toCountThreshold
BinTrue1461
BinFalse10271

"case" / "with" / "select" choice on line 226:

226:            when others => 
Choice ofCountThreshold
Binothers2129081

"case" / "with" / "select" choice on line 247:

247:            when "01" => 
Choice ofCountThreshold
Bin"01"240861

"case" / "with" / "select" choice on line 252:

252:            when "10" => 
Choice ofCountThreshold
Bin"10"22991

"case" / "with" / "select" choice on line 257:

257:            when "11" => 
Choice ofCountThreshold
Bin"11"3211

"if" / "when" / "else" condition on line 258:

258:                if (unsigned(l1_prio(2 * i + 1)) > unsigned(l1_prio(2 * i))) then 
Evaluated toCountThreshold
BinTrue1311
BinFalse1901

"case" / "with" / "select" choice on line 267:

267:            when others => 
Choice ofCountThreshold
Binothers918621

"if" / "when" / "else" condition on line 285:

285:    l3_valid  <= '0' when l2_valid(1 downto 0) = "00" 
Evaluated toCountThreshold
BinTrue272031
BinFalse272371

"if" / "when" / "else" condition on line 288:

288:    output_valid <= '1' when l3_valid = '1' else '0'; 
Evaluated toCountThreshold
BinTrue272031
BinFalse288041

"if" / "when" / "else" condition on line 291:

291:    l3_winner  <= LOWER_TREE when l2_valid(1 downto 0) = "01" else 
Evaluated toCountThreshold
BinTrue255691
BinFalse322781

"if" / "when" / "else" condition on line 292:

292:                  UPPER_TREE when l2_valid(1 downto 0) = "10" else 
Evaluated toCountThreshold
BinTrue8731
BinFalse314051

"if" / "when" / "else" condition on lines 293 to 294:

293:                  UPPER_TREE when (l2_valid(1 downto 0) = "11" and 
294:                                 unsigned(l2_prio(1)) > unsigned(l2_prio(0))) 

Evaluated toCountThreshold
BinTrue371
BinFalse313681

"if" / "when" / "else" condition on line 310:

310:        if (l3_winner = LOWER_TREE) then 
Evaluated toCountThreshold
BinTrue815721
BinFalse34451

"if" / "when" / "else" condition on line 311:

311:            if (l2_winner(0) = LOWER_TREE) then 
Evaluated toCountThreshold
BinTrue384201
BinFalse431521

"if" / "when" / "else" condition on line 312:

312:                if (l1_winner(0) = LOWER_TREE) then 
Evaluated toCountThreshold
BinTrue151501
BinFalse232701

"if" / "when" / "else" condition on line 318:

318:                if (l1_winner(1) = LOWER_TREE) then 
Evaluated toCountThreshold
BinTrue10201
BinFalse421321

"if" / "when" / "else" condition on line 325:

325:            if (l2_winner(1) = LOWER_TREE) then 
Evaluated toCountThreshold
BinTrue6901
BinFalse27551

"if" / "when" / "else" condition on line 326:

326:                if (l1_winner(2) = LOWER_TREE) then 
Evaluated toCountThreshold
BinTrue2491
BinFalse4411

"if" / "when" / "else" condition on line 332:

332:                if (l1_winner(3) = LOWER_TREE) then 
Evaluated toCountThreshold
BinTrue2611
BinFalse24941

Uncovered toggles:

Excluded toggles:

Port:

 PRIO
ElementFromToCountThresholdExcluded due to
Bin(7)(2)0101Exclude file
Bin(7)(2)1001Exclude file
Bin(7)(1)0101Exclude file
Bin(7)(1)1001Exclude file
Bin(7)(0)0101Exclude file
Bin(7)(0)1001Exclude file
Bin(6)(2)0101Exclude file
Bin(6)(2)1001Exclude file
Bin(6)(1)0101Exclude file
Bin(6)(1)1001Exclude file
Bin(6)(0)0101Exclude file
Bin(6)(0)1001Exclude file
Bin(5)(2)0101Exclude file
Bin(5)(2)1001Exclude file
Bin(5)(1)0101Exclude file
Bin(5)(1)1001Exclude file
Bin(5)(0)0101Exclude file
Bin(5)(0)1001Exclude file
Bin(4)(2)0101Exclude file
Bin(4)(2)1001Exclude file
Bin(4)(1)0101Exclude file
Bin(4)(1)1001Exclude file
Bin(4)(0)0101Exclude file
Bin(4)(0)1001Exclude file
Bin(3)(2)0101Exclude file
Bin(3)(2)1001Exclude file
Bin(3)(1)0101Exclude file
Bin(3)(1)1001Exclude file
Bin(3)(0)0101Exclude file
Bin(3)(0)1001Exclude file
Bin(2)(2)0101Exclude file
Bin(2)(2)1001Exclude file
Bin(2)(1)0101Exclude file
Bin(2)(1)1001Exclude file
Bin(2)(0)0101Exclude file
Bin(2)(0)1001Exclude file
Bin(1)(2)0101Exclude file
Bin(1)(2)1001Exclude file
Bin(1)(1)0101Exclude file
Bin(1)(1)1001Exclude file
Bin(1)(0)0101Exclude file
Bin(1)(0)1001Exclude file
Bin(0)(2)0101Exclude file
Bin(0)(2)1001Exclude file
Bin(0)(1)0101Exclude file
Bin(0)(1)1001Exclude file
Bin(0)(0)0101Exclude file
Bin(0)(0)1001Exclude file

Port:

 PRIO_VALID
ElementFromToCountThresholdExcluded due to
Bin(7)0101Exclude file
Bin(7)1001Exclude file
Bin(6)0101Exclude file
Bin(6)1001Exclude file
Bin(5)0101Exclude file
Bin(5)1001Exclude file
Bin(4)0101Exclude file
Bin(4)1001Exclude file
Bin(3)0101Exclude file
Bin(3)1001Exclude file
Bin(2)0101Exclude file
Bin(2)1001Exclude file
Bin(1)0101Exclude file
Bin(1)1001Exclude file
Bin(0)0101Exclude file
Bin(0)1001Exclude file

Covered toggles:

Port:

 OUTPUT_VALID
FromToCountThreshold
Bin01272031
Bin10288041

Signal:

 L0_PRIO
ElementFromToCountThreshold
Bin(7)(2)01611
Bin(7)(2)1039161
Bin(7)(1)01541
Bin(7)(1)1039021
Bin(7)(0)01881
Bin(7)(0)1039371
Bin(6)(2)01721
Bin(6)(2)1039141
Bin(6)(1)01581
Bin(6)(1)1038881
Bin(6)(0)011041
Bin(6)(0)1039471
Bin(5)(2)01811
Bin(5)(2)1039131
Bin(5)(1)01671
Bin(5)(1)1039111
Bin(5)(0)01891
Bin(5)(0)1039211
Bin(4)(2)011111
Bin(4)(2)1039051
Bin(4)(1)011061
Bin(4)(1)1039161
Bin(4)(0)01901
Bin(4)(0)1038801
Bin(3)(2)011841
Bin(3)(2)1029931
Bin(3)(1)011931
Bin(3)(1)1030591
Bin(3)(0)012431
Bin(3)(0)1030241
Bin(2)(2)012211
Bin(2)(2)1029911
Bin(2)(1)012231
Bin(2)(1)1030341
Bin(2)(0)012851
Bin(2)(0)1030271
Bin(1)(2)012831
Bin(1)(2)1018391
Bin(1)(1)012641
Bin(1)(1)1019201
Bin(1)(0)013391
Bin(1)(0)1019121
Bin(0)(2)013581
Bin(0)(2)1018691
Bin(0)(1)012981
Bin(0)(1)1019771
Bin(0)(0)0119881
Bin(0)(0)103471

Signal:

 L0_VALID
ElementFromToCountThreshold
Bin(7)013331
Bin(7)10555011
Bin(6)013061
Bin(6)10555281
Bin(5)013271
Bin(5)10555071
Bin(4)013021
Bin(4)10555321
Bin(3)0113021
Bin(3)10540371
Bin(2)0110951
Bin(2)10542441
Bin(1)0195141
Bin(1)10448841
Bin(0)01155821
Bin(0)10388161

Signal:

 L1_PRIO
ElementFromToCountThreshold
Bin(3)(2)01801
Bin(3)(2)10337111
Bin(3)(1)01791
Bin(3)(1)10337241
Bin(3)(0)011231
Bin(3)(0)10337811
Bin(2)(2)01951
Bin(2)(2)10337341
Bin(2)(1)011031
Bin(2)(1)10337611
Bin(2)(0)011011
Bin(2)(0)10337591
Bin(1)(2)012341
Bin(1)(2)10325921
Bin(1)(1)012711
Bin(1)(1)10327681
Bin(1)(0)013241
Bin(1)(0)10326841
Bin(0)(2)015771
Bin(0)(2)1020981
Bin(0)(1)017231
Bin(0)(1)1022851
Bin(0)(0)01150011
Bin(0)(0)10165481

Signal:

 L1_VALID
ElementFromToCountThreshold
Bin(3)015011
Bin(3)10524591
Bin(2)014671
Bin(2)10524931
Bin(1)0119361
Bin(1)10510241
Bin(0)01230621
Bin(0)10298981

Signal:

 L1_WINNER
ElementFromToCountThreshold
Bin(3)01344451
Bin(3)102771
Bin(2)01344351
Bin(2)102871
Bin(1)01336871
Bin(1)1010351
Bin(0)01195341
Bin(0)10151881

Signal:

 L2_PRIO
ElementFromToCountThreshold
Bin(1)(2)01911
Bin(1)(2)10332491
Bin(1)(1)011041
Bin(1)(1)10332851
Bin(1)(0)011211
Bin(1)(0)10332971
Bin(0)(2)015571
Bin(0)(2)1021131
Bin(0)(1)018301
Bin(0)(1)1024151
Bin(0)(0)01153201
Bin(0)(0)10168851

Signal:

 L2_VALID
ElementFromToCountThreshold
Bin(1)018971
Bin(1)10519421
Bin(0)01247721
Bin(0)10280671

Signal:

 L2_WINNER
ElementFromToCountThreshold
Bin(1)01480641
Bin(1)104691
Bin(0)01254821
Bin(0)10230511

Signal:

 L3_VALID
FromToCountThreshold
Bin01272031
Bin10272031

Signal:

 L3_WINNER
FromToCountThreshold
Bin018891
Bin1024901

Uncovered expressions:

Excluded expressions:

"and" expression on lines 293 to 294:

 l2_valid(1 downto 0) = "11" and unsigned(l2_prio(1)) > unsigned(l2_prio(0)) 
 <-----------LHS----------->     <-------------------RHS-------------------> 

LHSRHSCountThresholdExcluded due to
BinFalseTrue01Unreachable

Covered expressions:

"=" expression on line 288:

 l3_valid = '1' 
Evaluated toCountThreshold
BinFalse288041
BinTrue272031

"and" expression on lines 293 to 294:

 l2_valid(1 downto 0) = "11" and unsigned(l2_prio(1)) > unsigned(l2_prio(0)) 
 <-----------LHS----------->     <-------------------RHS-------------------> 

LHSRHSCountThreshold
BinTrueFalse571
BinTrueTrue371

"=" expression on line 310:

 l3_winner = LOWER_TREE 
Evaluated toCountThreshold
BinFalse34451
BinTrue815721

"=" expression on line 311:

 l2_winner(0) = LOWER_TREE 
Evaluated toCountThreshold
BinFalse431521
BinTrue384201

"=" expression on line 312:

 l1_winner(0) = LOWER_TREE 
Evaluated toCountThreshold
BinFalse232701
BinTrue151501

"=" expression on line 318:

 l1_winner(1) = LOWER_TREE 
Evaluated toCountThreshold
BinFalse421321
BinTrue10201

"=" expression on line 325:

 l2_winner(1) = LOWER_TREE 
Evaluated toCountThreshold
BinFalse27551
BinTrue6901

"=" expression on line 326:

 l1_winner(2) = LOWER_TREE 
Evaluated toCountThreshold
BinFalse4411
BinTrue2491

"=" expression on line 332:

 l1_winner(3) = LOWER_TREE 
Evaluated toCountThreshold
BinFalse24941
BinTrue2611

Uncovered FSM states:

Excluded FSM states:

Covered FSM states:

Uncovered functional coverage:

Excluded functional coverage:

Covered functional coverage: