NVC code coverage report

Hierarchy

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.I_DUT.I_MAC_TOP.I_MAC_PC_TOP.I_MAC_PC_RX_SHIFT_REG.I_SHIFT_REG_BYTE.G_BYTE_SHIFT_REG(0).G_FIRST_BYTE

File:  /__w/CTU-CAN-FD/CTU-CAN-FD/src/common_blocks/shift_reg_byte.vhd


Current Instance Statement Branch Toggle Expression FSM state Functional Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.I_DUT.I_MAC_TOP.I_MAC_PC_TOP.I_MAC_PC_RX_SHIFT_REG.I_SHIFT_REG_BYTE.G_BYTE_SHIFT_REG(0).G_FIRST_BYTE 100.0 % (1/1) N.A. N.A. N.A. N.A. N.A. 100.0 % (1/1)

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.


Statement Branch Toggle Expression FSM state Functional

Uncovered statements:

Excluded statements:

Covered statements:

Signal assignment statement on line 138:

138:            shift_reg_in(i) <= input; 
Count: 2799074
Threshold: 1

Uncovered branches:

Excluded branches:

Covered branches:

Uncovered toggles:

Excluded toggles:

Covered toggles:

Uncovered expressions:

Excluded expressions:

Covered expressions:

Uncovered FSM states:

Excluded FSM states:

Covered FSM states:

Uncovered functional coverage:

Excluded functional coverage:

Covered functional coverage: