NVC code coverage report

Hierarchy

Instance: CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.I_DUT.I_BM_TOP.I_BM_SAMPLE_MUX

File:  /__w/CTU-CAN-FD/CTU-CAN-FD/src/bus_management/bm_top.vhd


Current Instance Statement Branch Toggle Expression FSM state Functional Average
CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.I_DUT.I_BM_TOP.I_BM_SAMPLE_MUX 100.0 % (11/11) 100.0 % (10/10) 100.0 % (24/24) 100.0 % (6/6) N.A. N.A. 100.0 % (51/51)

Details:

The limit of printed items was reached (5000). Total 260336 items are not displayed.


Statement Branch Toggle Expression FSM state Functional

Uncovered statements:

Excluded statements:

Covered statements:

If statement on lines 139 to 140:

139:    sample <= sample_sec when (sp_control = SECONDARY_SAMPLE) else 
140:              rx_trigger; 

Count: 46049961
Threshold: 1

Signal assignment statement on line 139:

139:    sample <= sample_sec when (sp_control = SECONDARY_SAMPLE) else 
Count: 1049647
Threshold: 1

Signal assignment statement on line 140:

140:              rx_trigger
Count: 45000314
Threshold: 1

If statement on lines 145 to 146:

145:    prev_sample_d <= data_rx_synced when (sample = '1') else 
146:                     prev_sample_q; 

Count: 50950999
Threshold: 1

Signal assignment statement on line 145:

145:    prev_sample_d <= data_rx_synced when (sample = '1') else 
Count: 25463435
Threshold: 1

Signal assignment statement on line 146:

146:                     prev_sample_q
Count: 25487564
Threshold: 1

If statement on lines 150 to 156:

150:        if (rst_n = '0') then 
151:            prev_sample_q <= RECESSIVE; 
...
155:            end if; 
156:        end if; 

Count: 1096781321
Threshold: 1

Signal assignment statement on line 151:

151:            prev_sample_q <= RECESSIVE; 
Count: 2422674
Threshold: 1

If statement on lines 153 to 155:

153:            if (mr_settings_ena = '1') then 
154:                prev_sample_q <= prev_sample_d; 
155:            end if; 

Count: 547174334
Threshold: 1

Signal assignment statement on line 154:

154:                prev_sample_q <= prev_sample_d; 
Count: 547169493
Threshold: 1

Signal assignment statement on line 162:

162:    prev_sample <= prev_sample_q
Count: 2798076
Threshold: 1

Uncovered branches:

Excluded branches:

Covered branches:

"if" / "when" / "else" condition on line 139:

139:    sample <= sample_sec when (sp_control = SECONDARY_SAMPLE) else 
Evaluated toCountThreshold
BinTrue10496471
BinFalse450003141

"if" / "when" / "else" condition on line 145:

145:    prev_sample_d <= data_rx_synced when (sample = '1') else 
Evaluated toCountThreshold
BinTrue254634351
BinFalse254875641

"if" / "when" / "else" condition on line 150:

150:        if (rst_n = '0') then 
Evaluated toCountThreshold
BinTrue24226741
BinFalse10943586471

"if" / "when" / "else" condition on line 152:

152:        elsif (rising_edge(clk_sys)) then 
Evaluated toCountThreshold
BinTrue5471743341
BinFalse5471843131

"if" / "when" / "else" condition on line 153:

153:            if (mr_settings_ena = '1') then 
Evaluated toCountThreshold
BinTrue5471694931
BinFalse48411

Uncovered toggles:

Excluded toggles:

Port:

 CLK_SYS
FromToCountThresholdExcluded due to
Bin0101Exclude file
Bin1001Exclude file

Port:

 RST_N
FromToCountThresholdExcluded due to
Bin0101Exclude file
Bin1001Exclude file

Port:

 SP_CONTROL
ElementFromToCountThresholdExcluded due to
Bin(1)0101Exclude file
Bin(1)1001Exclude file
Bin(0)0101Exclude file
Bin(0)1001Exclude file

Port:

 RX_TRIGGER
FromToCountThresholdExcluded due to
Bin0101Exclude file
Bin1001Exclude file

Port:

 SAMPLE_SEC
FromToCountThresholdExcluded due to
Bin0101Exclude file
Bin1001Exclude file

Port:

 MR_SETTINGS_ENA
FromToCountThresholdExcluded due to
Bin0101Exclude file
Bin1001Exclude file

Port:

 DATA_RX_SYNCED
FromToCountThresholdExcluded due to
Bin0101Exclude file
Bin1001Exclude file

Covered toggles:

Port:

 PREV_SAMPLE
FromToCountThreshold
Bin0113990381
Bin1013974371

Signal:

 SAMPLE
FromToCountThreshold
Bin01226675101
Bin10226691111

Signal:

 PREV_SAMPLE_D
FromToCountThreshold
Bin0124544511
Bin1024528501

Signal:

 PREV_SAMPLE_Q
FromToCountThreshold
Bin0113990381
Bin1013974371

Uncovered expressions:

Excluded expressions:

Covered expressions:

"=" expression on line 145:

 sample = '1' 
Evaluated toCountThreshold
BinFalse254875641
BinTrue254634351

"=" expression on line 150:

 rst_n = '0' 
Evaluated toCountThreshold
BinFalse10943586471
BinTrue24226741

"=" expression on line 153:

 mr_settings_ena = '1' 
Evaluated toCountThreshold
BinFalse48411
BinTrue5471694931

Uncovered FSM states:

Excluded FSM states:

Covered FSM states:

Uncovered functional coverage:

Excluded functional coverage:

Covered functional coverage: