| Nested Instances | Statement | Branch | Toggle | Expression | FSM state | Functional | Average |
|---|---|---|---|---|---|---|---|
| G_FIRST_BYTE | 100.0 % (1/1) | N.A. | N.A. | N.A. | N.A. | N.A. | 100.0 % (1/1) |
| Current Instance | Statement | Branch | Toggle | Expression | FSM state | Functional | Average |
|---|---|---|---|---|---|---|---|
| CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.I_DUT.I_MAC_TOP.I_MAC_PC_TOP.I_MAC_PC_RX_SHIFT_REG.I_SHIFT_REG_BYTE.G_BYTE_SHIFT_REG(0) | 100.0 % (5/5) | 100.0 % (6/6) | N.A. | 100.0 % (4/4) | N.A. | N.A. | 100.0 % (15/15) |
| Statement | Branch | Toggle | Expression | FSM state | Functional |
|---|
153: if (rst_n = G_RESET_POLARITY) then
154: shift_reg_q(i) <= (others => '0'); -- G_RESET_VALUE(i * 8 + 7 downto i * 8);
...
159: end if;
160: end if; 154: shift_reg_q(i) <= (others => '0'); -- G_RESET_VALUE(i * 8 + 7 downto i * 8); 156: if (byte_clock_ena(i) = '1') then
157: shift_reg_q(i) <= shift_reg_q(i)(6 downto 0) &
158: shift_reg_in(i);
159: end if; 157: shift_reg_q(i) <= shift_reg_q(i)(6 downto 0) &
158: shift_reg_in(i); 164: reg_stat(i * 8 + 7 downto i * 8) <= shift_reg_q(i); 153: if (rst_n = G_RESET_POLARITY) then | Evaluated to | Count | Threshold | |
|---|---|---|---|
| Bin | True | 2603493 | 1 |
| Bin | False | 1094289729 | 1 |
155: elsif (rising_edge(clk)) then | Evaluated to | Count | Threshold | |
|---|---|---|---|
| Bin | True | 547111900 | 1 |
| Bin | False | 547177829 | 1 |
156: if (byte_clock_ena(i) = '1') then | Evaluated to | Count | Threshold | |
|---|---|---|---|
| Bin | True | 2891752 | 1 |
| Bin | False | 544220148 | 1 |
rst_n = G_RESET_POLARITY | Evaluated to | Count | Threshold | |
|---|---|---|---|
| Bin | False | 1094289729 | 1 |
| Bin | True | 2603493 | 1 |
byte_clock_ena(i) = '1' | Evaluated to | Count | Threshold | |
|---|---|---|---|
| Bin | False | 544220148 | 1 |
| Bin | True | 2891752 | 1 |