NVC code coverage report

Signal assignment statement on line 608:

608:    test_probe.rx_trigger_nbs <= pc_rx_trigger; 
Count: 20805332
Threshold: 1

---

Signal assignment statement on line 609:

609:    test_probe.rx_trigger_wbs <= rx_triggers(0); 
Count: 22849620
Threshold: 1

---

Signal assignment statement on line 610:

610:    test_probe.tx_trigger <= tx_trigger; 
Count: 22867275
Threshold: 1

---

Signal assignment statement on line 624:

624:    rst_n_out <= rst_n_sync; 
Count: 15953
Threshold: 1

Port:

 CLK_SYS

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 RST_N

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 SCAN_MODE

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 DATA_IN

	Element	From	To	Count	Threshold	Excluded due to
Bin	(31)	0	1	0	1	Exclude file
Bin	(31)	1	0	0	1	Exclude file
Bin	(30)	0	1	0	1	Exclude file
Bin	(30)	1	0	0	1	Exclude file
Bin	(29)	0	1	0	1	Exclude file
Bin	(29)	1	0	0	1	Exclude file
Bin	(28)	0	1	0	1	Exclude file
Bin	(28)	1	0	0	1	Exclude file
Bin	(27)	0	1	0	1	Exclude file
Bin	(27)	1	0	0	1	Exclude file
Bin	(26)	0	1	0	1	Exclude file
Bin	(26)	1	0	0	1	Exclude file
Bin	(25)	0	1	0	1	Exclude file
Bin	(25)	1	0	0	1	Exclude file
Bin	(24)	0	1	0	1	Exclude file
Bin	(24)	1	0	0	1	Exclude file
Bin	(23)	0	1	0	1	Exclude file
Bin	(23)	1	0	0	1	Exclude file
Bin	(22)	0	1	0	1	Exclude file
Bin	(22)	1	0	0	1	Exclude file
Bin	(21)	0	1	0	1	Exclude file
Bin	(21)	1	0	0	1	Exclude file
Bin	(20)	0	1	0	1	Exclude file
Bin	(20)	1	0	0	1	Exclude file
Bin	(19)	0	1	0	1	Exclude file
Bin	(19)	1	0	0	1	Exclude file
Bin	(18)	0	1	0	1	Exclude file
Bin	(18)	1	0	0	1	Exclude file
Bin	(17)	0	1	0	1	Exclude file
Bin	(17)	1	0	0	1	Exclude file
Bin	(16)	0	1	0	1	Exclude file
Bin	(16)	1	0	0	1	Exclude file
Bin	(15)	0	1	0	1	Exclude file
Bin	(15)	1	0	0	1	Exclude file
Bin	(14)	0	1	0	1	Exclude file
Bin	(14)	1	0	0	1	Exclude file
Bin	(13)	0	1	0	1	Exclude file
Bin	(13)	1	0	0	1	Exclude file
Bin	(12)	0	1	0	1	Exclude file
Bin	(12)	1	0	0	1	Exclude file
Bin	(11)	0	1	0	1	Exclude file
Bin	(11)	1	0	0	1	Exclude file
Bin	(10)	0	1	0	1	Exclude file
Bin	(10)	1	0	0	1	Exclude file
Bin	(9)	0	1	0	1	Exclude file
Bin	(9)	1	0	0	1	Exclude file
Bin	(8)	0	1	0	1	Exclude file
Bin	(8)	1	0	0	1	Exclude file
Bin	(7)	0	1	0	1	Exclude file
Bin	(7)	1	0	0	1	Exclude file
Bin	(6)	0	1	0	1	Exclude file
Bin	(6)	1	0	0	1	Exclude file
Bin	(5)	0	1	0	1	Exclude file
Bin	(5)	1	0	0	1	Exclude file
Bin	(4)	0	1	0	1	Exclude file
Bin	(4)	1	0	0	1	Exclude file
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

---

Port:

 ADRESS

	Element	From	To	Count	Threshold	Excluded due to
Bin	(15)	0	1	0	1	Exclude file
Bin	(15)	1	0	0	1	Exclude file
Bin	(14)	0	1	0	1	Exclude file
Bin	(14)	1	0	0	1	Exclude file
Bin	(13)	0	1	0	1	Exclude file
Bin	(13)	1	0	0	1	Exclude file
Bin	(12)	0	1	0	1	Exclude file
Bin	(12)	1	0	0	1	Exclude file
Bin	(11)	0	1	0	1	Exclude file
Bin	(11)	1	0	0	1	Exclude file
Bin	(10)	0	1	0	1	Exclude file
Bin	(10)	1	0	0	1	Exclude file
Bin	(9)	0	1	0	1	Exclude file
Bin	(9)	1	0	0	1	Exclude file
Bin	(8)	0	1	0	1	Exclude file
Bin	(8)	1	0	0	1	Exclude file
Bin	(7)	0	1	0	1	Exclude file
Bin	(7)	1	0	0	1	Exclude file
Bin	(6)	0	1	0	1	Exclude file
Bin	(6)	1	0	0	1	Exclude file
Bin	(5)	0	1	0	1	Exclude file
Bin	(5)	1	0	0	1	Exclude file
Bin	(4)	0	1	0	1	Exclude file
Bin	(4)	1	0	0	1	Exclude file
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

---

Port:

 SCS

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 SRD

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 SWR

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 SBE

	Element	From	To	Count	Threshold	Excluded due to
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

---

Port:

 CAN_RX

	From	To	Count	Threshold	Excluded due to
Bin	0	1	0	1	Exclude file
Bin	1	0	0	1	Exclude file

---

Port:

 TIMESTAMP

	Element	From	To	Count	Threshold	Excluded due to
Bin	(63)	0	1	0	1	Exclude file
Bin	(63)	1	0	0	1	Exclude file
Bin	(62)	0	1	0	1	Exclude file
Bin	(62)	1	0	0	1	Exclude file
Bin	(61)	0	1	0	1	Exclude file
Bin	(61)	1	0	0	1	Exclude file
Bin	(60)	0	1	0	1	Exclude file
Bin	(60)	1	0	0	1	Exclude file
Bin	(59)	0	1	0	1	Exclude file
Bin	(59)	1	0	0	1	Exclude file
Bin	(58)	0	1	0	1	Exclude file
Bin	(58)	1	0	0	1	Exclude file
Bin	(57)	0	1	0	1	Exclude file
Bin	(57)	1	0	0	1	Exclude file
Bin	(56)	0	1	0	1	Exclude file
Bin	(56)	1	0	0	1	Exclude file
Bin	(55)	0	1	0	1	Exclude file
Bin	(55)	1	0	0	1	Exclude file
Bin	(54)	0	1	0	1	Exclude file
Bin	(54)	1	0	0	1	Exclude file
Bin	(53)	0	1	0	1	Exclude file
Bin	(53)	1	0	0	1	Exclude file
Bin	(52)	0	1	0	1	Exclude file
Bin	(52)	1	0	0	1	Exclude file
Bin	(51)	0	1	0	1	Exclude file
Bin	(51)	1	0	0	1	Exclude file
Bin	(50)	0	1	0	1	Exclude file
Bin	(50)	1	0	0	1	Exclude file
Bin	(49)	0	1	0	1	Exclude file
Bin	(49)	1	0	0	1	Exclude file
Bin	(48)	0	1	0	1	Exclude file
Bin	(48)	1	0	0	1	Exclude file
Bin	(47)	0	1	0	1	Exclude file
Bin	(47)	1	0	0	1	Exclude file
Bin	(46)	0	1	0	1	Exclude file
Bin	(46)	1	0	0	1	Exclude file
Bin	(45)	0	1	0	1	Exclude file
Bin	(45)	1	0	0	1	Exclude file
Bin	(44)	0	1	0	1	Exclude file
Bin	(44)	1	0	0	1	Exclude file
Bin	(43)	0	1	0	1	Exclude file
Bin	(43)	1	0	0	1	Exclude file
Bin	(42)	0	1	0	1	Exclude file
Bin	(42)	1	0	0	1	Exclude file
Bin	(41)	0	1	0	1	Exclude file
Bin	(41)	1	0	0	1	Exclude file
Bin	(40)	0	1	0	1	Exclude file
Bin	(40)	1	0	0	1	Exclude file
Bin	(39)	0	1	0	1	Exclude file
Bin	(39)	1	0	0	1	Exclude file
Bin	(38)	0	1	0	1	Exclude file
Bin	(38)	1	0	0	1	Exclude file
Bin	(37)	0	1	0	1	Exclude file
Bin	(37)	1	0	0	1	Exclude file
Bin	(36)	0	1	0	1	Exclude file
Bin	(36)	1	0	0	1	Exclude file
Bin	(35)	0	1	0	1	Exclude file
Bin	(35)	1	0	0	1	Exclude file
Bin	(34)	0	1	0	1	Exclude file
Bin	(34)	1	0	0	1	Exclude file
Bin	(33)	0	1	0	1	Exclude file
Bin	(33)	1	0	0	1	Exclude file
Bin	(32)	0	1	0	1	Exclude file
Bin	(32)	1	0	0	1	Exclude file
Bin	(31)	0	1	0	1	Exclude file
Bin	(31)	1	0	0	1	Exclude file
Bin	(30)	0	1	0	1	Exclude file
Bin	(30)	1	0	0	1	Exclude file
Bin	(29)	0	1	0	1	Exclude file
Bin	(29)	1	0	0	1	Exclude file
Bin	(28)	0	1	0	1	Exclude file
Bin	(28)	1	0	0	1	Exclude file
Bin	(27)	0	1	0	1	Exclude file
Bin	(27)	1	0	0	1	Exclude file
Bin	(26)	0	1	0	1	Exclude file
Bin	(26)	1	0	0	1	Exclude file
Bin	(25)	0	1	0	1	Exclude file
Bin	(25)	1	0	0	1	Exclude file
Bin	(24)	0	1	0	1	Exclude file
Bin	(24)	1	0	0	1	Exclude file
Bin	(23)	0	1	0	1	Exclude file
Bin	(23)	1	0	0	1	Exclude file
Bin	(22)	0	1	0	1	Exclude file
Bin	(22)	1	0	0	1	Exclude file
Bin	(21)	0	1	0	1	Exclude file
Bin	(21)	1	0	0	1	Exclude file
Bin	(20)	0	1	0	1	Exclude file
Bin	(20)	1	0	0	1	Exclude file
Bin	(19)	0	1	0	1	Exclude file
Bin	(19)	1	0	0	1	Exclude file
Bin	(18)	0	1	0	1	Exclude file
Bin	(18)	1	0	0	1	Exclude file
Bin	(17)	0	1	0	1	Exclude file
Bin	(17)	1	0	0	1	Exclude file
Bin	(16)	0	1	0	1	Exclude file
Bin	(16)	1	0	0	1	Exclude file
Bin	(15)	0	1	0	1	Exclude file
Bin	(15)	1	0	0	1	Exclude file
Bin	(14)	0	1	0	1	Exclude file
Bin	(14)	1	0	0	1	Exclude file
Bin	(13)	0	1	0	1	Exclude file
Bin	(13)	1	0	0	1	Exclude file
Bin	(12)	0	1	0	1	Exclude file
Bin	(12)	1	0	0	1	Exclude file
Bin	(11)	0	1	0	1	Exclude file
Bin	(11)	1	0	0	1	Exclude file
Bin	(10)	0	1	0	1	Exclude file
Bin	(10)	1	0	0	1	Exclude file
Bin	(9)	0	1	0	1	Exclude file
Bin	(9)	1	0	0	1	Exclude file
Bin	(8)	0	1	0	1	Exclude file
Bin	(8)	1	0	0	1	Exclude file
Bin	(7)	0	1	0	1	Exclude file
Bin	(7)	1	0	0	1	Exclude file
Bin	(6)	0	1	0	1	Exclude file
Bin	(6)	1	0	0	1	Exclude file
Bin	(5)	0	1	0	1	Exclude file
Bin	(5)	1	0	0	1	Exclude file
Bin	(4)	0	1	0	1	Exclude file
Bin	(4)	1	0	0	1	Exclude file
Bin	(3)	0	1	0	1	Exclude file
Bin	(3)	1	0	0	1	Exclude file
Bin	(2)	0	1	0	1	Exclude file
Bin	(2)	1	0	0	1	Exclude file
Bin	(1)	0	1	0	1	Exclude file
Bin	(1)	1	0	0	1	Exclude file
Bin	(0)	0	1	0	1	Exclude file
Bin	(0)	1	0	0	1	Exclude file

Port:

 RST_N_OUT

	From	To	Count	Threshold
Bin	0	1	7176	1
Bin	1	0	7176	1

---

Port:

 DATA_OUT

	Element	From	To	Count	Threshold
Bin	(31)	0	1	22677	1
Bin	(31)	1	0	24278	1
Bin	(30)	0	1	24476	1
Bin	(30)	1	0	26077	1
Bin	(29)	0	1	24634	1
Bin	(29)	1	0	26235	1
Bin	(28)	0	1	31553	1
Bin	(28)	1	0	33154	1
Bin	(27)	0	1	35413	1
Bin	(27)	1	0	37014	1
Bin	(26)	0	1	31003	1
Bin	(26)	1	0	32604	1
Bin	(25)	0	1	49405	1
Bin	(25)	1	0	51006	1
Bin	(24)	0	1	39545	1
Bin	(24)	1	0	41146	1
Bin	(23)	0	1	49408	1
Bin	(23)	1	0	51009	1
Bin	(22)	0	1	123548	1
Bin	(22)	1	0	125149	1
Bin	(21)	0	1	39315	1
Bin	(21)	1	0	40916	1
Bin	(20)	0	1	52815	1
Bin	(20)	1	0	54416	1
Bin	(19)	0	1	49857	1
Bin	(19)	1	0	51458	1
Bin	(18)	0	1	303808	1
Bin	(18)	1	0	305409	1
Bin	(17)	0	1	120142	1
Bin	(17)	1	0	121743	1
Bin	(16)	0	1	134855	1
Bin	(16)	1	0	136456	1
Bin	(15)	0	1	168376	1
Bin	(15)	1	0	169977	1
Bin	(14)	0	1	577695	1
Bin	(14)	1	0	579296	1
Bin	(13)	0	1	131940	1
Bin	(13)	1	0	133541	1
Bin	(12)	0	1	189641	1
Bin	(12)	1	0	191242	1
Bin	(11)	0	1	148472	1
Bin	(11)	1	0	150073	1
Bin	(10)	0	1	1556677	1
Bin	(10)	1	0	1558278	1
Bin	(9)	0	1	347871	1
Bin	(9)	1	0	349472	1
Bin	(8)	0	1	3294824	1
Bin	(8)	1	0	3296425	1
Bin	(7)	0	1	971042	1
Bin	(7)	1	0	972643	1
Bin	(6)	0	1	3108317	1
Bin	(6)	1	0	3109918	1
Bin	(5)	0	1	1993440	1
Bin	(5)	1	0	1995041	1
Bin	(4)	0	1	3695765	1
Bin	(4)	1	0	3697366	1
Bin	(3)	0	1	4245985	1
Bin	(3)	1	0	4247586	1
Bin	(2)	0	1	949010	1
Bin	(2)	1	0	950611	1
Bin	(1)	0	1	1555900	1
Bin	(1)	1	0	1557501	1
Bin	(0)	0	1	1946672	1
Bin	(0)	1	0	1948273	1

---

Port:

 INT

	From	To	Count	Threshold
Bin	0	1	1840	1
Bin	1	0	1840	1

---

Port:

 CAN_TX

	From	To	Count	Threshold
Bin	0	1	638480	1
Bin	1	0	636881	1

---

Port:

 TEST_PROBE

	Element	From	To	Count	Threshold
Bin	RX_TRIGGER_NBS	0	1	10401065	1
Bin	RX_TRIGGER_NBS	1	0	10402666	1
Bin	RX_TRIGGER_WBS	0	1	11423209	1
Bin	RX_TRIGGER_WBS	1	0	11424810	1
Bin	TX_TRIGGER	0	1	11432038	1
Bin	TX_TRIGGER	1	0	11433636	1

---

Signal:

 RST_N_SYNC

	From	To	Count	Threshold
Bin	0	1	7176	1
Bin	1	0	7176	1

---

Signal:

 RES_CORE_N

	From	To	Count	Threshold
Bin	0	1	8084	1
Bin	1	0	8072	1

---

Signal:

 RES_SOFT_N

	From	To	Count	Threshold
Bin	0	1	9645	1
Bin	1	0	8044	1

---

Signal:

 SP_CONTROL

	Element	From	To	Count	Threshold
Bin	(1)	0	1	3751	1
Bin	(1)	1	0	5352	1
Bin	(0)	0	1	24995	1
Bin	(0)	1	0	26596	1

---

Signal:

 RX_FULL

	From	To	Count	Threshold
Bin	0	1	20	1
Bin	1	0	1621	1

---

Signal:

 RX_EMPTY

	From	To	Count	Threshold
Bin	0	1	8950	1
Bin	1	0	8952	1

---

Signal:

 RX_FRAME_COUNT

	Element	From	To	Count	Threshold
Bin	(10)	0	1	4	1
Bin	(10)	1	0	169	1
Bin	(9)	0	1	5	1
Bin	(9)	1	0	170	1
Bin	(8)	0	1	10	1
Bin	(8)	1	0	175	1
Bin	(7)	0	1	21	1
Bin	(7)	1	0	186	1
Bin	(6)	0	1	43	1
Bin	(6)	1	0	208	1
Bin	(5)	0	1	98	1
Bin	(5)	1	0	758	1
Bin	(4)	0	1	195	1
Bin	(4)	1	0	855	1
Bin	(3)	0	1	403	1
Bin	(3)	1	0	2004	1
Bin	(2)	0	1	843	1
Bin	(2)	1	0	2444	1
Bin	(1)	0	1	2528	1
Bin	(1)	1	0	4129	1
Bin	(0)	0	1	11398	1
Bin	(0)	1	0	12997	1

---

Signal:

 RX_MEM_FREE

	Element	From	To	Count	Threshold
Bin	(12)	0	1	1206	1
Bin	(12)	1	0	1041	1
Bin	(11)	0	1	1043	1
Bin	(11)	1	0	1208	1
Bin	(10)	0	1	1050	1
Bin	(10)	1	0	1215	1
Bin	(9)	0	1	1064	1
Bin	(9)	1	0	1229	1
Bin	(8)	0	1	1092	1
Bin	(8)	1	0	1257	1
Bin	(7)	0	1	4484	1
Bin	(7)	1	0	4154	1
Bin	(6)	0	1	4111	1
Bin	(6)	1	0	4771	1
Bin	(5)	0	1	8775	1
Bin	(5)	1	0	8496	1
Bin	(4)	0	1	8358	1
Bin	(4)	1	0	9957	1
Bin	(3)	0	1	9825	1
Bin	(3)	1	0	11424	1
Bin	(2)	0	1	12159	1
Bin	(2)	1	0	13758	1
Bin	(1)	0	1	15624	1
Bin	(1)	1	0	17225	1
Bin	(0)	0	1	26860	1
Bin	(0)	1	0	28461	1

---

Signal:

 RX_READ_POINTER

	Element	From	To	Count	Threshold
Bin	(11)	0	1	3	1
Bin	(11)	1	0	168	1
Bin	(10)	0	1	5	1
Bin	(10)	1	0	170	1
Bin	(9)	0	1	11	1
Bin	(9)	1	0	176	1
Bin	(8)	0	1	22	1
Bin	(8)	1	0	187	1
Bin	(7)	0	1	43	1
Bin	(7)	1	0	208	1
Bin	(6)	0	1	198	1
Bin	(6)	1	0	858	1
Bin	(5)	0	1	431	1
Bin	(5)	1	0	1091	1
Bin	(4)	0	1	1555	1
Bin	(4)	1	0	3156	1
Bin	(3)	0	1	3134	1
Bin	(3)	1	0	4735	1
Bin	(2)	0	1	6538	1
Bin	(2)	1	0	8139	1
Bin	(1)	0	1	12798	1
Bin	(1)	1	0	14399	1
Bin	(0)	0	1	25602	1
Bin	(0)	1	0	27203	1

---

Signal:

 RX_WRITE_POINTER

	Element	From	To	Count	Threshold
Bin	(11)	0	1	6	1
Bin	(11)	1	0	171	1
Bin	(10)	0	1	11	1
Bin	(10)	1	0	176	1
Bin	(9)	0	1	23	1
Bin	(9)	1	0	188	1
Bin	(8)	0	1	46	1
Bin	(8)	1	0	211	1
Bin	(7)	0	1	91	1
Bin	(7)	1	0	256	1
Bin	(6)	0	1	304	1
Bin	(6)	1	0	964	1
Bin	(5)	0	1	663	1
Bin	(5)	1	0	1323	1
Bin	(4)	0	1	1946	1
Bin	(4)	1	0	3547	1
Bin	(3)	0	1	3727	1
Bin	(3)	1	0	5328	1
Bin	(2)	0	1	6176	1
Bin	(2)	1	0	7775	1
Bin	(1)	0	1	1742	1
Bin	(1)	1	0	3343	1
Bin	(0)	0	1	1540	1
Bin	(0)	1	0	3141	1

---

Signal:

 RX_DATA_OVERRUN

	From	To	Count	Threshold
Bin	0	1	31	1
Bin	1	0	1632	1

---

Signal:

 RX_MOF

	From	To	Count	Threshold
Bin	0	1	10859	1
Bin	1	0	10859	1

---

Signal:

 RX_PARITY_ERROR

	From	To	Count	Threshold
Bin	0	1	13	1
Bin	1	0	1614	1

---

Signal:

 TXTB_PORT_A_DATA_IN

	Element	From	To	Count	Threshold
Bin	(31)	0	1	61752	1
Bin	(31)	1	0	1036930	1
Bin	(30)	0	1	65395	1
Bin	(30)	1	0	1033287	1
Bin	(29)	0	1	63597	1
Bin	(29)	1	0	1035085	1
Bin	(28)	0	1	89734	1
Bin	(28)	1	0	1008948	1
Bin	(27)	0	1	82551	1
Bin	(27)	1	0	1016131	1
Bin	(26)	0	1	76670	1
Bin	(26)	1	0	1022012	1
Bin	(25)	0	1	85744	1
Bin	(25)	1	0	1012938	1
Bin	(24)	0	1	79509	1
Bin	(24)	1	0	1019173	1
Bin	(23)	0	1	70820	1
Bin	(23)	1	0	1027862	1
Bin	(22)	0	1	106620	1
Bin	(22)	1	0	992062	1
Bin	(21)	0	1	75624	1
Bin	(21)	1	0	1023058	1
Bin	(20)	0	1	81965	1
Bin	(20)	1	0	1016717	1
Bin	(19)	0	1	112715	1
Bin	(19)	1	0	985967	1
Bin	(18)	0	1	132387	1
Bin	(18)	1	0	966295	1
Bin	(17)	0	1	124545	1
Bin	(17)	1	0	974137	1
Bin	(16)	0	1	193609	1
Bin	(16)	1	0	905073	1
Bin	(15)	0	1	74187	1
Bin	(15)	1	0	1024495	1
Bin	(14)	0	1	86222	1
Bin	(14)	1	0	1012460	1
Bin	(13)	0	1	78101	1
Bin	(13)	1	0	1020581	1
Bin	(12)	0	1	78761	1
Bin	(12)	1	0	1019921	1
Bin	(11)	0	1	101401	1
Bin	(11)	1	0	997281	1
Bin	(10)	0	1	118499	1
Bin	(10)	1	0	980183	1
Bin	(9)	0	1	170089	1
Bin	(9)	1	0	928593	1
Bin	(8)	0	1	152135	1
Bin	(8)	1	0	946547	1
Bin	(7)	0	1	127650	1
Bin	(7)	1	0	971032	1
Bin	(6)	0	1	113817	1
Bin	(6)	1	0	984865	1
Bin	(5)	0	1	107012	1
Bin	(5)	1	0	991670	1
Bin	(4)	0	1	164595	1
Bin	(4)	1	0	934087	1
Bin	(3)	0	1	138369	1
Bin	(3)	1	0	960313	1
Bin	(2)	0	1	164416	1
Bin	(2)	1	0	934266	1
Bin	(1)	0	1	237348	1
Bin	(1)	1	0	861334	1
Bin	(0)	0	1	200368	1
Bin	(0)	1	0	898314	1

---

Signal:

 TXTB_PORT_A_PARITY

	From	To	Count	Threshold
Bin	0	1	639738	1
Bin	1	0	156403	1

---

Signal:

 TXTB_PORT_A_ADDRESS

	Element	From	To	Count	Threshold
Bin	(4)	0	1	327597	1
Bin	(4)	1	0	27535839	1
Bin	(3)	0	1	578989	1
Bin	(3)	1	0	27284447	1
Bin	(2)	0	1	439205	1
Bin	(2)	1	0	27424231	1
Bin	(1)	0	1	27080832	1
Bin	(1)	1	0	782604	1
Bin	(0)	0	1	17705660	1
Bin	(0)	1	0	10157776	1

---

Signal:

 TXTB_PORT_A_CS

	Element	From	To	Count	Threshold
Bin	(7)	0	1	11201	1
Bin	(7)	1	0	183742	1
Bin	(6)	0	1	11325	1
Bin	(6)	1	0	183618	1
Bin	(5)	0	1	11146	1
Bin	(5)	1	0	183797	1
Bin	(4)	0	1	11287	1
Bin	(4)	1	0	183656	1
Bin	(3)	0	1	45347	1
Bin	(3)	1	0	474437	1
Bin	(2)	0	1	44898	1
Bin	(2)	1	0	474886	1
Bin	(1)	0	1	127926	1
Bin	(1)	1	0	727997	1
Bin	(0)	0	1	164031	1
Bin	(0)	1	0	691892	1

---

Signal:

 TXTB_PORT_A_BE

	Element	From	To	Count	Threshold
Bin	(3)	0	1	27823416	1
Bin	(3)	1	0	38419	1
Bin	(2)	0	1	27823798	1
Bin	(2)	1	0	38037	1
Bin	(1)	0	1	27725615	1
Bin	(1)	1	0	136220	1
Bin	(0)	0	1	27726843	1
Bin	(0)	1	0	134992	1

---

Signal:

 TXTB_STATE

	Element	From	To	Count	Threshold
Bin	(7)(3)	0	1	9135	1
Bin	(7)(3)	1	0	240	1
Bin	(7)(2)	0	1	450	1
Bin	(7)(2)	1	0	9217	1
Bin	(7)(1)	0	1	290	1
Bin	(7)(1)	1	0	8249	1
Bin	(7)(0)	0	1	372	1
Bin	(7)(0)	1	0	7457	1
Bin	(6)(3)	0	1	8634	1
Bin	(6)(3)	1	0	192	1
Bin	(6)(2)	0	1	857	1
Bin	(6)(2)	1	0	8687	1
Bin	(6)(1)	0	1	350	1
Bin	(6)(1)	1	0	7889	1
Bin	(6)(0)	0	1	335	1
Bin	(6)(0)	1	0	7166	1
Bin	(5)(3)	0	1	8417	1
Bin	(5)(3)	1	0	251	1
Bin	(5)(2)	0	1	1183	1
Bin	(5)(2)	1	0	8491	1
Bin	(5)(1)	0	1	451	1
Bin	(5)(1)	1	0	8199	1
Bin	(5)(0)	0	1	360	1
Bin	(5)(0)	1	0	7313	1
Bin	(4)(3)	0	1	7846	1
Bin	(4)(3)	1	0	204	1
Bin	(4)(2)	0	1	1636	1
Bin	(4)(2)	1	0	7863	1
Bin	(4)(1)	0	1	507	1
Bin	(4)(1)	1	0	7939	1
Bin	(4)(0)	0	1	332	1
Bin	(4)(0)	1	0	7076	1
Bin	(3)(3)	0	1	28755	1
Bin	(3)(3)	1	0	822	1
Bin	(3)(2)	0	1	3230	1
Bin	(3)(2)	1	0	29116	1
Bin	(3)(1)	0	1	1511	1
Bin	(3)(1)	1	0	27028	1
Bin	(3)(0)	0	1	1326	1
Bin	(3)(0)	1	0	24750	1
Bin	(2)(3)	0	1	27372	1
Bin	(2)(3)	1	0	645	1
Bin	(2)(2)	0	1	4621	1
Bin	(2)(2)	1	0	27460	1
Bin	(2)(1)	0	1	1629	1
Bin	(2)(1)	1	0	27590	1
Bin	(2)(0)	0	1	1149	1
Bin	(2)(0)	1	0	25392	1
Bin	(1)(3)	0	1	39075	1
Bin	(1)(3)	1	0	3419	1
Bin	(1)(2)	0	1	23335	1
Bin	(1)(2)	1	0	43609	1
Bin	(1)(1)	0	1	9857	1
Bin	(1)(1)	1	0	44186	1
Bin	(1)(0)	0	1	9916	1
Bin	(1)(0)	1	0	34889	1
Bin	(0)(3)	0	1	15257	1
Bin	(0)(3)	1	0	3712	1
Bin	(0)(2)	0	1	34172	1
Bin	(0)(2)	1	0	24864	1
Bin	(0)(1)	0	1	16564	1
Bin	(0)(1)	1	0	30162	1
Bin	(0)(0)	0	1	16225	1
Bin	(0)(0)	1	0	19141	1

---

Signal:

 TXTB_IS_BB

	Element	From	To	Count	Threshold
Bin	(3)	0	1	7	1
Bin	(3)	1	0	236	1
Bin	(2)	0	1	11	1
Bin	(2)	1	0	232	1
Bin	(1)	0	1	36	1
Bin	(1)	1	0	886	1
Bin	(0)	0	1	89	1
Bin	(0)	1	0	1798	1

---

Signal:

 REC_IDENT

	Element	From	To	Count	Threshold
Bin	(28)	0	1	34977	1
Bin	(28)	1	0	30496	1
Bin	(27)	0	1	25797	1
Bin	(27)	1	0	19553	1
Bin	(26)	0	1	37882	1
Bin	(26)	1	0	32084	1
Bin	(25)	0	1	24607	1
Bin	(25)	1	0	19093	1
Bin	(24)	0	1	39861	1
Bin	(24)	1	0	33029	1
Bin	(23)	0	1	29050	1
Bin	(23)	1	0	21721	1
Bin	(22)	0	1	38673	1
Bin	(22)	1	0	32610	1
Bin	(21)	0	1	28017	1
Bin	(21)	1	0	21307	1
Bin	(20)	0	1	35404	1
Bin	(20)	1	0	30052	1
Bin	(19)	0	1	27909	1
Bin	(19)	1	0	21692	1
Bin	(18)	0	1	39548	1
Bin	(18)	1	0	33394	1
Bin	(17)	0	1	7607	1
Bin	(17)	1	0	74542	1
Bin	(16)	0	1	7853	1
Bin	(16)	1	0	75645	1
Bin	(15)	0	1	7230	1
Bin	(15)	1	0	73728	1
Bin	(14)	0	1	6467	1
Bin	(14)	1	0	72889	1
Bin	(13)	0	1	5983	1
Bin	(13)	1	0	71406	1
Bin	(12)	0	1	5952	1
Bin	(12)	1	0	71054	1
Bin	(11)	0	1	7821	1
Bin	(11)	1	0	75578	1
Bin	(10)	0	1	6986	1
Bin	(10)	1	0	73569	1
Bin	(9)	0	1	8103	1
Bin	(9)	1	0	76097	1
Bin	(8)	0	1	6851	1
Bin	(8)	1	0	73339	1
Bin	(7)	0	1	6667	1
Bin	(7)	1	0	72831	1
Bin	(6)	0	1	6776	1
Bin	(6)	1	0	73783	1
Bin	(5)	0	1	8585	1
Bin	(5)	1	0	77083	1
Bin	(4)	0	1	8155	1
Bin	(4)	1	0	76624	1
Bin	(3)	0	1	7407	1
Bin	(3)	1	0	74440	1
Bin	(2)	0	1	7143	1
Bin	(2)	1	0	74078	1
Bin	(1)	0	1	7990	1
Bin	(1)	1	0	75461	1
Bin	(0)	0	1	8801	1
Bin	(0)	1	0	77239	1

---

Signal:

 REC_DLC

	Element	From	To	Count	Threshold
Bin	(3)	0	1	20131	1
Bin	(3)	1	0	58391	1
Bin	(2)	0	1	21272	1
Bin	(2)	1	0	26763	1
Bin	(1)	0	1	21528	1
Bin	(1)	1	0	26802	1
Bin	(0)	0	1	26961	1
Bin	(0)	1	0	33166	1

---

Signal:

 REC_IDENT_TYPE

	From	To	Count	Threshold
Bin	0	1	18796	1
Bin	1	0	20395	1

---

Signal:

 REC_FRAME_TYPE

	From	To	Count	Threshold
Bin	0	1	28449	1
Bin	1	0	30044	1

---

Signal:

 REC_LBPF

	From	To	Count	Threshold
Bin	0	1	180	1
Bin	1	0	1781	1

---

Signal:

 REC_IS_RTR

	From	To	Count	Threshold
Bin	0	1	23636	1
Bin	1	0	25235	1

---

Signal:

 REC_BRS

	From	To	Count	Threshold
Bin	0	1	20049	1
Bin	1	0	21644	1

---

Signal:

 REC_ESI

	From	To	Count	Threshold
Bin	0	1	2581	1
Bin	1	0	4181	1

---

Signal:

 REC_IVLD

	From	To	Count	Threshold
Bin	0	1	51180	1
Bin	1	0	52772	1

---

Signal:

 STORE_DATA_WORD

	Element	From	To	Count	Threshold
Bin	(31)	0	1	241881	1
Bin	(31)	1	0	243480	1
Bin	(30)	0	1	249246	1
Bin	(30)	1	0	250844	1
Bin	(29)	0	1	260271	1
Bin	(29)	1	0	261865	1
Bin	(28)	0	1	268608	1
Bin	(28)	1	0	270208	1
Bin	(27)	0	1	278547	1
Bin	(27)	1	0	280145	1
Bin	(26)	0	1	285999	1
Bin	(26)	1	0	287597	1
Bin	(25)	0	1	294448	1
Bin	(25)	1	0	296044	1
Bin	(24)	0	1	303485	1
Bin	(24)	1	0	305082	1
Bin	(23)	0	1	293024	1
Bin	(23)	1	0	294621	1
Bin	(22)	0	1	301366	1
Bin	(22)	1	0	302962	1
Bin	(21)	0	1	308903	1
Bin	(21)	1	0	310500	1
Bin	(20)	0	1	316916	1
Bin	(20)	1	0	318513	1
Bin	(19)	0	1	330277	1
Bin	(19)	1	0	331873	1
Bin	(18)	0	1	337604	1
Bin	(18)	1	0	339201	1
Bin	(17)	0	1	343625	1
Bin	(17)	1	0	345223	1
Bin	(16)	0	1	351617	1
Bin	(16)	1	0	353214	1
Bin	(15)	0	1	393220	1
Bin	(15)	1	0	394817	1
Bin	(14)	0	1	406974	1
Bin	(14)	1	0	408571	1
Bin	(13)	0	1	417088	1
Bin	(13)	1	0	418686	1
Bin	(12)	0	1	427426	1
Bin	(12)	1	0	429024	1
Bin	(11)	0	1	439739	1
Bin	(11)	1	0	441334	1
Bin	(10)	0	1	452521	1
Bin	(10)	1	0	454115	1
Bin	(9)	0	1	462227	1
Bin	(9)	1	0	463824	1
Bin	(8)	0	1	474822	1
Bin	(8)	1	0	476418	1
Bin	(7)	0	1	520277	1
Bin	(7)	1	0	521874	1
Bin	(6)	0	1	533435	1
Bin	(6)	1	0	535030	1
Bin	(5)	0	1	542598	1
Bin	(5)	1	0	544193	1
Bin	(4)	0	1	554073	1
Bin	(4)	1	0	555666	1
Bin	(3)	0	1	565790	1
Bin	(3)	1	0	567385	1
Bin	(2)	0	1	577333	1
Bin	(2)	1	0	578928	1
Bin	(1)	0	1	586688	1
Bin	(1)	1	0	588280	1
Bin	(0)	0	1	595853	1
Bin	(0)	1	0	597445	1

---

Signal:

 SOF_PULSE

	From	To	Count	Threshold
Bin	0	1	81099	1
Bin	1	0	82700	1

---

Signal:

 STORE_METADATA

	From	To	Count	Threshold
Bin	0	1	28503	1
Bin	1	0	30104	1

---

Signal:

 STORE_DATA

	From	To	Count	Threshold
Bin	0	1	88175	1
Bin	1	0	89776	1

---

Signal:

 REC_VALID

	From	To	Count	Threshold
Bin	0	1	15149	1
Bin	1	0	16750	1

---

Signal:

 REC_ABORT

	From	To	Count	Threshold
Bin	0	1	31526	1
Bin	1	0	33127	1

---

Signal:

 STORE_METADATA_F

	From	To	Count	Threshold
Bin	0	1	26339	1
Bin	1	0	27940	1

---

Signal:

 STORE_DATA_F

	From	To	Count	Threshold
Bin	0	1	85674	1
Bin	1	0	87275	1

---

Signal:

 REC_VALID_F

	From	To	Count	Threshold
Bin	0	1	12989	1
Bin	1	0	14590	1

---

Signal:

 REC_ABORT_F

	From	To	Count	Threshold
Bin	0	1	31522	1
Bin	1	0	33123	1

---

Signal:

 TXTB_HW_CMD_INT

	Element	From	To	Count	Threshold
Bin	(7)	0	1	167	1
Bin	(7)	1	0	5400	1
Bin	(6)	0	1	178	1
Bin	(6)	1	0	5389	1
Bin	(5)	0	1	148	1
Bin	(5)	1	0	5419	1
Bin	(4)	0	1	169	1
Bin	(4)	1	0	5398	1
Bin	(3)	0	1	739	1
Bin	(3)	1	0	18553	1
Bin	(2)	0	1	637	1
Bin	(2)	1	0	18655	1
Bin	(1)	0	1	6322	1
Bin	(1)	1	0	37159	1
Bin	(0)	0	1	12696	1
Bin	(0)	1	0	30785	1

---

Signal:

 TXTB_HW_CMD

	Element	From	To	Count	Threshold
Bin	LOCK	0	1	25501	1
Bin	LOCK	1	0	27102	1
Bin	VALID	0	1	11115	1
Bin	VALID	1	0	12716	1
Bin	ERR	0	1	4269	1
Bin	ERR	1	0	5870	1
Bin	ARBL	0	1	455	1
Bin	ARBL	1	0	2056	1
Bin	FAILED	0	1	9651	1
Bin	FAILED	1	0	11252	1

---

Signal:

 TXTB_HW_CMD_CS

	Element	From	To	Count	Threshold
Bin	(7)	0	1	74	1
Bin	(7)	1	0	856	1
Bin	(6)	0	1	72	1
Bin	(6)	1	0	858	1
Bin	(5)	0	1	70	1
Bin	(5)	1	0	860	1
Bin	(4)	0	1	77	1
Bin	(4)	1	0	853	1
Bin	(3)	0	1	369	1
Bin	(3)	1	0	2707	1
Bin	(2)	0	1	293	1
Bin	(2)	1	0	2783	1
Bin	(1)	0	1	5599	1
Bin	(1)	1	0	8348	1
Bin	(0)	0	1	7393	1
Bin	(0)	1	0	6554	1

---

Signal:

 TXTB_AVAILABLE

	Element	From	To	Count	Threshold
Bin	(7)	0	1	333	1
Bin	(7)	1	0	6534	1
Bin	(6)	0	1	306	1
Bin	(6)	1	0	6561	1
Bin	(5)	0	1	327	1
Bin	(5)	1	0	6540	1
Bin	(4)	0	1	302	1
Bin	(4)	1	0	6565	1
Bin	(3)	0	1	1302	1
Bin	(3)	1	0	21640	1
Bin	(2)	0	1	1095	1
Bin	(2)	1	0	21847	1
Bin	(1)	0	1	9514	1
Bin	(1)	1	0	44884	1
Bin	(0)	0	1	15582	1
Bin	(0)	1	0	38816	1

---

Signal:

 TXTB_ALLOW_BB

	Element	From	To	Count	Threshold
Bin	(7)	0	1	277	1
Bin	(7)	1	0	5842	1
Bin	(6)	0	1	264	1
Bin	(6)	1	0	5855	1
Bin	(5)	0	1	271	1
Bin	(5)	1	0	5848	1
Bin	(4)	0	1	262	1
Bin	(4)	1	0	5857	1
Bin	(3)	0	1	1102	1
Bin	(3)	1	0	19752	1
Bin	(2)	0	1	928	1
Bin	(2)	1	0	19926	1
Bin	(1)	0	1	7516	1
Bin	(1)	1	0	37696	1
Bin	(0)	0	1	13643	1
Bin	(0)	1	0	31569	1

---

Signal:

 TXTB_PORT_B_DATA_OUT

	Element	From	To	Count	Threshold
Bin	(7)(31)	0	1	81	1
Bin	(7)(31)	1	0	11453	1
Bin	(7)(30)	0	1	90	1
Bin	(7)(30)	1	0	11474	1
Bin	(7)(29)	0	1	78	1
Bin	(7)(29)	1	0	11353	1
Bin	(7)(28)	0	1	265	1
Bin	(7)(28)	1	0	12814	1
Bin	(7)(27)	0	1	189	1
Bin	(7)(27)	1	0	11922	1
Bin	(7)(26)	0	1	295	1
Bin	(7)(26)	1	0	12921	1
Bin	(7)(25)	0	1	299	1
Bin	(7)(25)	1	0	13060	1
Bin	(7)(24)	0	1	234	1
Bin	(7)(24)	1	0	13303	1
Bin	(7)(23)	0	1	292	1
Bin	(7)(23)	1	0	13271	1
Bin	(7)(22)	0	1	296	1
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Bin	(0)(16)	0	1	8724	1
Bin	(0)(16)	1	0	19412	1
Bin	(0)(15)	0	1	8555	1
Bin	(0)(15)	1	0	19677	1
Bin	(0)(14)	0	1	8659	1
Bin	(0)(14)	1	0	20231	1
Bin	(0)(13)	0	1	8461	1
Bin	(0)(13)	1	0	19424	1
Bin	(0)(12)	0	1	8142	1
Bin	(0)(12)	1	0	18373	1
Bin	(0)(11)	0	1	8644	1
Bin	(0)(11)	1	0	19851	1
Bin	(0)(10)	0	1	9813	1
Bin	(0)(10)	1	0	21483	1
Bin	(0)(9)	0	1	14566	1
Bin	(0)(9)	1	0	39659	1
Bin	(0)(8)	0	1	8640	1
Bin	(0)(8)	1	0	19406	1
Bin	(0)(7)	0	1	20016	1
Bin	(0)(7)	1	0	53926	1
Bin	(0)(6)	0	1	16760	1
Bin	(0)(6)	1	0	44592	1
Bin	(0)(5)	0	1	11816	1
Bin	(0)(5)	1	0	26699	1
Bin	(0)(4)	0	1	10175	1
Bin	(0)(4)	1	0	20731	1
Bin	(0)(3)	0	1	14750	1
Bin	(0)(3)	1	0	39721	1
Bin	(0)(2)	0	1	16328	1
Bin	(0)(2)	1	0	41870	1
Bin	(0)(1)	0	1	16232	1
Bin	(0)(1)	1	0	40860	1
Bin	(0)(0)	0	1	18896	1
Bin	(0)(0)	1	0	56172	1

---

Signal:

 TXTB_PORT_B_ADDRESS

	Element	From	To	Count	Threshold
Bin	(4)	0	1	27463	1
Bin	(4)	1	0	29064	1
Bin	(3)	0	1	4010	1
Bin	(3)	1	0	5611	1
Bin	(2)	0	1	47158	1
Bin	(2)	1	0	48759	1
Bin	(1)	0	1	38295	1
Bin	(1)	1	0	38298	1
Bin	(0)	0	1	103594	1
Bin	(0)	1	0	105192	1

---

Signal:

 TXTB_PORT_B_CLK_EN

	From	To	Count	Threshold
Bin	0	1	107454	1
Bin	1	0	109055	1

---

Signal:

 TXTB_PARITY_CHECK_VALID

	From	To	Count	Threshold
Bin	0	1	185711	1
Bin	1	0	187312	1

---

Signal:

 TXTB_PARITY_MISMATCH

	Element	From	To	Count	Threshold
Bin	(7)	0	1	1459	1
Bin	(7)	1	0	1508	1
Bin	(6)	0	1	1617	1
Bin	(6)	1	0	1350	1
Bin	(5)	0	1	1458	1
Bin	(5)	1	0	1509	1
Bin	(4)	0	1	1574	1
Bin	(4)	1	0	1393	1
Bin	(3)	0	1	4151	1
Bin	(3)	1	0	4091	1
Bin	(2)	0	1	3624	1
Bin	(2)	1	0	4618	1
Bin	(1)	0	1	3190	1
Bin	(1)	1	0	5993	1
Bin	(0)	0	1	3840	1
Bin	(0)	1	0	5343	1

---

Signal:

 TXTB_PARITY_ERROR_VALID

	Element	From	To	Count	Threshold
Bin	(7)	0	1	78	1
Bin	(7)	1	0	1383	1
Bin	(6)	0	1	89	1
Bin	(6)	1	0	1372	1
Bin	(5)	0	1	62	1
Bin	(5)	1	0	1399	1
Bin	(4)	0	1	99	1
Bin	(4)	1	0	1362	1
Bin	(3)	0	1	300	1
Bin	(3)	1	0	3872	1
Bin	(2)	0	1	389	1
Bin	(2)	1	0	3783	1
Bin	(1)	0	1	349	1
Bin	(1)	1	0	4764	1
Bin	(0)	0	1	390	1
Bin	(0)	1	0	4723	1

---

Signal:

 TXTB_BB_PARITY_ERROR

	Element	From	To	Count	Threshold
Bin	(3)	0	1	33	1
Bin	(3)	1	0	364	1
Bin	(2)	0	1	27	1
Bin	(2)	1	0	370	1
Bin	(1)	0	1	125	1
Bin	(1)	1	0	1219	1
Bin	(0)	0	1	157	1
Bin	(0)	1	0	2128	1

---

Signal:

 TRAN_DLC

	Element	From	To	Count	Threshold
Bin	(3)	0	1	1496	1
Bin	(3)	1	0	3096	1
Bin	(2)	0	1	1955	1
Bin	(2)	1	0	3555	1
Bin	(1)	0	1	1908	1
Bin	(1)	1	0	3509	1
Bin	(0)	0	1	3563	1
Bin	(0)	1	0	5164	1

---

Signal:

 TRAN_IS_RTR

	From	To	Count	Threshold
Bin	0	1	1173	1
Bin	1	0	2772	1

---

Signal:

 TRAN_IDENT_TYPE

	From	To	Count	Threshold
Bin	0	1	2562	1
Bin	1	0	4163	1

---

Signal:

 TRAN_FRAME_TYPE

	From	To	Count	Threshold
Bin	0	1	2713	1
Bin	1	0	4314	1

---

Signal:

 TRAN_BRS

	From	To	Count	Threshold
Bin	0	1	2011	1
Bin	1	0	3612	1

---

Signal:

 TRAN_IDENTIFIER

	Element	From	To	Count	Threshold
Bin	(28)	0	1	3924	1
Bin	(28)	1	0	5475	1
Bin	(27)	0	1	3883	1
Bin	(27)	1	0	5516	1
Bin	(26)	0	1	3870	1
Bin	(26)	1	0	5418	1
Bin	(25)	0	1	4127	1
Bin	(25)	1	0	5750	1
Bin	(24)	0	1	3960	1
Bin	(24)	1	0	5498	1
Bin	(23)	0	1	4124	1
Bin	(23)	1	0	5749	1
Bin	(22)	0	1	3814	1
Bin	(22)	1	0	5444	1
Bin	(21)	0	1	4199	1
Bin	(21)	1	0	5759	1
Bin	(20)	0	1	3869	1
Bin	(20)	1	0	5501	1
Bin	(19)	0	1	4219	1
Bin	(19)	1	0	5772	1
Bin	(18)	0	1	3822	1
Bin	(18)	1	0	5451	1
Bin	(17)	0	1	1754	1
Bin	(17)	1	0	9592	1
Bin	(16)	0	1	1740	1
Bin	(16)	1	0	9640	1
Bin	(15)	0	1	1754	1
Bin	(15)	1	0	9659	1
Bin	(14)	0	1	1697	1
Bin	(14)	1	0	9664	1
Bin	(13)	0	1	1711	1
Bin	(13)	1	0	9576	1
Bin	(12)	0	1	1663	1
Bin	(12)	1	0	9481	1
Bin	(11)	0	1	1734	1
Bin	(11)	1	0	9563	1
Bin	(10)	0	1	1663	1
Bin	(10)	1	0	9394	1
Bin	(9)	0	1	1725	1
Bin	(9)	1	0	9518	1
Bin	(8)	0	1	1705	1
Bin	(8)	1	0	9495	1
Bin	(7)	0	1	1775	1
Bin	(7)	1	0	9568	1
Bin	(6)	0	1	1740	1
Bin	(6)	1	0	9640	1
Bin	(5)	0	1	1751	1
Bin	(5)	1	0	9583	1
Bin	(4)	0	1	1736	1
Bin	(4)	1	0	9633	1
Bin	(3)	0	1	1753	1
Bin	(3)	1	0	9554	1
Bin	(2)	0	1	1733	1
Bin	(2)	1	0	9512	1
Bin	(1)	0	1	1754	1
Bin	(1)	1	0	9637	1
Bin	(0)	0	1	1726	1
Bin	(0)	1	0	9541	1

---

Signal:

 TRAN_FRAME_TEST

	Element	From	To	Count	Threshold
Bin	FSTC	0	1	270	1
Bin	FSTC	1	0	1871	1
Bin	FCRC	0	1	100	1
Bin	FCRC	1	0	1701	1
Bin	SDLC	0	1	270	1
Bin	SDLC	1	0	1871	1
Bin	TPRM(4)	0	1	58	1
Bin	TPRM(4)	1	0	3273	1
Bin	TPRM(3)	0	1	189	1
Bin	TPRM(3)	1	0	1838	1
Bin	TPRM(2)	0	1	209	1
Bin	TPRM(2)	1	0	1858	1
Bin	TPRM(1)	0	1	431	1
Bin	TPRM(1)	1	0	2080	1
Bin	TPRM(0)	0	1	653	1
Bin	TPRM(0)	1	0	2302	1

---

Signal:

 TRAN_WORD

	Element	From	To	Count	Threshold
Bin	(31)	0	1	10387	1
Bin	(31)	1	0	27360	1
Bin	(30)	0	1	10685	1
Bin	(30)	1	0	26144	1
Bin	(29)	0	1	10089	1
Bin	(29)	1	0	25792	1
Bin	(28)	0	1	26430	1
Bin	(28)	1	0	68315	1
Bin	(27)	0	1	21991	1
Bin	(27)	1	0	56789	1
Bin	(26)	0	1	26938	1
Bin	(26)	1	0	68845	1
Bin	(25)	0	1	23263	1
Bin	(25)	1	0	60615	1
Bin	(24)	0	1	27764	1
Bin	(24)	1	0	69735	1
Bin	(23)	0	1	24621	1
Bin	(23)	1	0	58550	1
Bin	(22)	0	1	26701	1
Bin	(22)	1	0	67341	1
Bin	(21)	0	1	24872	1
Bin	(21)	1	0	60971	1
Bin	(20)	0	1	26469	1
Bin	(20)	1	0	66414	1
Bin	(19)	0	1	24512	1
Bin	(19)	1	0	59826	1
Bin	(18)	0	1	27778	1
Bin	(18)	1	0	66619	1
Bin	(17)	0	1	16891	1
Bin	(17)	1	0	39819	1
Bin	(16)	0	1	17493	1
Bin	(16)	1	0	39188	1
Bin	(15)	0	1	17281	1
Bin	(15)	1	0	60097	1
Bin	(14)	0	1	17336	1
Bin	(14)	1	0	59761	1
Bin	(13)	0	1	16872	1
Bin	(13)	1	0	59268	1
Bin	(12)	0	1	16888	1
Bin	(12)	1	0	58693	1
Bin	(11)	0	1	17668	1
Bin	(11)	1	0	58921	1
Bin	(10)	0	1	19444	1
Bin	(10)	1	0	63616	1
Bin	(9)	0	1	28357	1
Bin	(9)	1	0	75504	1
Bin	(8)	0	1	18089	1
Bin	(8)	1	0	62077	1
Bin	(7)	0	1	36386	1
Bin	(7)	1	0	46720	1
Bin	(6)	0	1	28539	1
Bin	(6)	1	0	35209	1
Bin	(5)	0	1	21141	1
Bin	(5)	1	0	29254	1
Bin	(4)	0	1	18334	1
Bin	(4)	1	0	23579	1
Bin	(3)	0	1	27223	1
Bin	(3)	1	0	34686	1
Bin	(2)	0	1	29043	1
Bin	(2)	1	0	36792	1
Bin	(1)	0	1	29198	1
Bin	(1)	1	0	36820	1
Bin	(0)	0	1	36332	1
Bin	(0)	1	0	45841	1

---

Signal:

 TRAN_FRAME_VALID

	From	To	Count	Threshold
Bin	0	1	25746	1
Bin	1	0	27347	1

---

Signal:

 TRAN_FRAME_PARITY_ERROR

	From	To	Count	Threshold
Bin	0	1	699	1
Bin	1	0	2300	1

---

Signal:

 TXTB_CHANGED

	From	To	Count	Threshold
Bin	0	1	9992	1
Bin	1	0	11593	1

---

Signal:

 TXTB_CLK_EN

	From	To	Count	Threshold
Bin	0	1	80871	1
Bin	1	0	82472	1

---

Signal:

 CURR_TXTB_INDEX

	Element	From	To	Count	Threshold
Bin	(2)	0	1	117	1
Bin	(2)	1	0	1718	1
Bin	(1)	0	1	520	1
Bin	(1)	1	0	2121	1
Bin	(0)	0	1	6016	1
Bin	(0)	1	0	7617	1

---

Signal:

 ERR_DETECTED

	From	To	Count	Threshold
Bin	0	1	126203	1
Bin	1	0	127804	1

---

Signal:

 FCS_CHANGED

	From	To	Count	Threshold
Bin	0	1	15993	1
Bin	1	0	17594	1

---

Signal:

 ERR_WARNING_LIMIT_PULSE

	From	To	Count	Threshold
Bin	0	1	3160	1
Bin	1	0	4761	1

---

Signal:

 ARBITRATION_LOST

	From	To	Count	Threshold
Bin	0	1	1175	1
Bin	1	0	2776	1

---

Signal:

 TRAN_VALID

	From	To	Count	Threshold
Bin	0	1	11115	1
Bin	1	0	12716	1

---

Signal:

 BR_SHIFTED

	From	To	Count	Threshold
Bin	0	1	46598	1
Bin	1	0	48199	1

---

Signal:

 RX_TRIGGERS

	Element	From	To	Count	Threshold
Bin	(1)	0	1	34283270	1
Bin	(1)	1	0	34286472	1
Bin	(0)	0	1	22846418	1
Bin	(0)	1	0	45721723	1

---

Signal:

 TX_TRIGGER

	From	To	Count	Threshold
Bin	0	1	11432038	1
Bin	1	0	11433636	1

---

Signal:

 SYNC_CONTROL

	Element	From	To	Count	Threshold
Bin	(1)	0	1	100135	1
Bin	(1)	1	0	100129	1
Bin	(0)	0	1	92433	1
Bin	(0)	1	0	92439	1

---

Signal:

 NO_POS_RESYNC

	From	To	Count	Threshold
Bin	0	1	636881	1
Bin	1	0	638480	1

---

Signal:

 NBT_CTRS_EN

	From	To	Count	Threshold
Bin	0	1	6483	1
Bin	1	0	8072	1

---

Signal:

 DBT_CTRS_EN

	From	To	Count	Threshold
Bin	0	1	67683	1
Bin	1	0	69284	1

---

Signal:

 TRV_DELAY

	Element	From	To	Count	Threshold
Bin	(7)	0	1	23	1
Bin	(7)	1	0	1624	1
Bin	(6)	0	1	38	1
Bin	(6)	1	0	1639	1
Bin	(5)	0	1	69	1
Bin	(5)	1	0	1670	1
Bin	(4)	0	1	86	1
Bin	(4)	1	0	1687	1
Bin	(3)	0	1	77	1
Bin	(3)	1	0	1678	1
Bin	(2)	0	1	85	1
Bin	(2)	1	0	1686	1
Bin	(1)	0	1	2178	1
Bin	(1)	1	0	3779	1
Bin	(0)	0	1	67	1
Bin	(0)	1	0	1668	1

---

Signal:

 RX_DATA_WBS

	From	To	Count	Threshold
Bin	0	1	1409892	1
Bin	1	0	1408291	1

---

Signal:

 TX_DATA_WBS

	From	To	Count	Threshold
Bin	0	1	638480	1
Bin	1	0	636881	1

---

Signal:

 SSP_RESET

	From	To	Count	Threshold
Bin	0	1	32708	1
Bin	1	0	34309	1

---

Signal:

 TRAN_DELAY_MEAS

	From	To	Count	Threshold
Bin	0	1	37635	1
Bin	1	0	39236	1

---

Signal:

 BIT_ERR

	From	To	Count	Threshold
Bin	0	1	10109	1
Bin	1	0	11710	1

---

Signal:

 BTMC_RESET

	From	To	Count	Threshold
Bin	0	1	28132	1
Bin	1	0	29733	1

---

Signal:

 DBT_MEASURE_START

	From	To	Count	Threshold
Bin	0	1	2151	1
Bin	1	0	3752	1

---

Signal:

 GEN_FIRST_SSP

	From	To	Count	Threshold
Bin	0	1	2151	1
Bin	1	0	3752	1

---

Signal:

 SYNC_EDGE

	From	To	Count	Threshold
Bin	0	1	1562664	1
Bin	1	0	1564265	1

---

Signal:

 BIT_ERR_ENABLE

	From	To	Count	Threshold
Bin	0	1	67584	1
Bin	1	0	65993	1

---

Signal:

 TQ_EDGE

	From	To	Count	Threshold
Bin	0	1	111638238	1
Bin	1	0	111639834	1

---

Signal:

 MR_CTRL_OUT

	Element	From	To	Count	Threshold
Bin	MODE_RST	0	1	868	1
Bin	MODE_RST	1	0	32877	1
Bin	MODE_BMM	0	1	15	1
Bin	MODE_BMM	1	0	1616	1
Bin	MODE_STM	0	1	160	1
Bin	MODE_STM	1	0	1761	1
Bin	MODE_AFM	0	1	68	1
Bin	MODE_AFM	1	0	1669	1
Bin	MODE_FDE	0	1	1801	1
Bin	MODE_FDE	1	0	200	1
Bin	MODE_TTTM	0	1	55	1
Bin	MODE_TTTM	1	0	1656	1
Bin	MODE_ROM	0	1	51	1
Bin	MODE_ROM	1	0	1652	1
Bin	MODE_ACF	0	1	19	1
Bin	MODE_ACF	1	0	1620	1
Bin	MODE_TSTM	0	1	1027	1
Bin	MODE_TSTM	1	0	2627	1
Bin	MODE_RXBAM	0	1	1731	1
Bin	MODE_RXBAM	1	0	130	1
Bin	MODE_TXBBM	0	1	33	1
Bin	MODE_TXBBM	1	0	1634	1
Bin	MODE_SAM	0	1	55	1
Bin	MODE_SAM	1	0	1656	1
Bin	MODE_ERFM	0	1	153	1
Bin	MODE_ERFM	1	0	1754	1
Bin	SETTINGS_RTRLE	0	1	2454	1
Bin	SETTINGS_RTRLE	1	0	4055	1
Bin	SETTINGS_RTRTH(3)	0	1	22	1
Bin	SETTINGS_RTRTH(3)	1	0	1623	1
Bin	SETTINGS_RTRTH(2)	0	1	54	1
Bin	SETTINGS_RTRTH(2)	1	0	1655	1
Bin	SETTINGS_RTRTH(1)	0	1	22	1
Bin	SETTINGS_RTRTH(1)	1	0	1623	1
Bin	SETTINGS_RTRTH(0)	0	1	53	1
Bin	SETTINGS_RTRTH(0)	1	0	1654	1
Bin	SETTINGS_ILBP	0	1	130	1
Bin	SETTINGS_ILBP	1	0	1731	1
Bin	SETTINGS_ENA	0	1	6483	1
Bin	SETTINGS_ENA	1	0	8072	1
Bin	SETTINGS_NISOFD	0	1	130	1
Bin	SETTINGS_NISOFD	1	0	1731	1
Bin	SETTINGS_PEX	0	1	72	1
Bin	SETTINGS_PEX	1	0	1673	1
Bin	SETTINGS_TBFBO	0	1	2533	1
Bin	SETTINGS_TBFBO	1	0	944	1
Bin	SETTINGS_FDRF	0	1	4	1
Bin	SETTINGS_FDRF	1	0	1605	1
Bin	SETTINGS_PCHKE	0	1	124	1
Bin	SETTINGS_PCHKE	1	0	1725	1
Bin	COMMAND_RXRPMV	0	1	21	1
Bin	COMMAND_RXRPMV	1	0	3064	1
Bin	COMMAND_RRB	0	1	460	1
Bin	COMMAND_RRB	1	0	3064	1
Bin	COMMAND_CDO	0	1	20	1
Bin	COMMAND_CDO	1	0	3064	1
Bin	COMMAND_ERCRST	0	1	170	1
Bin	COMMAND_ERCRST	1	0	3064	1
Bin	COMMAND_RXFCRST	0	1	124	1
Bin	COMMAND_RXFCRST	1	0	3064	1
Bin	COMMAND_TXFCRST	0	1	124	1
Bin	COMMAND_TXFCRST	1	0	3064	1
Bin	COMMAND_CPEXS	0	1	60	1
Bin	COMMAND_CPEXS	1	0	3064	1
Bin	COMMAND_CRXPE	0	1	40	1
Bin	COMMAND_CRXPE	1	0	3064	1
Bin	COMMAND_CTXPE	0	1	440	1
Bin	COMMAND_CTXPE	1	0	3064	1
Bin	COMMAND_CTXDPE	0	1	40	1
Bin	COMMAND_CTXDPE	1	0	3064	1
Bin	INT_STAT_RXI	0	1	40	1
Bin	INT_STAT_RXI	1	0	1748	1
Bin	INT_STAT_TXI	0	1	42	1
Bin	INT_STAT_TXI	1	0	1748	1
Bin	INT_STAT_EWLI	0	1	30	1
Bin	INT_STAT_EWLI	1	0	1748	1
Bin	INT_STAT_DOI	0	1	16	1
Bin	INT_STAT_DOI	1	0	1748	1
Bin	INT_STAT_FCSI	0	1	80	1
Bin	INT_STAT_FCSI	1	0	1748	1
Bin	INT_STAT_ALI	0	1	5	1
Bin	INT_STAT_ALI	1	0	1748	1
Bin	INT_STAT_BEI	0	1	15	1
Bin	INT_STAT_BEI	1	0	1748	1
Bin	INT_STAT_OFI	0	1	5	1
Bin	INT_STAT_OFI	1	0	1748	1
Bin	INT_STAT_RXFI	0	1	15	1
Bin	INT_STAT_RXFI	1	0	1748	1
Bin	INT_STAT_BSI	0	1	43	1
Bin	INT_STAT_BSI	1	0	1748	1
Bin	INT_STAT_RBNEI	0	1	50	1
Bin	INT_STAT_RBNEI	1	0	1748	1
Bin	INT_STAT_TXBHCI	0	1	52	1
Bin	INT_STAT_TXBHCI	1	0	1748	1
Bin	INT_ENA_SET_INT_ENA_SET(11)	0	1	66	1
Bin	INT_ENA_SET_INT_ENA_SET(11)	1	0	2373	1
Bin	INT_ENA_SET_INT_ENA_SET(10)	0	1	30	1
Bin	INT_ENA_SET_INT_ENA_SET(10)	1	0	2409	1
Bin	INT_ENA_SET_INT_ENA_SET(9)	0	1	50	1
Bin	INT_ENA_SET_INT_ENA_SET(9)	1	0	2389	1
Bin	INT_ENA_SET_INT_ENA_SET(8)	0	1	15	1
Bin	INT_ENA_SET_INT_ENA_SET(8)	1	0	2424	1
Bin	INT_ENA_SET_INT_ENA_SET(7)	0	1	15	1
Bin	INT_ENA_SET_INT_ENA_SET(7)	1	0	2424	1
Bin	INT_ENA_SET_INT_ENA_SET(6)	0	1	15	1
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Bin	FILTER_A_VAL_BIT_VAL_A_VAL(27)	1	0	2400	1
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Bin	FILTER_A_VAL_BIT_VAL_A_VAL(26)	1	0	2421	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(25)	0	1	809	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(25)	1	0	2410	1
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Bin	FILTER_A_VAL_BIT_VAL_A_VAL(23)	0	1	806	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(23)	1	0	2407	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(22)	0	1	808	1
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Bin	FILTER_A_VAL_BIT_VAL_A_VAL(21)	0	1	794	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(21)	1	0	2395	1
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Bin	FILTER_A_VAL_BIT_VAL_A_VAL(20)	1	0	2434	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(19)	0	1	823	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(19)	1	0	2424	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(18)	0	1	823	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(18)	1	0	2424	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(17)	0	1	410	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(17)	1	0	2011	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(16)	0	1	385	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(16)	1	0	1986	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(15)	0	1	391	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(15)	1	0	1992	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(14)	0	1	449	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(14)	1	0	2050	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(13)	0	1	397	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(13)	1	0	1998	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(12)	0	1	380	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(12)	1	0	1981	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(11)	0	1	442	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(11)	1	0	2043	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(10)	0	1	394	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(10)	1	0	1995	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(9)	0	1	398	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(9)	1	0	1999	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(8)	0	1	377	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(8)	1	0	1978	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(7)	0	1	360	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(7)	1	0	1961	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(6)	0	1	393	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(6)	1	0	1994	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(5)	0	1	403	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(5)	1	0	2004	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(4)	0	1	405	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(4)	1	0	2006	1
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Bin	FILTER_A_VAL_BIT_VAL_A_VAL(3)	1	0	1998	1
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Bin	FILTER_A_VAL_BIT_VAL_A_VAL(2)	1	0	2011	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(1)	0	1	402	1
Bin	FILTER_A_VAL_BIT_VAL_A_VAL(1)	1	0	2003	1
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Bin	FILTER_B_MASK_BIT_MASK_B_VAL(27)	0	1	96	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(27)	1	0	1697	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(26)	0	1	95	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(26)	1	0	1696	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(25)	0	1	96	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(25)	1	0	1697	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(24)	0	1	103	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(24)	1	0	1704	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(23)	0	1	101	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(23)	1	0	1702	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(22)	0	1	104	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(22)	1	0	1705	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(21)	0	1	90	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(21)	1	0	1691	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(20)	0	1	92	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(20)	1	0	1693	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(19)	0	1	81	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(19)	1	0	1682	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(18)	0	1	107	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(18)	1	0	1708	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(17)	0	1	16	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(17)	1	0	1617	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(16)	0	1	19	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(16)	1	0	1620	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(15)	0	1	28	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(15)	1	0	1629	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(14)	0	1	37	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(14)	1	0	1638	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(13)	0	1	35	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(13)	1	0	1636	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(12)	0	1	23	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(12)	1	0	1624	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(11)	0	1	21	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(11)	1	0	1622	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(10)	0	1	60	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(10)	1	0	1661	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(9)	0	1	70	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(9)	1	0	1671	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(8)	0	1	67	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(8)	1	0	1668	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(7)	0	1	70	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(7)	1	0	1671	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(6)	0	1	63	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(6)	1	0	1664	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(5)	0	1	62	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(5)	1	0	1663	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(4)	0	1	70	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(4)	1	0	1671	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(3)	0	1	62	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(3)	1	0	1663	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(2)	0	1	71	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(2)	1	0	1672	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(1)	0	1	67	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(1)	1	0	1668	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(0)	0	1	70	1
Bin	FILTER_B_MASK_BIT_MASK_B_VAL(0)	1	0	1671	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(28)	0	1	196	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(28)	1	0	1797	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(27)	0	1	196	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(27)	1	0	1797	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(26)	0	1	217	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(26)	1	0	1818	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(25)	0	1	183	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(25)	1	0	1784	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(24)	0	1	218	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(24)	1	0	1819	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(23)	0	1	206	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(23)	1	0	1807	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(22)	0	1	200	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(22)	1	0	1801	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(21)	0	1	225	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(21)	1	0	1826	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(20)	0	1	229	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(20)	1	0	1830	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(19)	0	1	201	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(19)	1	0	1802	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(18)	0	1	209	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(18)	1	0	1810	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(17)	0	1	87	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(17)	1	0	1688	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(16)	0	1	104	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(16)	1	0	1705	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(15)	0	1	91	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(15)	1	0	1692	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(14)	0	1	106	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(14)	1	0	1707	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(13)	0	1	103	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(13)	1	0	1704	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(12)	0	1	108	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(12)	1	0	1709	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(11)	0	1	107	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(11)	1	0	1708	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(10)	0	1	93	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(10)	1	0	1694	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(9)	0	1	101	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(9)	1	0	1702	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(8)	0	1	98	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(8)	1	0	1699	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(7)	0	1	96	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(7)	1	0	1697	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(6)	0	1	86	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(6)	1	0	1687	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(5)	0	1	105	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(5)	1	0	1706	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(4)	0	1	114	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(4)	1	0	1715	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(3)	0	1	92	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(3)	1	0	1693	1
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Bin	FILTER_B_VAL_BIT_VAL_B_VAL(2)	1	0	1716	1
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Bin	FILTER_B_VAL_BIT_VAL_B_VAL(1)	1	0	1694	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(0)	0	1	108	1
Bin	FILTER_B_VAL_BIT_VAL_B_VAL(0)	1	0	1709	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(28)	0	1	85	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(28)	1	0	1686	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(27)	0	1	95	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(27)	1	0	1696	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(26)	0	1	89	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(26)	1	0	1690	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(25)	0	1	82	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(25)	1	0	1683	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(24)	0	1	108	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(24)	1	0	1709	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(23)	0	1	79	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(23)	1	0	1680	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(22)	0	1	101	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(22)	1	0	1702	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(21)	0	1	105	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(21)	1	0	1706	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(20)	0	1	92	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(20)	1	0	1693	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(19)	0	1	85	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(19)	1	0	1686	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(18)	0	1	99	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(18)	1	0	1700	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(17)	0	1	19	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(17)	1	0	1620	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(16)	0	1	20	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(16)	1	0	1621	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(15)	0	1	34	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(15)	1	0	1635	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(14)	0	1	27	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(14)	1	0	1628	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(13)	0	1	28	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(13)	1	0	1629	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(12)	0	1	22	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(12)	1	0	1623	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(11)	0	1	14	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(11)	1	0	1615	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(10)	0	1	67	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(10)	1	0	1668	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(9)	0	1	67	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(9)	1	0	1668	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(8)	0	1	68	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(8)	1	0	1669	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(7)	0	1	62	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(7)	1	0	1663	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(6)	0	1	63	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(6)	1	0	1664	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(5)	0	1	63	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(5)	1	0	1664	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(4)	0	1	66	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(4)	1	0	1667	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(3)	0	1	68	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(3)	1	0	1669	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(2)	0	1	60	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(2)	1	0	1661	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(1)	0	1	77	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(1)	1	0	1678	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(0)	0	1	67	1
Bin	FILTER_C_MASK_BIT_MASK_C_VAL(0)	1	0	1668	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(28)	0	1	184	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(28)	1	0	1785	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(27)	0	1	188	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(27)	1	0	1789	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(26)	0	1	201	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(26)	1	0	1802	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(25)	0	1	196	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(25)	1	0	1797	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(24)	0	1	193	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(24)	1	0	1794	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(23)	0	1	198	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(23)	1	0	1799	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(22)	0	1	190	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(22)	1	0	1791	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(21)	0	1	204	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(21)	1	0	1805	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(20)	0	1	225	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(20)	1	0	1826	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(19)	0	1	201	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(19)	1	0	1802	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(18)	0	1	206	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(18)	1	0	1807	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(17)	0	1	94	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(17)	1	0	1695	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(16)	0	1	97	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(16)	1	0	1698	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(15)	0	1	104	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(15)	1	0	1705	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(14)	0	1	93	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(14)	1	0	1694	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(13)	0	1	108	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(13)	1	0	1709	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(12)	0	1	98	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(12)	1	0	1699	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(11)	0	1	107	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(11)	1	0	1708	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(10)	0	1	104	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(10)	1	0	1705	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(9)	0	1	113	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(9)	1	0	1714	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(8)	0	1	96	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(8)	1	0	1697	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(7)	0	1	91	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(7)	1	0	1692	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(6)	0	1	90	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(6)	1	0	1691	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(5)	0	1	99	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(5)	1	0	1700	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(4)	0	1	100	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(4)	1	0	1701	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(3)	0	1	89	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(3)	1	0	1690	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(2)	0	1	107	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(2)	1	0	1708	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(1)	0	1	110	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(1)	1	0	1711	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(0)	0	1	110	1
Bin	FILTER_C_VAL_BIT_VAL_C_VAL(0)	1	0	1711	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(28)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(28)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(27)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(27)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(26)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(26)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(25)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(25)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(24)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(24)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(23)	0	1	2	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(23)	1	0	1603	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(22)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(22)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(21)	0	1	2	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(21)	1	0	1603	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(20)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(20)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(19)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(19)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(18)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(18)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(17)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(17)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(16)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(16)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(15)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(15)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(14)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(14)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(13)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(13)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(12)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(12)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(11)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(11)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(10)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(10)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(9)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(9)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(8)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(8)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(7)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(7)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(6)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(6)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(5)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(5)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(4)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(4)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(3)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(3)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(2)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(2)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(1)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(1)	1	0	1602	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(0)	0	1	1	1
Bin	FILTER_RAN_LOW_BIT_RAN_LOW_VAL(0)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(28)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(28)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(27)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(27)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(26)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(26)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(25)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(25)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(24)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(24)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(23)	0	1	2	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(23)	1	0	1603	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(22)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(22)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(21)	0	1	2	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(21)	1	0	1603	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(20)	0	1	2	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(20)	1	0	1603	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(19)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(19)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(18)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(18)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(17)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(17)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(16)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(16)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(15)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(15)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(14)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(14)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(13)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(13)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(12)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(12)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(11)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(11)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(10)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(10)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(9)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(9)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(8)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(8)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(7)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(7)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(6)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(6)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(5)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(5)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(4)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(4)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(3)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(3)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(2)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(2)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(1)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(1)	1	0	1602	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(0)	0	1	1	1
Bin	FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL(0)	1	0	1602	1
Bin	FILTER_CONTROL_FANB	0	1	2052	1
Bin	FILTER_CONTROL_FANB	1	0	451	1
Bin	FILTER_CONTROL_FANE	0	1	2029	1
Bin	FILTER_CONTROL_FANE	1	0	428	1
Bin	FILTER_CONTROL_FAFB	0	1	2060	1
Bin	FILTER_CONTROL_FAFB	1	0	459	1
Bin	FILTER_CONTROL_FAFE	0	1	2029	1
Bin	FILTER_CONTROL_FAFE	1	0	428	1
Bin	FILTER_CONTROL_FBNB	0	1	106	1
Bin	FILTER_CONTROL_FBNB	1	0	1707	1
Bin	FILTER_CONTROL_FBNE	0	1	105	1
Bin	FILTER_CONTROL_FBNE	1	0	1706	1
Bin	FILTER_CONTROL_FBFB	0	1	107	1
Bin	FILTER_CONTROL_FBFB	1	0	1708	1
Bin	FILTER_CONTROL_FBFE	0	1	105	1
Bin	FILTER_CONTROL_FBFE	1	0	1706	1
Bin	FILTER_CONTROL_FCNB	0	1	106	1
Bin	FILTER_CONTROL_FCNB	1	0	1707	1
Bin	FILTER_CONTROL_FCNE	0	1	105	1
Bin	FILTER_CONTROL_FCNE	1	0	1706	1
Bin	FILTER_CONTROL_FCFB	0	1	107	1
Bin	FILTER_CONTROL_FCFB	1	0	1708	1
Bin	FILTER_CONTROL_FCFE	0	1	105	1
Bin	FILTER_CONTROL_FCFE	1	0	1706	1
Bin	FILTER_CONTROL_FRNB	0	1	6	1
Bin	FILTER_CONTROL_FRNB	1	0	1607	1
Bin	FILTER_CONTROL_FRNE	0	1	5	1
Bin	FILTER_CONTROL_FRNE	1	0	1606	1
Bin	FILTER_CONTROL_FRFB	0	1	6	1
Bin	FILTER_CONTROL_FRFB	1	0	1607	1
Bin	FILTER_CONTROL_FRFE	0	1	5	1
Bin	FILTER_CONTROL_FRFE	1	0	1606	1
Bin	RX_SETTINGS_RTSOP	0	1	5	1
Bin	RX_SETTINGS_RTSOP	1	0	1606	1
Bin	RX_DATA_READ	0	1	51013	1
Bin	RX_DATA_READ	1	0	52614	1
Bin	TX_COMMAND_TXCE	0	1	354	1
Bin	TX_COMMAND_TXCE	1	0	25291	1
Bin	TX_COMMAND_TXCR	0	1	21602	1
Bin	TX_COMMAND_TXCR	1	0	25291	1
Bin	TX_COMMAND_TXCA	0	1	1734	1
Bin	TX_COMMAND_TXCA	1	0	25291	1
Bin	TX_COMMAND_TXB1	0	1	6554	1
Bin	TX_COMMAND_TXB1	1	0	8151	1
Bin	TX_COMMAND_TXB2	0	1	5585	1
Bin	TX_COMMAND_TXB2	1	0	7186	1
Bin	TX_COMMAND_TXB3	0	1	319	1
Bin	TX_COMMAND_TXB3	1	0	1920	1
Bin	TX_COMMAND_TXB4	0	1	348	1
Bin	TX_COMMAND_TXB4	1	0	1949	1
Bin	TX_COMMAND_TXB5	0	1	84	1
Bin	TX_COMMAND_TXB5	1	0	1685	1
Bin	TX_COMMAND_TXB6	0	1	64	1
Bin	TX_COMMAND_TXB6	1	0	1665	1
Bin	TX_COMMAND_TXB7	0	1	76	1
Bin	TX_COMMAND_TXB7	1	0	1677	1
Bin	TX_COMMAND_TXB8	0	1	68	1
Bin	TX_COMMAND_TXB8	1	0	1669	1
Bin	TX_PRIORITY_TXT1P(2)	0	1	111	1
Bin	TX_PRIORITY_TXT1P(2)	1	0	1712	1
Bin	TX_PRIORITY_TXT1P(1)	0	1	113	1
Bin	TX_PRIORITY_TXT1P(1)	1	0	1714	1
Bin	TX_PRIORITY_TXT1P(0)	0	1	1721	1
Bin	TX_PRIORITY_TXT1P(0)	1	0	120	1
Bin	TX_PRIORITY_TXT2P(2)	0	1	93	1
Bin	TX_PRIORITY_TXT2P(2)	1	0	1694	1
Bin	TX_PRIORITY_TXT2P(1)	0	1	121	1
Bin	TX_PRIORITY_TXT2P(1)	1	0	1722	1
Bin	TX_PRIORITY_TXT2P(0)	0	1	119	1
Bin	TX_PRIORITY_TXT2P(0)	1	0	1720	1
Bin	TX_PRIORITY_TXT3P(2)	0	1	84	1
Bin	TX_PRIORITY_TXT3P(2)	1	0	1685	1
Bin	TX_PRIORITY_TXT3P(1)	0	1	92	1
Bin	TX_PRIORITY_TXT3P(1)	1	0	1693	1
Bin	TX_PRIORITY_TXT3P(0)	0	1	102	1
Bin	TX_PRIORITY_TXT3P(0)	1	0	1703	1
Bin	TX_PRIORITY_TXT4P(2)	0	1	85	1
Bin	TX_PRIORITY_TXT4P(2)	1	0	1686	1
Bin	TX_PRIORITY_TXT4P(1)	0	1	100	1
Bin	TX_PRIORITY_TXT4P(1)	1	0	1701	1
Bin	TX_PRIORITY_TXT4P(0)	0	1	87	1
Bin	TX_PRIORITY_TXT4P(0)	1	0	1688	1
Bin	TX_PRIORITY_TXT5P(2)	0	1	27	1
Bin	TX_PRIORITY_TXT5P(2)	1	0	1628	1
Bin	TX_PRIORITY_TXT5P(1)	0	1	29	1
Bin	TX_PRIORITY_TXT5P(1)	1	0	1630	1
Bin	TX_PRIORITY_TXT5P(0)	0	1	22	1
Bin	TX_PRIORITY_TXT5P(0)	1	0	1623	1
Bin	TX_PRIORITY_TXT6P(2)	0	1	17	1
Bin	TX_PRIORITY_TXT6P(2)	1	0	1618	1
Bin	TX_PRIORITY_TXT6P(1)	0	1	19	1
Bin	TX_PRIORITY_TXT6P(1)	1	0	1620	1
Bin	TX_PRIORITY_TXT6P(0)	0	1	23	1
Bin	TX_PRIORITY_TXT6P(0)	1	0	1624	1
Bin	TX_PRIORITY_TXT7P(2)	0	1	23	1
Bin	TX_PRIORITY_TXT7P(2)	1	0	1624	1
Bin	TX_PRIORITY_TXT7P(1)	0	1	22	1
Bin	TX_PRIORITY_TXT7P(1)	1	0	1623	1
Bin	TX_PRIORITY_TXT7P(0)	0	1	30	1
Bin	TX_PRIORITY_TXT7P(0)	1	0	1631	1
Bin	TX_PRIORITY_TXT8P(2)	0	1	25	1
Bin	TX_PRIORITY_TXT8P(2)	1	0	1626	1
Bin	TX_PRIORITY_TXT8P(1)	0	1	25	1
Bin	TX_PRIORITY_TXT8P(1)	1	0	1626	1
Bin	TX_PRIORITY_TXT8P(0)	0	1	20	1
Bin	TX_PRIORITY_TXT8P(0)	1	0	1621	1
Bin	SSP_CFG_SSP_OFFSET(7)	0	1	25	1
Bin	SSP_CFG_SSP_OFFSET(7)	1	0	1626	1
Bin	SSP_CFG_SSP_OFFSET(6)	0	1	27	1
Bin	SSP_CFG_SSP_OFFSET(6)	1	0	1628	1
Bin	SSP_CFG_SSP_OFFSET(5)	0	1	46	1
Bin	SSP_CFG_SSP_OFFSET(5)	1	0	1647	1
Bin	SSP_CFG_SSP_OFFSET(4)	0	1	53	1
Bin	SSP_CFG_SSP_OFFSET(4)	1	0	1654	1
Bin	SSP_CFG_SSP_OFFSET(3)	0	1	4303	1
Bin	SSP_CFG_SSP_OFFSET(3)	1	0	2714	1
Bin	SSP_CFG_SSP_OFFSET(2)	0	1	527	1
Bin	SSP_CFG_SSP_OFFSET(2)	1	0	2128	1
Bin	SSP_CFG_SSP_OFFSET(1)	0	1	2900	1
Bin	SSP_CFG_SSP_OFFSET(1)	1	0	1311	1
Bin	SSP_CFG_SSP_OFFSET(0)	0	1	2397	1
Bin	SSP_CFG_SSP_OFFSET(0)	1	0	3998	1
Bin	SSP_CFG_SSP_SRC(1)	0	1	45	1
Bin	SSP_CFG_SSP_SRC(1)	1	0	1646	1
Bin	SSP_CFG_SSP_SRC(0)	0	1	814	1
Bin	SSP_CFG_SSP_SRC(0)	1	0	2403	1

---

Signal:

 MR_TST_OUT

	Element	From	To	Count	Threshold
Bin	TST_CONTROL_TMAENA	0	1	648	1
Bin	TST_CONTROL_TMAENA	1	0	2249	1
Bin	TST_CONTROL_TWRSTB	0	1	32324	1
Bin	TST_CONTROL_TWRSTB	1	0	35216	1
Bin	TST_DEST_TST_ADDR(15)	0	1	5	1
Bin	TST_DEST_TST_ADDR(15)	1	0	47001	1
Bin	TST_DEST_TST_ADDR(14)	0	1	5	1
Bin	TST_DEST_TST_ADDR(14)	1	0	47001	1
Bin	TST_DEST_TST_ADDR(13)	0	1	5	1
Bin	TST_DEST_TST_ADDR(13)	1	0	47001	1
Bin	TST_DEST_TST_ADDR(12)	0	1	5	1
Bin	TST_DEST_TST_ADDR(12)	1	0	47001	1
Bin	TST_DEST_TST_ADDR(11)	0	1	325	1
Bin	TST_DEST_TST_ADDR(11)	1	0	47290	1
Bin	TST_DEST_TST_ADDR(10)	0	1	645	1
Bin	TST_DEST_TST_ADDR(10)	1	0	47610	1
Bin	TST_DEST_TST_ADDR(9)	0	1	1285	1
Bin	TST_DEST_TST_ADDR(9)	1	0	48250	1
Bin	TST_DEST_TST_ADDR(8)	0	1	2565	1
Bin	TST_DEST_TST_ADDR(8)	1	0	49530	1
Bin	TST_DEST_TST_ADDR(7)	0	1	5125	1
Bin	TST_DEST_TST_ADDR(7)	1	0	52090	1
Bin	TST_DEST_TST_ADDR(6)	0	1	11205	1
Bin	TST_DEST_TST_ADDR(6)	1	0	58077	1
Bin	TST_DEST_TST_ADDR(5)	0	1	22405	1
Bin	TST_DEST_TST_ADDR(5)	1	0	69277	1
Bin	TST_DEST_TST_ADDR(4)	0	1	3615	1
Bin	TST_DEST_TST_ADDR(4)	1	0	5216	1
Bin	TST_DEST_TST_ADDR(3)	0	1	5035	1
Bin	TST_DEST_TST_ADDR(3)	1	0	6636	1
Bin	TST_DEST_TST_ADDR(2)	0	1	10345	1
Bin	TST_DEST_TST_ADDR(2)	1	0	11946	1
Bin	TST_DEST_TST_ADDR(1)	0	1	22457	1
Bin	TST_DEST_TST_ADDR(1)	1	0	24058	1
Bin	TST_DEST_TST_ADDR(0)	0	1	44877	1
Bin	TST_DEST_TST_ADDR(0)	1	0	46478	1
Bin	TST_DEST_TST_MTGT(3)	0	1	236	1
Bin	TST_DEST_TST_MTGT(3)	1	0	1837	1
Bin	TST_DEST_TST_MTGT(2)	0	1	375	1
Bin	TST_DEST_TST_MTGT(2)	1	0	1976	1
Bin	TST_DEST_TST_MTGT(1)	0	1	517	1
Bin	TST_DEST_TST_MTGT(1)	1	0	2118	1
Bin	TST_DEST_TST_MTGT(0)	0	1	979	1
Bin	TST_DEST_TST_MTGT(0)	1	0	2580	1
Bin	TST_WDATA_TST_WDATA(31)	0	1	1479	1
Bin	TST_WDATA_TST_WDATA(31)	1	0	3080	1
Bin	TST_WDATA_TST_WDATA(30)	0	1	1508	1
Bin	TST_WDATA_TST_WDATA(30)	1	0	3109	1
Bin	TST_WDATA_TST_WDATA(29)	0	1	1591	1
Bin	TST_WDATA_TST_WDATA(29)	1	0	3192	1
Bin	TST_WDATA_TST_WDATA(28)	0	1	1642	1
Bin	TST_WDATA_TST_WDATA(28)	1	0	3243	1
Bin	TST_WDATA_TST_WDATA(27)	0	1	1637	1
Bin	TST_WDATA_TST_WDATA(27)	1	0	3238	1
Bin	TST_WDATA_TST_WDATA(26)	0	1	1645	1
Bin	TST_WDATA_TST_WDATA(26)	1	0	3246	1
Bin	TST_WDATA_TST_WDATA(25)	0	1	1692	1
Bin	TST_WDATA_TST_WDATA(25)	1	0	3293	1
Bin	TST_WDATA_TST_WDATA(24)	0	1	1558	1
Bin	TST_WDATA_TST_WDATA(24)	1	0	3159	1
Bin	TST_WDATA_TST_WDATA(23)	0	1	1525	1
Bin	TST_WDATA_TST_WDATA(23)	1	0	3126	1
Bin	TST_WDATA_TST_WDATA(22)	0	1	1560	1
Bin	TST_WDATA_TST_WDATA(22)	1	0	3161	1
Bin	TST_WDATA_TST_WDATA(21)	0	1	1636	1
Bin	TST_WDATA_TST_WDATA(21)	1	0	3237	1
Bin	TST_WDATA_TST_WDATA(20)	0	1	1654	1
Bin	TST_WDATA_TST_WDATA(20)	1	0	3255	1
Bin	TST_WDATA_TST_WDATA(19)	0	1	1654	1
Bin	TST_WDATA_TST_WDATA(19)	1	0	3255	1
Bin	TST_WDATA_TST_WDATA(18)	0	1	1640	1
Bin	TST_WDATA_TST_WDATA(18)	1	0	3241	1
Bin	TST_WDATA_TST_WDATA(17)	0	1	1672	1
Bin	TST_WDATA_TST_WDATA(17)	1	0	3273	1
Bin	TST_WDATA_TST_WDATA(16)	0	1	1556	1
Bin	TST_WDATA_TST_WDATA(16)	1	0	3157	1
Bin	TST_WDATA_TST_WDATA(15)	0	1	1518	1
Bin	TST_WDATA_TST_WDATA(15)	1	0	3119	1
Bin	TST_WDATA_TST_WDATA(14)	0	1	1529	1
Bin	TST_WDATA_TST_WDATA(14)	1	0	3130	1
Bin	TST_WDATA_TST_WDATA(13)	0	1	1616	1
Bin	TST_WDATA_TST_WDATA(13)	1	0	3217	1
Bin	TST_WDATA_TST_WDATA(12)	0	1	1671	1
Bin	TST_WDATA_TST_WDATA(12)	1	0	3272	1
Bin	TST_WDATA_TST_WDATA(11)	0	1	1638	1
Bin	TST_WDATA_TST_WDATA(11)	1	0	3239	1
Bin	TST_WDATA_TST_WDATA(10)	0	1	1636	1
Bin	TST_WDATA_TST_WDATA(10)	1	0	3237	1
Bin	TST_WDATA_TST_WDATA(9)	0	1	1709	1
Bin	TST_WDATA_TST_WDATA(9)	1	0	3310	1
Bin	TST_WDATA_TST_WDATA(8)	0	1	1561	1
Bin	TST_WDATA_TST_WDATA(8)	1	0	3162	1
Bin	TST_WDATA_TST_WDATA(7)	0	1	1564	1
Bin	TST_WDATA_TST_WDATA(7)	1	0	3165	1
Bin	TST_WDATA_TST_WDATA(6)	0	1	1568	1
Bin	TST_WDATA_TST_WDATA(6)	1	0	3169	1
Bin	TST_WDATA_TST_WDATA(5)	0	1	1667	1
Bin	TST_WDATA_TST_WDATA(5)	1	0	3268	1
Bin	TST_WDATA_TST_WDATA(4)	0	1	1663	1
Bin	TST_WDATA_TST_WDATA(4)	1	0	3264	1
Bin	TST_WDATA_TST_WDATA(3)	0	1	1642	1
Bin	TST_WDATA_TST_WDATA(3)	1	0	3243	1
Bin	TST_WDATA_TST_WDATA(2)	0	1	1675	1
Bin	TST_WDATA_TST_WDATA(2)	1	0	3276	1
Bin	TST_WDATA_TST_WDATA(1)	0	1	1719	1
Bin	TST_WDATA_TST_WDATA(1)	1	0	3320	1
Bin	TST_WDATA_TST_WDATA(0)	0	1	1604	1
Bin	TST_WDATA_TST_WDATA(0)	1	0	3205	1

---

Signal:

 CC_STAT

	Element	From	To	Count	Threshold
Bin	IS_ERR_ACTIVE	0	1	8426	1
Bin	IS_ERR_ACTIVE	1	0	8415	1
Bin	IS_ERR_PASSIVE	0	1	771	1
Bin	IS_ERR_PASSIVE	1	0	2372	1
Bin	IS_BUS_OFF	0	1	8227	1
Bin	IS_BUS_OFF	1	0	8238	1
Bin	IS_TRANSMITTER	0	1	20560	1
Bin	IS_TRANSMITTER	1	0	22161	1
Bin	IS_RECEIVER	0	1	30873	1
Bin	IS_RECEIVER	1	0	32467	1
Bin	IS_IDLE	0	1	56100	1
Bin	IS_IDLE	1	0	57697	1
Bin	TX_ERR_CTR(8)	0	1	249	1
Bin	TX_ERR_CTR(8)	1	0	1850	1
Bin	TX_ERR_CTR(7)	0	1	517	1
Bin	TX_ERR_CTR(7)	1	0	2118	1
Bin	TX_ERR_CTR(6)	0	1	501	1
Bin	TX_ERR_CTR(6)	1	0	2102	1
Bin	TX_ERR_CTR(5)	0	1	805	1
Bin	TX_ERR_CTR(5)	1	0	2406	1
Bin	TX_ERR_CTR(4)	0	1	1933	1
Bin	TX_ERR_CTR(4)	1	0	3534	1
Bin	TX_ERR_CTR(3)	0	1	12743	1
Bin	TX_ERR_CTR(3)	1	0	14344	1
Bin	TX_ERR_CTR(2)	0	1	2955	1
Bin	TX_ERR_CTR(2)	1	0	4556	1
Bin	TX_ERR_CTR(1)	0	1	3324	1
Bin	TX_ERR_CTR(1)	1	0	4925	1
Bin	TX_ERR_CTR(0)	0	1	3524	1
Bin	TX_ERR_CTR(0)	1	0	5125	1
Bin	RX_ERR_CTR(8)	0	1	130	1
Bin	RX_ERR_CTR(8)	1	0	1731	1
Bin	RX_ERR_CTR(7)	0	1	350	1
Bin	RX_ERR_CTR(7)	1	0	1951	1
Bin	RX_ERR_CTR(6)	0	1	255	1
Bin	RX_ERR_CTR(6)	1	0	1854	1
Bin	RX_ERR_CTR(5)	0	1	363	1
Bin	RX_ERR_CTR(5)	1	0	1963	1
Bin	RX_ERR_CTR(4)	0	1	497	1
Bin	RX_ERR_CTR(4)	1	0	2098	1
Bin	RX_ERR_CTR(3)	0	1	685	1
Bin	RX_ERR_CTR(3)	1	0	2285	1
Bin	RX_ERR_CTR(2)	0	1	617	1
Bin	RX_ERR_CTR(2)	1	0	2218	1
Bin	RX_ERR_CTR(1)	0	1	1191	1
Bin	RX_ERR_CTR(1)	1	0	2792	1
Bin	RX_ERR_CTR(0)	0	1	11216	1
Bin	RX_ERR_CTR(0)	1	0	12809	1
Bin	STATUS_PEXS	0	1	75	1
Bin	STATUS_PEXS	1	0	1676	1
Bin	NORM_ERR_CTR(15)	0	1	69	1
Bin	NORM_ERR_CTR(15)	1	0	1667	1
Bin	NORM_ERR_CTR(14)	0	1	67	1
Bin	NORM_ERR_CTR(14)	1	0	1668	1
Bin	NORM_ERR_CTR(13)	0	1	64	1
Bin	NORM_ERR_CTR(13)	1	0	1661	1
Bin	NORM_ERR_CTR(12)	0	1	62	1
Bin	NORM_ERR_CTR(12)	1	0	1659	1
Bin	NORM_ERR_CTR(11)	0	1	64	1
Bin	NORM_ERR_CTR(11)	1	0	1664	1
Bin	NORM_ERR_CTR(10)	0	1	69	1
Bin	NORM_ERR_CTR(10)	1	0	1668	1
Bin	NORM_ERR_CTR(9)	0	1	63	1
Bin	NORM_ERR_CTR(9)	1	0	1662	1
Bin	NORM_ERR_CTR(8)	0	1	71	1
Bin	NORM_ERR_CTR(8)	1	0	1671	1
Bin	NORM_ERR_CTR(7)	0	1	75	1
Bin	NORM_ERR_CTR(7)	1	0	1673	1
Bin	NORM_ERR_CTR(6)	0	1	97	1
Bin	NORM_ERR_CTR(6)	1	0	1696	1
Bin	NORM_ERR_CTR(5)	0	1	155	1
Bin	NORM_ERR_CTR(5)	1	0	1752	1
Bin	NORM_ERR_CTR(4)	0	1	276	1
Bin	NORM_ERR_CTR(4)	1	0	1876	1
Bin	NORM_ERR_CTR(3)	0	1	608	1
Bin	NORM_ERR_CTR(3)	1	0	2205	1
Bin	NORM_ERR_CTR(2)	0	1	1361	1
Bin	NORM_ERR_CTR(2)	1	0	2958	1
Bin	NORM_ERR_CTR(1)	0	1	3082	1
Bin	NORM_ERR_CTR(1)	1	0	4678	1
Bin	NORM_ERR_CTR(0)	0	1	11727	1
Bin	NORM_ERR_CTR(0)	1	0	13323	1
Bin	DATA_ERR_CTR(15)	0	1	63	1
Bin	DATA_ERR_CTR(15)	1	0	1661	1
Bin	DATA_ERR_CTR(14)	0	1	68	1
Bin	DATA_ERR_CTR(14)	1	0	1667	1
Bin	DATA_ERR_CTR(13)	0	1	67	1
Bin	DATA_ERR_CTR(13)	1	0	1665	1
Bin	DATA_ERR_CTR(12)	0	1	65	1
Bin	DATA_ERR_CTR(12)	1	0	1665	1
Bin	DATA_ERR_CTR(11)	0	1	61	1
Bin	DATA_ERR_CTR(11)	1	0	1658	1
Bin	DATA_ERR_CTR(10)	0	1	64	1
Bin	DATA_ERR_CTR(10)	1	0	1661	1
Bin	DATA_ERR_CTR(9)	0	1	75	1
Bin	DATA_ERR_CTR(9)	1	0	1673	1
Bin	DATA_ERR_CTR(8)	0	1	85	1
Bin	DATA_ERR_CTR(8)	1	0	1682	1
Bin	DATA_ERR_CTR(7)	0	1	98	1
Bin	DATA_ERR_CTR(7)	1	0	1696	1
Bin	DATA_ERR_CTR(6)	0	1	133	1
Bin	DATA_ERR_CTR(6)	1	0	1732	1
Bin	DATA_ERR_CTR(5)	0	1	209	1
Bin	DATA_ERR_CTR(5)	1	0	1805	1
Bin	DATA_ERR_CTR(4)	0	1	352	1
Bin	DATA_ERR_CTR(4)	1	0	1952	1
Bin	DATA_ERR_CTR(3)	0	1	680	1
Bin	DATA_ERR_CTR(3)	1	0	2278	1
Bin	DATA_ERR_CTR(2)	0	1	1295	1
Bin	DATA_ERR_CTR(2)	1	0	2895	1
Bin	DATA_ERR_CTR(1)	0	1	2523	1
Bin	DATA_ERR_CTR(1)	1	0	4120	1
Bin	DATA_ERR_CTR(0)	0	1	5589	1
Bin	DATA_ERR_CTR(0)	1	0	7187	1
Bin	ERR_TYPE(2)	0	1	800	1
Bin	ERR_TYPE(2)	1	0	2399	1
Bin	ERR_TYPE(1)	0	1	1263	1
Bin	ERR_TYPE(1)	1	0	2861	1
Bin	ERR_TYPE(0)	0	1	333	1
Bin	ERR_TYPE(0)	1	0	1933	1
Bin	ERR_ERP	0	1	295	1
Bin	ERR_ERP	1	0	1896	1
Bin	ERR_POS(3)	0	1	4188	1
Bin	ERR_POS(3)	1	0	2595	1
Bin	ERR_POS(2)	0	1	4427	1
Bin	ERR_POS(2)	1	0	2828	1
Bin	ERR_POS(1)	0	1	3627	1
Bin	ERR_POS(1)	1	0	2031	1
Bin	ERR_POS(0)	0	1	3049	1
Bin	ERR_POS(0)	1	0	1449	1
Bin	RETR_CTR(3)	0	1	55	1
Bin	RETR_CTR(3)	1	0	1656	1
Bin	RETR_CTR(2)	0	1	134	1
Bin	RETR_CTR(2)	1	0	1735	1
Bin	RETR_CTR(1)	0	1	265	1
Bin	RETR_CTR(1)	1	0	1866	1
Bin	RETR_CTR(0)	0	1	646	1
Bin	RETR_CTR(0)	1	0	2247	1
Bin	ALC_BIT(4)	0	1	69	1
Bin	ALC_BIT(4)	1	0	1668	1
Bin	ALC_BIT(3)	0	1	90	1
Bin	ALC_BIT(3)	1	0	1689	1
Bin	ALC_BIT(2)	0	1	103	1
Bin	ALC_BIT(2)	1	0	1702	1
Bin	ALC_BIT(1)	0	1	173	1
Bin	ALC_BIT(1)	1	0	1772	1
Bin	ALC_BIT(0)	0	1	299	1
Bin	ALC_BIT(0)	1	0	1898	1
Bin	ALC_ID_FIELD(2)	0	1	33	1
Bin	ALC_ID_FIELD(2)	1	0	1634	1
Bin	ALC_ID_FIELD(1)	0	1	42	1
Bin	ALC_ID_FIELD(1)	1	0	1641	1
Bin	ALC_ID_FIELD(0)	0	1	95	1
Bin	ALC_ID_FIELD(0)	1	0	1696	1
Bin	RX_FRAME_CTR(31)	0	1	50	1
Bin	RX_FRAME_CTR(31)	1	0	1649	1
Bin	RX_FRAME_CTR(30)	0	1	56	1
Bin	RX_FRAME_CTR(30)	1	0	1654	1
Bin	RX_FRAME_CTR(29)	0	1	51	1
Bin	RX_FRAME_CTR(29)	1	0	1648	1
Bin	RX_FRAME_CTR(28)	0	1	53	1
Bin	RX_FRAME_CTR(28)	1	0	1652	1
Bin	RX_FRAME_CTR(27)	0	1	47	1
Bin	RX_FRAME_CTR(27)	1	0	1646	1
Bin	RX_FRAME_CTR(26)	0	1	53	1
Bin	RX_FRAME_CTR(26)	1	0	1653	1
Bin	RX_FRAME_CTR(25)	0	1	51	1
Bin	RX_FRAME_CTR(25)	1	0	1649	1
Bin	RX_FRAME_CTR(24)	0	1	47	1
Bin	RX_FRAME_CTR(24)	1	0	1646	1
Bin	RX_FRAME_CTR(23)	0	1	53	1
Bin	RX_FRAME_CTR(23)	1	0	1651	1
Bin	RX_FRAME_CTR(22)	0	1	56	1
Bin	RX_FRAME_CTR(22)	1	0	1655	1
Bin	RX_FRAME_CTR(21)	0	1	50	1
Bin	RX_FRAME_CTR(21)	1	0	1650	1
Bin	RX_FRAME_CTR(20)	0	1	52	1
Bin	RX_FRAME_CTR(20)	1	0	1651	1
Bin	RX_FRAME_CTR(19)	0	1	50	1
Bin	RX_FRAME_CTR(19)	1	0	1649	1
Bin	RX_FRAME_CTR(18)	0	1	51	1
Bin	RX_FRAME_CTR(18)	1	0	1651	1
Bin	RX_FRAME_CTR(17)	0	1	52	1
Bin	RX_FRAME_CTR(17)	1	0	1652	1
Bin	RX_FRAME_CTR(16)	0	1	60	1
Bin	RX_FRAME_CTR(16)	1	0	1658	1
Bin	RX_FRAME_CTR(15)	0	1	50	1
Bin	RX_FRAME_CTR(15)	1	0	1649	1
Bin	RX_FRAME_CTR(14)	0	1	51	1
Bin	RX_FRAME_CTR(14)	1	0	1651	1
Bin	RX_FRAME_CTR(13)	0	1	46	1
Bin	RX_FRAME_CTR(13)	1	0	1647	1
Bin	RX_FRAME_CTR(12)	0	1	48	1
Bin	RX_FRAME_CTR(12)	1	0	1648	1
Bin	RX_FRAME_CTR(11)	0	1	53	1
Bin	RX_FRAME_CTR(11)	1	0	1651	1
Bin	RX_FRAME_CTR(10)	0	1	62	1
Bin	RX_FRAME_CTR(10)	1	0	1659	1
Bin	RX_FRAME_CTR(9)	0	1	55	1
Bin	RX_FRAME_CTR(9)	1	0	1654	1
Bin	RX_FRAME_CTR(8)	0	1	65	1
Bin	RX_FRAME_CTR(8)	1	0	1665	1
Bin	RX_FRAME_CTR(7)	0	1	79	1
Bin	RX_FRAME_CTR(7)	1	0	1678	1
Bin	RX_FRAME_CTR(6)	0	1	111	1
Bin	RX_FRAME_CTR(6)	1	0	1710	1
Bin	RX_FRAME_CTR(5)	0	1	220	1
Bin	RX_FRAME_CTR(5)	1	0	1820	1
Bin	RX_FRAME_CTR(4)	0	1	354	1
Bin	RX_FRAME_CTR(4)	1	0	1952	1
Bin	RX_FRAME_CTR(3)	0	1	751	1
Bin	RX_FRAME_CTR(3)	1	0	2351	1
Bin	RX_FRAME_CTR(2)	0	1	1498	1
Bin	RX_FRAME_CTR(2)	1	0	3095	1
Bin	RX_FRAME_CTR(1)	0	1	2960	1
Bin	RX_FRAME_CTR(1)	1	0	4559	1
Bin	RX_FRAME_CTR(0)	0	1	5900	1
Bin	RX_FRAME_CTR(0)	1	0	7500	1
Bin	TX_FRAME_CTR(31)	0	1	92	1
Bin	TX_FRAME_CTR(31)	1	0	1693	1
Bin	TX_FRAME_CTR(30)	0	1	102	1
Bin	TX_FRAME_CTR(30)	1	0	1703	1
Bin	TX_FRAME_CTR(29)	0	1	108	1
Bin	TX_FRAME_CTR(29)	1	0	1709	1
Bin	TX_FRAME_CTR(28)	0	1	102	1
Bin	TX_FRAME_CTR(28)	1	0	1703	1
Bin	TX_FRAME_CTR(27)	0	1	99	1
Bin	TX_FRAME_CTR(27)	1	0	1700	1
Bin	TX_FRAME_CTR(26)	0	1	111	1
Bin	TX_FRAME_CTR(26)	1	0	1712	1
Bin	TX_FRAME_CTR(25)	0	1	106	1
Bin	TX_FRAME_CTR(25)	1	0	1707	1
Bin	TX_FRAME_CTR(24)	0	1	108	1
Bin	TX_FRAME_CTR(24)	1	0	1709	1
Bin	TX_FRAME_CTR(23)	0	1	100	1
Bin	TX_FRAME_CTR(23)	1	0	1701	1
Bin	TX_FRAME_CTR(22)	0	1	99	1
Bin	TX_FRAME_CTR(22)	1	0	1700	1
Bin	TX_FRAME_CTR(21)	0	1	104	1
Bin	TX_FRAME_CTR(21)	1	0	1705	1
Bin	TX_FRAME_CTR(20)	0	1	104	1
Bin	TX_FRAME_CTR(20)	1	0	1705	1
Bin	TX_FRAME_CTR(19)	0	1	104	1
Bin	TX_FRAME_CTR(19)	1	0	1705	1
Bin	TX_FRAME_CTR(18)	0	1	95	1
Bin	TX_FRAME_CTR(18)	1	0	1696	1
Bin	TX_FRAME_CTR(17)	0	1	101	1
Bin	TX_FRAME_CTR(17)	1	0	1702	1
Bin	TX_FRAME_CTR(16)	0	1	95	1
Bin	TX_FRAME_CTR(16)	1	0	1696	1
Bin	TX_FRAME_CTR(15)	0	1	106	1
Bin	TX_FRAME_CTR(15)	1	0	1707	1
Bin	TX_FRAME_CTR(14)	0	1	105	1
Bin	TX_FRAME_CTR(14)	1	0	1706	1
Bin	TX_FRAME_CTR(13)	0	1	109	1
Bin	TX_FRAME_CTR(13)	1	0	1710	1
Bin	TX_FRAME_CTR(12)	0	1	110	1
Bin	TX_FRAME_CTR(12)	1	0	1711	1
Bin	TX_FRAME_CTR(11)	0	1	98	1
Bin	TX_FRAME_CTR(11)	1	0	1699	1
Bin	TX_FRAME_CTR(10)	0	1	105	1
Bin	TX_FRAME_CTR(10)	1	0	1706	1
Bin	TX_FRAME_CTR(9)	0	1	102	1
Bin	TX_FRAME_CTR(9)	1	0	1703	1
Bin	TX_FRAME_CTR(8)	0	1	105	1
Bin	TX_FRAME_CTR(8)	1	0	1706	1
Bin	TX_FRAME_CTR(7)	0	1	112	1
Bin	TX_FRAME_CTR(7)	1	0	1713	1
Bin	TX_FRAME_CTR(6)	0	1	110	1
Bin	TX_FRAME_CTR(6)	1	0	1711	1
Bin	TX_FRAME_CTR(5)	0	1	126	1
Bin	TX_FRAME_CTR(5)	1	0	1727	1
Bin	TX_FRAME_CTR(4)	0	1	154	1
Bin	TX_FRAME_CTR(4)	1	0	1755	1
Bin	TX_FRAME_CTR(3)	0	1	261	1
Bin	TX_FRAME_CTR(3)	1	0	1862	1
Bin	TX_FRAME_CTR(2)	0	1	603	1
Bin	TX_FRAME_CTR(2)	1	0	2204	1
Bin	TX_FRAME_CTR(1)	0	1	1075	1
Bin	TX_FRAME_CTR(1)	1	0	2676	1
Bin	TX_FRAME_CTR(0)	0	1	2217	1
Bin	TX_FRAME_CTR(0)	1	0	3818	1
Bin	BST_CTR(2)	0	1	33793	1
Bin	BST_CTR(2)	1	0	35393	1
Bin	BST_CTR(1)	0	1	71746	1
Bin	BST_CTR(1)	1	0	73346	1
Bin	BST_CTR(0)	0	1	142471	1
Bin	BST_CTR(0)	1	0	144071	1
Bin	DST_CTR(2)	0	1	117167	1
Bin	DST_CTR(2)	1	0	118766	1
Bin	DST_CTR(1)	0	1	243244	1
Bin	DST_CTR(1)	1	0	244841	1
Bin	DST_CTR(0)	0	1	487033	1
Bin	DST_CTR(0)	1	0	488629	1
Bin	STATUS_EWL	0	1	780	1
Bin	STATUS_EWL	1	0	2380	1

---

Signal:

 PC_DBG

	Element	From	To	Count	Threshold
Bin	IS_SOF	0	1	25148	1
Bin	IS_SOF	1	0	26749	1
Bin	IS_ARBITRATION	0	1	55910	1
Bin	IS_ARBITRATION	1	0	57511	1
Bin	IS_CONTROL	0	1	51266	1
Bin	IS_CONTROL	1	0	52867	1
Bin	IS_DATA	0	1	36655	1
Bin	IS_DATA	1	0	38256	1
Bin	IS_STUFF_COUNT	0	1	13017	1
Bin	IS_STUFF_COUNT	1	0	14618	1
Bin	IS_CRC	0	1	31164	1
Bin	IS_CRC	1	0	32765	1
Bin	IS_CRC_DELIM	0	1	29702	1
Bin	IS_CRC_DELIM	1	0	31303	1
Bin	IS_ACK	0	1	29548	1
Bin	IS_ACK	1	0	31149	1
Bin	IS_ACK_DELIM	0	1	28120	1
Bin	IS_ACK_DELIM	1	0	29721	1
Bin	IS_EOF	0	1	27225	1
Bin	IS_EOF	1	0	28826	1
Bin	IS_OVERLOAD	0	1	529	1
Bin	IS_OVERLOAD	1	0	2130	1
Bin	IS_ERR	0	1	27358	1
Bin	IS_ERR	1	0	28953	1
Bin	IS_INTERMISSION	0	1	51904	1
Bin	IS_INTERMISSION	1	0	53504	1
Bin	IS_SUSPEND	0	1	2849	1
Bin	IS_SUSPEND	1	0	4450	1

---

Signal:

 MR_INT_STAT_RXI_O

	From	To	Count	Threshold
Bin	0	1	806	1
Bin	1	0	2405	1

---

Signal:

 MR_INT_STAT_TXI_O

	From	To	Count	Threshold
Bin	0	1	1214	1
Bin	1	0	2811	1

---

Signal:

 MR_INT_STAT_EWLI_O

	From	To	Count	Threshold
Bin	0	1	594	1
Bin	1	0	2194	1

---

Signal:

 MR_INT_STAT_DOI_O

	From	To	Count	Threshold
Bin	0	1	21	1
Bin	1	0	1622	1

---

Signal:

 MR_INT_STAT_FCSI_O

	From	To	Count	Threshold
Bin	0	1	3304	1
Bin	1	0	4893	1

---

Signal:

 MR_INT_STAT_ALI_O

	From	To	Count	Threshold
Bin	0	1	100	1
Bin	1	0	1699	1

---

Signal:

 MR_INT_STAT_BEI_O

	From	To	Count	Threshold
Bin	0	1	1417	1
Bin	1	0	3010	1

---

Signal:

 MR_INT_STAT_OFI_O

	From	To	Count	Threshold
Bin	0	1	152	1
Bin	1	0	1753	1

---

Signal:

 MR_INT_STAT_RXFI_O

	From	To	Count	Threshold
Bin	0	1	20	1
Bin	1	0	1621	1

---

Signal:

 MR_INT_STAT_BSI_O

	From	To	Count	Threshold
Bin	0	1	1311	1
Bin	1	0	2905	1

---

Signal:

 MR_INT_STAT_RBNEI_O

	From	To	Count	Threshold
Bin	0	1	934	1
Bin	1	0	2533	1

---

Signal:

 MR_INT_STAT_TXBHCI_O

	From	To	Count	Threshold
Bin	0	1	1679	1
Bin	1	0	3276	1

---

Signal:

 MR_INT_ENA_SET_INT_ENA_SET_O

	Element	From	To	Count	Threshold
Bin	(11)	0	1	66	1
Bin	(11)	1	0	1667	1
Bin	(10)	0	1	30	1
Bin	(10)	1	0	1631	1
Bin	(9)	0	1	50	1
Bin	(9)	1	0	1651	1
Bin	(8)	0	1	15	1
Bin	(8)	1	0	1616	1
Bin	(7)	0	1	15	1
Bin	(7)	1	0	1616	1
Bin	(6)	0	1	15	1
Bin	(6)	1	0	1616	1
Bin	(5)	0	1	15	1
Bin	(5)	1	0	1616	1
Bin	(4)	0	1	15	1
Bin	(4)	1	0	1616	1
Bin	(3)	0	1	15	1
Bin	(3)	1	0	1616	1
Bin	(2)	0	1	20	1
Bin	(2)	1	0	1621	1
Bin	(1)	0	1	15	1
Bin	(1)	1	0	1616	1
Bin	(0)	0	1	15	1
Bin	(0)	1	0	1616	1

---

Signal:

 MR_INT_MASK_SET_INT_MASK_SET_O

	Element	From	To	Count	Threshold
Bin	(11)	0	1	22	1
Bin	(11)	1	0	1813	1
Bin	(10)	0	1	20	1
Bin	(10)	1	0	1815	1
Bin	(9)	0	1	20	1
Bin	(9)	1	0	1815	1
Bin	(8)	0	1	5	1
Bin	(8)	1	0	1830	1
Bin	(7)	0	1	5	1
Bin	(7)	1	0	1830	1
Bin	(6)	0	1	5	1
Bin	(6)	1	0	1830	1
Bin	(5)	0	1	5	1
Bin	(5)	1	0	1830	1
Bin	(4)	0	1	5	1
Bin	(4)	1	0	1830	1
Bin	(3)	0	1	5	1
Bin	(3)	1	0	1830	1
Bin	(2)	0	1	5	1
Bin	(2)	1	0	1830	1
Bin	(1)	0	1	10	1
Bin	(1)	1	0	1825	1
Bin	(0)	0	1	10	1
Bin	(0)	1	0	1825	1

---

Signal:

 MR_TST_RDATA_TST_RDATA_RXB

	Element	From	To	Count	Threshold
Bin	(31)	0	1	21399	1
Bin	(31)	1	0	18493	1
Bin	(30)	0	1	12499	1
Bin	(30)	1	0	18612	1
Bin	(29)	0	1	16902	1
Bin	(29)	1	0	13996	1
Bin	(28)	0	1	17082	1
Bin	(28)	1	0	23195	1
Bin	(27)	0	1	17015	1
Bin	(27)	1	0	14109	1
Bin	(26)	0	1	16993	1
Bin	(26)	1	0	23106	1
Bin	(25)	0	1	21615	1
Bin	(25)	1	0	18709	1
Bin	(24)	0	1	12394	1
Bin	(24)	1	0	18507	1
Bin	(23)	0	1	21421	1
Bin	(23)	1	0	18515	1
Bin	(22)	0	1	12559	1
Bin	(22)	1	0	18672	1
Bin	(21)	0	1	16960	1
Bin	(21)	1	0	14054	1
Bin	(20)	0	1	17078	1
Bin	(20)	1	0	23191	1
Bin	(19)	0	1	17010	1
Bin	(19)	1	0	14104	1
Bin	(18)	0	1	16966	1
Bin	(18)	1	0	23079	1
Bin	(17)	0	1	21592	1
Bin	(17)	1	0	18686	1
Bin	(16)	0	1	12366	1
Bin	(16)	1	0	18479	1
Bin	(15)	0	1	21426	1
Bin	(15)	1	0	18520	1
Bin	(14)	0	1	12538	1
Bin	(14)	1	0	18651	1
Bin	(13)	0	1	16985	1
Bin	(13)	1	0	14079	1
Bin	(12)	0	1	17133	1
Bin	(12)	1	0	23246	1
Bin	(11)	0	1	17035	1
Bin	(11)	1	0	14129	1
Bin	(10)	0	1	16976	1
Bin	(10)	1	0	23089	1
Bin	(9)	0	1	21642	1
Bin	(9)	1	0	18736	1
Bin	(8)	0	1	12374	1
Bin	(8)	1	0	18487	1
Bin	(7)	0	1	21491	1
Bin	(7)	1	0	18585	1
Bin	(6)	0	1	12603	1
Bin	(6)	1	0	18716	1
Bin	(5)	0	1	16973	1
Bin	(5)	1	0	14067	1
Bin	(4)	0	1	17089	1
Bin	(4)	1	0	23202	1
Bin	(3)	0	1	17026	1
Bin	(3)	1	0	14120	1
Bin	(2)	0	1	16994	1
Bin	(2)	1	0	23107	1
Bin	(1)	0	1	21633	1
Bin	(1)	1	0	18727	1
Bin	(0)	0	1	12422	1
Bin	(0)	1	0	18535	1

---

Signal:

 MR_TST_RDATA_TST_RDATA_TXB

	Element	From	To	Count	Threshold
Bin	(7)(31)	0	1	113	1
Bin	(7)(31)	1	0	3941	1
Bin	(7)(30)	0	1	109	1
Bin	(7)(30)	1	0	3937	1
Bin	(7)(29)	0	1	117	1
Bin	(7)(29)	1	0	3945	1
Bin	(7)(28)	0	1	126	1
Bin	(7)(28)	1	0	3954	1
Bin	(7)(27)	0	1	120	1
Bin	(7)(27)	1	0	3948	1
Bin	(7)(26)	0	1	132	1
Bin	(7)(26)	1	0	3960	1
Bin	(7)(25)	0	1	123	1
Bin	(7)(25)	1	0	3951	1
Bin	(7)(24)	0	1	115	1
Bin	(7)(24)	1	0	3943	1
Bin	(7)(23)	0	1	117	1
Bin	(7)(23)	1	0	3945	1
Bin	(7)(22)	0	1	118	1
Bin	(7)(22)	1	0	3946	1
Bin	(7)(21)	0	1	122	1
Bin	(7)(21)	1	0	3950	1
Bin	(7)(20)	0	1	120	1
Bin	(7)(20)	1	0	3948	1
Bin	(7)(19)	0	1	117	1
Bin	(7)(19)	1	0	3945	1
Bin	(7)(18)	0	1	124	1
Bin	(7)(18)	1	0	3952	1
Bin	(7)(17)	0	1	120	1
Bin	(7)(17)	1	0	3948	1
Bin	(7)(16)	0	1	125	1
Bin	(7)(16)	1	0	3994	1
Bin	(7)(15)	0	1	127	1
Bin	(7)(15)	1	0	3955	1
Bin	(7)(14)	0	1	111	1
Bin	(7)(14)	1	0	3939	1
Bin	(7)(13)	0	1	122	1
Bin	(7)(13)	1	0	3950	1
Bin	(7)(12)	0	1	118	1
Bin	(7)(12)	1	0	3946	1
Bin	(7)(11)	0	1	124	1
Bin	(7)(11)	1	0	3952	1
Bin	(7)(10)	0	1	122	1
Bin	(7)(10)	1	0	3950	1
Bin	(7)(9)	0	1	125	1
Bin	(7)(9)	1	0	4262	1
Bin	(7)(8)	0	1	122	1
Bin	(7)(8)	1	0	3950	1
Bin	(7)(7)	0	1	128	1
Bin	(7)(7)	1	0	4265	1
Bin	(7)(6)	0	1	125	1
Bin	(7)(6)	1	0	3953	1
Bin	(7)(5)	0	1	112	1
Bin	(7)(5)	1	0	3940	1
Bin	(7)(4)	0	1	124	1
Bin	(7)(4)	1	0	3952	1
Bin	(7)(3)	0	1	119	1
Bin	(7)(3)	1	0	3947	1
Bin	(7)(2)	0	1	123	1
Bin	(7)(2)	1	0	4260	1
Bin	(7)(1)	0	1	122	1
Bin	(7)(1)	1	0	3950	1
Bin	(7)(0)	0	1	120	1
Bin	(7)(0)	1	0	3948	1
Bin	(6)(31)	0	1	121	1
Bin	(6)(31)	1	0	3731	1
Bin	(6)(30)	0	1	111	1
Bin	(6)(30)	1	0	3276	1
Bin	(6)(29)	0	1	123	1
Bin	(6)(29)	1	0	3801	1
Bin	(6)(28)	0	1	146	1
Bin	(6)(28)	1	0	3308	1
Bin	(6)(27)	0	1	127	1
Bin	(6)(27)	1	0	3805	1
Bin	(6)(26)	0	1	146	1
Bin	(6)(26)	1	0	3756	1
Bin	(6)(25)	0	1	127	1
Bin	(6)(25)	1	0	3289	1
Bin	(6)(24)	0	1	117	1
Bin	(6)(24)	1	0	3279	1
Bin	(6)(23)	0	1	129	1
Bin	(6)(23)	1	0	3739	1
Bin	(6)(22)	0	1	129	1
Bin	(6)(22)	1	0	3778	1
Bin	(6)(21)	0	1	136	1
Bin	(6)(21)	1	0	3785	1
Bin	(6)(20)	0	1	140	1
Bin	(6)(20)	1	0	3750	1
Bin	(6)(19)	0	1	130	1
Bin	(6)(19)	1	0	3292	1
Bin	(6)(18)	0	1	134	1
Bin	(6)(18)	1	0	3335	1
Bin	(6)(17)	0	1	127	1
Bin	(6)(17)	1	0	3737	1
Bin	(6)(16)	0	1	128	1
Bin	(6)(16)	1	0	3375	1
Bin	(6)(15)	0	1	124	1
Bin	(6)(15)	1	0	3773	1
Bin	(6)(14)	0	1	123	1
Bin	(6)(14)	1	0	3285	1
Bin	(6)(13)	0	1	130	1
Bin	(6)(13)	1	0	3740	1
Bin	(6)(12)	0	1	127	1
Bin	(6)(12)	1	0	3737	1
Bin	(6)(11)	0	1	119	1
Bin	(6)(11)	1	0	3281	1
Bin	(6)(10)	0	1	134	1
Bin	(6)(10)	1	0	3296	1
Bin	(6)(9)	0	1	133	1
Bin	(6)(9)	1	0	3334	1
Bin	(6)(8)	0	1	127	1
Bin	(6)(8)	1	0	3328	1
Bin	(6)(7)	0	1	135	1
Bin	(6)(7)	1	0	3325	1
Bin	(6)(6)	0	1	133	1
Bin	(6)(6)	1	0	3605	1
Bin	(6)(5)	0	1	131	1
Bin	(6)(5)	1	0	3769	1
Bin	(6)(4)	0	1	131	1
Bin	(6)(4)	1	0	3293	1
Bin	(6)(3)	0	1	138	1
Bin	(6)(3)	1	0	3776	1
Bin	(6)(2)	0	1	139	1
Bin	(6)(2)	1	0	4060	1
Bin	(6)(1)	0	1	128	1
Bin	(6)(1)	1	0	3612	1
Bin	(6)(0)	0	1	130	1
Bin	(6)(0)	1	0	3359	1
Bin	(5)(31)	0	1	113	1
Bin	(5)(31)	1	0	2955	1
Bin	(5)(30)	0	1	115	1
Bin	(5)(30)	1	0	2957	1
Bin	(5)(29)	0	1	120	1
Bin	(5)(29)	1	0	3868	1
Bin	(5)(28)	0	1	132	1
Bin	(5)(28)	1	0	3903	1
Bin	(5)(27)	0	1	128	1
Bin	(5)(27)	1	0	2976	1
Bin	(5)(26)	0	1	123	1
Bin	(5)(26)	1	0	2982	1
Bin	(5)(25)	0	1	141	1
Bin	(5)(25)	1	0	3912	1
Bin	(5)(24)	0	1	122	1
Bin	(5)(24)	1	0	2964	1
Bin	(5)(23)	0	1	131	1
Bin	(5)(23)	1	0	3896	1
Bin	(5)(22)	0	1	119	1
Bin	(5)(22)	1	0	2961	1
Bin	(5)(21)	0	1	132	1
Bin	(5)(21)	1	0	3933	1
Bin	(5)(20)	0	1	128	1
Bin	(5)(20)	1	0	3882	1
Bin	(5)(19)	0	1	126	1
Bin	(5)(19)	1	0	2985	1
Bin	(5)(18)	0	1	126	1
Bin	(5)(18)	1	0	2968	1
Bin	(5)(17)	0	1	120	1
Bin	(5)(17)	1	0	2979	1
Bin	(5)(16)	0	1	123	1
Bin	(5)(16)	1	0	2971	1
Bin	(5)(15)	0	1	119	1
Bin	(5)(15)	1	0	3884	1
Bin	(5)(14)	0	1	119	1
Bin	(5)(14)	1	0	2961	1
Bin	(5)(13)	0	1	125	1
Bin	(5)(13)	1	0	3890	1
Bin	(5)(12)	0	1	121	1
Bin	(5)(12)	1	0	2963	1
Bin	(5)(11)	0	1	125	1
Bin	(5)(11)	1	0	3890	1
Bin	(5)(10)	0	1	117	1
Bin	(5)(10)	1	0	3871	1
Bin	(5)(9)	0	1	126	1
Bin	(5)(9)	1	0	3328	1
Bin	(5)(8)	0	1	127	1
Bin	(5)(8)	1	0	3881	1
Bin	(5)(7)	0	1	127	1
Bin	(5)(7)	1	0	3331	1
Bin	(5)(6)	0	1	112	1
Bin	(5)(6)	1	0	3044	1
Bin	(5)(5)	0	1	124	1
Bin	(5)(5)	1	0	3895	1
Bin	(5)(4)	0	1	127	1
Bin	(5)(4)	1	0	3881	1
Bin	(5)(3)	0	1	122	1
Bin	(5)(3)	1	0	4131	1
Bin	(5)(2)	0	1	127	1
Bin	(5)(2)	1	0	2992	1
Bin	(5)(1)	0	1	121	1
Bin	(5)(1)	1	0	3869	1
Bin	(5)(0)	0	1	119	1
Bin	(5)(0)	1	0	3062	1
Bin	(4)(31)	0	1	109	1
Bin	(4)(31)	1	0	2270	1
Bin	(4)(30)	0	1	120	1
Bin	(4)(30)	1	0	2270	1
Bin	(4)(29)	0	1	123	1
Bin	(4)(29)	1	0	2273	1
Bin	(4)(28)	0	1	133	1
Bin	(4)(28)	1	0	2363	1
Bin	(4)(27)	0	1	140	1
Bin	(4)(27)	1	0	3712	1
Bin	(4)(26)	0	1	138	1
Bin	(4)(26)	1	0	2365	1
Bin	(4)(25)	0	1	139	1
Bin	(4)(25)	1	0	2308	1
Bin	(4)(24)	0	1	144	1
Bin	(4)(24)	1	0	3944	1
Bin	(4)(23)	0	1	137	1
Bin	(4)(23)	1	0	3795	1
Bin	(4)(22)	0	1	149	1
Bin	(4)(22)	1	0	4051	1
Bin	(4)(21)	0	1	144	1
Bin	(4)(21)	1	0	3863	1
Bin	(4)(20)	0	1	142	1
Bin	(4)(20)	1	0	2709	1
Bin	(4)(19)	0	1	149	1
Bin	(4)(19)	1	0	4127	1
Bin	(4)(18)	0	1	136	1
Bin	(4)(18)	1	0	4025	1
Bin	(4)(17)	0	1	138	1
Bin	(4)(17)	1	0	3902	1
Bin	(4)(16)	0	1	128	1
Bin	(4)(16)	1	0	2509	1
Bin	(4)(15)	0	1	122	1
Bin	(4)(15)	1	0	2522	1
Bin	(4)(14)	0	1	141	1
Bin	(4)(14)	1	0	2567	1
Bin	(4)(13)	0	1	128	1
Bin	(4)(13)	1	0	3907	1
Bin	(4)(12)	0	1	127	1
Bin	(4)(12)	1	0	3906	1
Bin	(4)(11)	0	1	137	1
Bin	(4)(11)	1	0	2706	1
Bin	(4)(10)	0	1	132	1
Bin	(4)(10)	1	0	2638	1
Bin	(4)(9)	0	1	143	1
Bin	(4)(9)	1	0	4062	1
Bin	(4)(8)	0	1	136	1
Bin	(4)(8)	1	0	2441	1
Bin	(4)(7)	0	1	136	1
Bin	(4)(7)	1	0	2313	1
Bin	(4)(6)	0	1	137	1
Bin	(4)(6)	1	0	4007	1
Bin	(4)(5)	0	1	133	1
Bin	(4)(5)	1	0	2533	1
Bin	(4)(4)	0	1	132	1
Bin	(4)(4)	1	0	2422	1
Bin	(4)(3)	0	1	134	1
Bin	(4)(3)	1	0	2640	1
Bin	(4)(2)	0	1	133	1
Bin	(4)(2)	1	0	2673	1
Bin	(4)(1)	0	1	140	1
Bin	(4)(1)	1	0	2322	1
Bin	(4)(0)	0	1	139	1
Bin	(4)(0)	1	0	3903	1
Bin	(3)(31)	0	1	470	1
Bin	(3)(31)	1	0	7574	1
Bin	(3)(30)	0	1	463	1
Bin	(3)(30)	1	0	9389	1
Bin	(3)(29)	0	1	468	1
Bin	(3)(29)	1	0	7572	1
Bin	(3)(28)	0	1	522	1
Bin	(3)(28)	1	0	7807	1
Bin	(3)(27)	0	1	484	1
Bin	(3)(27)	1	0	7609	1
Bin	(3)(26)	0	1	524	1
Bin	(3)(26)	1	0	7797	1
Bin	(3)(25)	0	1	504	1
Bin	(3)(25)	1	0	7652	1
Bin	(3)(24)	0	1	511	1
Bin	(3)(24)	1	0	7651	1
Bin	(3)(23)	0	1	506	1
Bin	(3)(23)	1	0	7826	1
Bin	(3)(22)	0	1	498	1
Bin	(3)(22)	1	0	7646	1
Bin	(3)(21)	0	1	507	1
Bin	(3)(21)	1	0	9682	1
Bin	(3)(20)	0	1	494	1
Bin	(3)(20)	1	0	9433	1
Bin	(3)(19)	0	1	521	1
Bin	(3)(19)	1	0	9677	1
Bin	(3)(18)	0	1	517	1
Bin	(3)(18)	1	0	7809	1
Bin	(3)(17)	0	1	491	1
Bin	(3)(17)	1	0	9632	1
Bin	(3)(16)	0	1	495	1
Bin	(3)(16)	1	0	7855	1
Bin	(3)(15)	0	1	504	1
Bin	(3)(15)	1	0	7948	1
Bin	(3)(14)	0	1	496	1
Bin	(3)(14)	1	0	7976	1
Bin	(3)(13)	0	1	495	1
Bin	(3)(13)	1	0	7975	1
Bin	(3)(12)	0	1	503	1
Bin	(3)(12)	1	0	7960	1
Bin	(3)(11)	0	1	492	1
Bin	(3)(11)	1	0	7735	1
Bin	(3)(10)	0	1	490	1
Bin	(3)(10)	1	0	9756	1
Bin	(3)(9)	0	1	496	1
Bin	(3)(9)	1	0	10056	1
Bin	(3)(8)	0	1	486	1
Bin	(3)(8)	1	0	7930	1
Bin	(3)(7)	0	1	519	1
Bin	(3)(7)	1	0	9756	1
Bin	(3)(6)	0	1	498	1
Bin	(3)(6)	1	0	8280	1
Bin	(3)(5)	0	1	514	1
Bin	(3)(5)	1	0	9714	1
Bin	(3)(4)	0	1	497	1
Bin	(3)(4)	1	0	9466	1
Bin	(3)(3)	0	1	492	1
Bin	(3)(3)	1	0	9794	1
Bin	(3)(2)	0	1	502	1
Bin	(3)(2)	1	0	7781	1
Bin	(3)(1)	0	1	510	1
Bin	(3)(1)	1	0	8259	1
Bin	(3)(0)	0	1	503	1
Bin	(3)(0)	1	0	10046	1
Bin	(2)(31)	0	1	482	1
Bin	(2)(31)	1	0	8071	1
Bin	(2)(30)	0	1	457	1
Bin	(2)(30)	1	0	6258	1
Bin	(2)(29)	0	1	492	1
Bin	(2)(29)	1	0	8833	1
Bin	(2)(28)	0	1	524	1
Bin	(2)(28)	1	0	9020	1
Bin	(2)(27)	0	1	557	1
Bin	(2)(27)	1	0	9038	1
Bin	(2)(26)	0	1	527	1
Bin	(2)(26)	1	0	8085	1
Bin	(2)(25)	0	1	557	1
Bin	(2)(25)	1	0	5697	1
Bin	(2)(24)	0	1	535	1
Bin	(2)(24)	1	0	6518	1
Bin	(2)(23)	0	1	556	1
Bin	(2)(23)	1	0	7854	1
Bin	(2)(22)	0	1	539	1
Bin	(2)(22)	1	0	8325	1
Bin	(2)(21)	0	1	563	1
Bin	(2)(21)	1	0	6451	1
Bin	(2)(20)	0	1	558	1
Bin	(2)(20)	1	0	9357	1
Bin	(2)(19)	0	1	546	1
Bin	(2)(19)	1	0	8028	1
Bin	(2)(18)	0	1	565	1
Bin	(2)(18)	1	0	8578	1
Bin	(2)(17)	0	1	503	1
Bin	(2)(17)	1	0	8147	1
Bin	(2)(16)	0	1	519	1
Bin	(2)(16)	1	0	7940	1
Bin	(2)(15)	0	1	525	1
Bin	(2)(15)	1	0	8799	1
Bin	(2)(14)	0	1	504	1
Bin	(2)(14)	1	0	8397	1
Bin	(2)(13)	0	1	517	1
Bin	(2)(13)	1	0	7695	1
Bin	(2)(12)	0	1	524	1
Bin	(2)(12)	1	0	8550	1
Bin	(2)(11)	0	1	529	1
Bin	(2)(11)	1	0	5759	1
Bin	(2)(10)	0	1	520	1
Bin	(2)(10)	1	0	6791	1
Bin	(2)(9)	0	1	525	1
Bin	(2)(9)	1	0	8062	1
Bin	(2)(8)	0	1	521	1
Bin	(2)(8)	1	0	8536	1
Bin	(2)(7)	0	1	543	1
Bin	(2)(7)	1	0	6153	1
Bin	(2)(6)	0	1	517	1
Bin	(2)(6)	1	0	6595	1
Bin	(2)(5)	0	1	536	1
Bin	(2)(5)	1	0	6884	1
Bin	(2)(4)	0	1	521	1
Bin	(2)(4)	1	0	8099	1
Bin	(2)(3)	0	1	506	1
Bin	(2)(3)	1	0	8107	1
Bin	(2)(2)	0	1	527	1
Bin	(2)(2)	1	0	6892	1
Bin	(2)(1)	0	1	517	1
Bin	(2)(1)	1	0	8562	1
Bin	(2)(0)	0	1	541	1
Bin	(2)(0)	1	0	8836	1
Bin	(1)(31)	0	1	587	1
Bin	(1)(31)	1	0	9835	1
Bin	(1)(30)	0	1	601	1
Bin	(1)(30)	1	0	10110	1
Bin	(1)(29)	0	1	591	1
Bin	(1)(29)	1	0	7947	1
Bin	(1)(28)	0	1	632	1
Bin	(1)(28)	1	0	7657	1
Bin	(1)(27)	0	1	638	1
Bin	(1)(27)	1	0	10431	1
Bin	(1)(26)	0	1	619	1
Bin	(1)(26)	1	0	9907	1
Bin	(1)(25)	0	1	627	1
Bin	(1)(25)	1	0	6398	1
Bin	(1)(24)	0	1	617	1
Bin	(1)(24)	1	0	7638	1
Bin	(1)(23)	0	1	644	1
Bin	(1)(23)	1	0	7395	1
Bin	(1)(22)	0	1	634	1
Bin	(1)(22)	1	0	7322	1
Bin	(1)(21)	0	1	649	1
Bin	(1)(21)	1	0	9201	1
Bin	(1)(20)	0	1	638	1
Bin	(1)(20)	1	0	7676	1
Bin	(1)(19)	0	1	643	1
Bin	(1)(19)	1	0	8561	1
Bin	(1)(18)	0	1	637	1
Bin	(1)(18)	1	0	6598	1
Bin	(1)(17)	0	1	622	1
Bin	(1)(17)	1	0	9885	1
Bin	(1)(16)	0	1	584	1
Bin	(1)(16)	1	0	7931	1
Bin	(1)(15)	0	1	617	1
Bin	(1)(15)	1	0	7642	1
Bin	(1)(14)	0	1	599	1
Bin	(1)(14)	1	0	6290	1
Bin	(1)(13)	0	1	604	1
Bin	(1)(13)	1	0	10282	1
Bin	(1)(12)	0	1	611	1
Bin	(1)(12)	1	0	7551	1
Bin	(1)(11)	0	1	608	1
Bin	(1)(11)	1	0	6226	1
Bin	(1)(10)	0	1	607	1
Bin	(1)(10)	1	0	7462	1
Bin	(1)(9)	0	1	628	1
Bin	(1)(9)	1	0	9228	1
Bin	(1)(8)	0	1	601	1
Bin	(1)(8)	1	0	7279	1
Bin	(1)(7)	0	1	631	1
Bin	(1)(7)	1	0	11477	1
Bin	(1)(6)	0	1	633	1
Bin	(1)(6)	1	0	7324	1
Bin	(1)(5)	0	1	613	1
Bin	(1)(5)	1	0	8481	1
Bin	(1)(4)	0	1	624	1
Bin	(1)(4)	1	0	9888	1
Bin	(1)(3)	0	1	624	1
Bin	(1)(3)	1	0	8233	1
Bin	(1)(2)	0	1	628	1
Bin	(1)(2)	1	0	7615	1
Bin	(1)(1)	0	1	621	1
Bin	(1)(1)	1	0	8054	1
Bin	(1)(0)	0	1	618	1
Bin	(1)(0)	1	0	8633	1
Bin	(0)(31)	0	1	586	1
Bin	(0)(31)	1	0	5549	1
Bin	(0)(30)	0	1	587	1
Bin	(0)(30)	1	0	10586	1
Bin	(0)(29)	0	1	583	1
Bin	(0)(29)	1	0	6506	1
Bin	(0)(28)	0	1	671	1
Bin	(0)(28)	1	0	4483	1
Bin	(0)(27)	0	1	643	1
Bin	(0)(27)	1	0	6098	1
Bin	(0)(26)	0	1	642	1
Bin	(0)(26)	1	0	7320	1
Bin	(0)(25)	0	1	656	1
Bin	(0)(25)	1	0	4674	1
Bin	(0)(24)	0	1	650	1
Bin	(0)(24)	1	0	8903	1
Bin	(0)(23)	0	1	676	1
Bin	(0)(23)	1	0	4472	1
Bin	(0)(22)	0	1	660	1
Bin	(0)(22)	1	0	3748	1
Bin	(0)(21)	0	1	662	1
Bin	(0)(21)	1	0	8926	1
Bin	(0)(20)	0	1	654	1
Bin	(0)(20)	1	0	6035	1
Bin	(0)(19)	0	1	645	1
Bin	(0)(19)	1	0	7435	1
Bin	(0)(18)	0	1	666	1
Bin	(0)(18)	1	0	9201	1
Bin	(0)(17)	0	1	648	1
Bin	(0)(17)	1	0	9079	1
Bin	(0)(16)	0	1	610	1
Bin	(0)(16)	1	0	5742	1
Bin	(0)(15)	0	1	631	1
Bin	(0)(15)	1	0	6085	1
Bin	(0)(14)	0	1	626	1
Bin	(0)(14)	1	0	7613	1
Bin	(0)(13)	0	1	605	1
Bin	(0)(13)	1	0	7443	1
Bin	(0)(12)	0	1	629	1
Bin	(0)(12)	1	0	8429	1
Bin	(0)(11)	0	1	609	1
Bin	(0)(11)	1	0	2475	1
Bin	(0)(10)	0	1	618	1
Bin	(0)(10)	1	0	3783	1
Bin	(0)(9)	0	1	629	1
Bin	(0)(9)	1	0	8099	1
Bin	(0)(8)	0	1	616	1
Bin	(0)(8)	1	0	5784	1
Bin	(0)(7)	0	1	647	1
Bin	(0)(7)	1	0	4514	1
Bin	(0)(6)	0	1	644	1
Bin	(0)(6)	1	0	10153	1
Bin	(0)(5)	0	1	637	1
Bin	(0)(5)	1	0	7853	1
Bin	(0)(4)	0	1	616	1
Bin	(0)(4)	1	0	3741	1
Bin	(0)(3)	0	1	642	1
Bin	(0)(3)	1	0	8904	1
Bin	(0)(2)	0	1	634	1
Bin	(0)(2)	1	0	8959	1
Bin	(0)(1)	0	1	650	1
Bin	(0)(1)	1	0	8603	1
Bin	(0)(0)	0	1	621	1
Bin	(0)(0)	1	0	7553	1

---

Signal:

 RXB_PORT_B_DATA_OUT

	Element	From	To	Count	Threshold
Bin	(31)	0	1	3128	1
Bin	(31)	1	0	6330	1
Bin	(30)	0	1	3405	1
Bin	(30)	1	0	6607	1
Bin	(29)	0	1	3235	1
Bin	(29)	1	0	6437	1
Bin	(28)	0	1	7281	1
Bin	(28)	1	0	10483	1
Bin	(27)	0	1	7210	1
Bin	(27)	1	0	10412	1
Bin	(26)	0	1	6752	1
Bin	(26)	1	0	9954	1
Bin	(25)	0	1	6614	1
Bin	(25)	1	0	9816	1
Bin	(24)	0	1	12777	1
Bin	(24)	1	0	15977	1
Bin	(23)	0	1	6836	1
Bin	(23)	1	0	10038	1
Bin	(22)	0	1	7147	1
Bin	(22)	1	0	10349	1
Bin	(21)	0	1	7197	1
Bin	(21)	1	0	10399	1
Bin	(20)	0	1	7293	1
Bin	(20)	1	0	10495	1
Bin	(19)	0	1	8608	1
Bin	(19)	1	0	11810	1
Bin	(18)	0	1	9052	1
Bin	(18)	1	0	12254	1
Bin	(17)	0	1	7834	1
Bin	(17)	1	0	11036	1
Bin	(16)	0	1	8071	1
Bin	(16)	1	0	11273	1
Bin	(15)	0	1	8310	1
Bin	(15)	1	0	11512	1
Bin	(14)	0	1	9553	1
Bin	(14)	1	0	12755	1
Bin	(13)	0	1	12231	1
Bin	(13)	1	0	15433	1
Bin	(12)	0	1	13751	1
Bin	(12)	1	0	16951	1
Bin	(11)	0	1	15302	1
Bin	(11)	1	0	18502	1
Bin	(10)	0	1	9846	1
Bin	(10)	1	0	13048	1
Bin	(9)	0	1	11261	1
Bin	(9)	1	0	14463	1
Bin	(8)	0	1	9793	1
Bin	(8)	1	0	12995	1
Bin	(7)	0	1	12942	1
Bin	(7)	1	0	16144	1
Bin	(6)	0	1	11665	1
Bin	(6)	1	0	14867	1
Bin	(5)	0	1	12281	1
Bin	(5)	1	0	15483	1
Bin	(4)	0	1	9731	1
Bin	(4)	1	0	12933	1
Bin	(3)	0	1	10763	1
Bin	(3)	1	0	13965	1
Bin	(2)	0	1	11082	1
Bin	(2)	1	0	14284	1
Bin	(1)	0	1	11748	1
Bin	(1)	1	0	14950	1
Bin	(0)	0	1	11917	1
Bin	(0)	1	0	15119	1

---

Signal:

 PC_RX_TRIGGER

	From	To	Count	Threshold
Bin	0	1	10401065	1
Bin	1	0	10402666	1

---

Signal:

 MR_TX_COMMAND_TXBI

	Element	From	To	Count	Threshold
Bin	(7)	0	1	78	1
Bin	(7)	1	0	1128	1
Bin	(6)	0	1	76	1
Bin	(6)	1	0	1130	1
Bin	(5)	0	1	78	1
Bin	(5)	1	0	1128	1
Bin	(4)	0	1	84	1
Bin	(4)	1	0	1122	1
Bin	(3)	0	1	396	1
Bin	(3)	1	0	4047	1
Bin	(2)	0	1	319	1
Bin	(2)	1	0	4124	1
Bin	(1)	0	1	5639	1
Bin	(1)	1	0	10512	1
Bin	(0)	0	1	6554	1
Bin	(0)	1	0	9597	1

---

Signal:

 MR_TX_PRIORITY

	Element	From	To	Count	Threshold
Bin	(7)(2)	0	1	109	1
Bin	(7)(2)	1	0	376	1
Bin	(7)(1)	0	1	114	1
Bin	(7)(1)	1	0	367	1
Bin	(7)(0)	0	1	98	1
Bin	(7)(0)	1	0	363	1
Bin	(6)(2)	0	1	114	1
Bin	(6)(2)	1	0	359	1
Bin	(6)(1)	0	1	103	1
Bin	(6)(1)	1	0	334	1
Bin	(6)(0)	0	1	161	1
Bin	(6)(0)	1	0	408	1
Bin	(5)(2)	0	1	100	1
Bin	(5)(2)	1	0	334	1
Bin	(5)(1)	0	1	133	1
Bin	(5)(1)	1	0	331	1
Bin	(5)(0)	0	1	128	1
Bin	(5)(0)	1	0	356	1
Bin	(4)(2)	0	1	178	1
Bin	(4)(2)	1	0	361	1
Bin	(4)(1)	0	1	161	1
Bin	(4)(1)	1	0	373	1
Bin	(4)(0)	0	1	132	1
Bin	(4)(0)	1	0	317	1
Bin	(3)(2)	0	1	304	1
Bin	(3)(2)	1	0	1149	1
Bin	(3)(1)	0	1	321	1
Bin	(3)(1)	1	0	1174	1
Bin	(3)(0)	0	1	296	1
Bin	(3)(0)	1	0	1092	1
Bin	(2)(2)	0	1	332	1
Bin	(2)(2)	1	0	1070	1
Bin	(2)(1)	0	1	331	1
Bin	(2)(1)	1	0	1129	1
Bin	(2)(0)	0	1	402	1
Bin	(2)(0)	1	0	1109	1
Bin	(1)(2)	0	1	385	1
Bin	(1)(2)	1	0	1923	1
Bin	(1)(1)	0	1	373	1
Bin	(1)(1)	1	0	2008	1
Bin	(1)(0)	0	1	401	1
Bin	(1)(0)	1	0	1977	1
Bin	(0)(2)	0	1	470	1
Bin	(0)(2)	1	0	1944	1
Bin	(0)(1)	0	1	402	1
Bin	(0)(1)	1	0	2030	1
Bin	(0)(0)	0	1	2052	1
Bin	(0)(0)	1	0	468	1