| Nested Instances | Statement | Branch | Toggle | Expression | FSM state | Functional | Average |
|---|---|---|---|---|---|---|---|
| I_MAC_PC_FSM | 100.0 % (1193/1193) | 100.0 % (790/790) | 100.0 % (850/850) | 100.0 % (1215/1215) | 100.0 % (76/76) | N.A. | 100.0 % (4124/4124) |
| I_MAC_PC_CONTROL_COUNTER | 100.0 % (45/45) | 100.0 % (40/40) | 100.0 % (158/158) | 100.0 % (33/33) | N.A. | N.A. | 100.0 % (276/276) |
| I_MAC_PC_REINTEGRATION_COUNTER | 100.0 % (13/13) | 100.0 % (12/12) | 100.0 % (46/46) | 100.0 % (18/18) | N.A. | N.A. | 100.0 % (89/89) |
| I_MAC_PC_RETRANSMITT_COUNTER | 100.0 % (15/15) | 100.0 % (14/14) | 100.0 % (46/46) | 100.0 % (25/25) | N.A. | N.A. | 100.0 % (100/100) |
| I_MAC_PC_ERR_DETECTOR | 100.0 % (78/78) | 100.0 % (72/72) | 100.0 % (388/388) | 100.0 % (123/123) | N.A. | 100.0 % (13/13) | 100.0 % (674/674) |
| I_MAC_PC_TX_SHIFT_REG | 100.0 % (57/57) | 100.0 % (52/52) | 100.0 % (844/844) | 100.0 % (86/86) | N.A. | N.A. | 100.0 % (1039/1039) |
| I_MAC_PC_RX_SHIFT_REG | 100.0 % (93/93) | 100.0 % (98/98) | 100.0 % (508/508) | 96.8 % (92/95) | N.A. | N.A. | 99.6 % (791/794) |
| Current Instance | Statement | Branch | Toggle | Expression | FSM state | Functional | Average |
|---|---|---|---|---|---|---|---|
| CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.I_DUT.I_MAC_TOP.I_MAC_PC_TOP | 100.0 % (9/9) | N.A. | 100.0 % (902/902) | N.A. | N.A. | N.A. | 100.0 % (911/911) |
| Statement | Branch | Toggle | Expression | FSM state | Functional |
|---|
957: rec_frame_type <= rec_frame_type_i; 958: rec_is_rtr <= rec_is_rtr_i; 959: rec_dlc <= rec_dlc_q; 960: form_err <= form_err_i; 961: ack_err <= ack_err_i; 962: crc_err <= crc_err_i; 963: fixed_stuff <= fixed_stuff_i; 964: arbitration_lost <= arbitration_lost_i; 965: pc_dbg <= pc_dbg_i; CLK_SYS| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
RST_N| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
SCAN_MODE| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_MODE_ACF| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_MODE_STM| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_MODE_BMM| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_MODE_FDE| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_MODE_ROM| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_MODE_TSTM| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_MODE_SAM| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_SETTINGS_ENA| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_SETTINGS_NISOFD| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_SETTINGS_RTRTH| Element | From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|---|
| Bin | (3) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (3) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (2) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (2) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (1) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (1) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (0) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (0) | 1 | 0 | 0 | 1 | Exclude file |
MR_SETTINGS_RTRLE| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_SETTINGS_ILBP| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_SETTINGS_PEX| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_COMMAND_ERCRST| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_COMMAND_CPEXS| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
MR_SSP_CFG_SSP_SRC| Element | From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|---|
| Bin | (1) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (1) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (0) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (0) | 1 | 0 | 0 | 1 | Exclude file |
TRAN_WORD| Element | From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|---|
| Bin | (31) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (31) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (30) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (30) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (29) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (29) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (28) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (28) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (27) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (27) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (26) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (26) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (25) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (25) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (24) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (24) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (23) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (23) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (22) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (22) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (21) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (21) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (20) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (20) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (19) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (19) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (18) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (18) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (17) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (17) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (16) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (16) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (15) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (15) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (14) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (14) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (13) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (13) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (12) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (12) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (11) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (11) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (10) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (10) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (9) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (9) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (8) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (8) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (7) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (7) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (6) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (6) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (5) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (5) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (4) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (4) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (3) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (3) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (2) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (2) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (1) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (1) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (0) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (0) | 1 | 0 | 0 | 1 | Exclude file |
TRAN_DLC| Element | From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|---|
| Bin | (3) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (3) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (2) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (2) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (1) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (1) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (0) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (0) | 1 | 0 | 0 | 1 | Exclude file |
TRAN_IS_RTR| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
TRAN_IDENT_TYPE| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
TRAN_FRAME_TYPE| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
TRAN_BRS| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
TRAN_IDENTIFIER| Element | From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|---|
| Bin | (28) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (28) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (27) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (27) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (26) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (26) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (25) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (25) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (24) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (24) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (23) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (23) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (22) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (22) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (21) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (21) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (20) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (20) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (19) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (19) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (18) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (18) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (17) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (17) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (16) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (16) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (15) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (15) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (14) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (14) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (13) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (13) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (12) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (12) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (11) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (11) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (10) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (10) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (9) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (9) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (8) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (8) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (7) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (7) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (6) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (6) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (5) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (5) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (4) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (4) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (3) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (3) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (2) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (2) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (1) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (1) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (0) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (0) | 1 | 0 | 0 | 1 | Exclude file |
TRAN_FRAME_VALID| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
TRAN_FRAME_PARITY_ERROR| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
TXTB_CHANGED| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
IS_TRANSMITTER| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
IS_RECEIVER| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
IS_ERR_ACTIVE| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
IS_ERR_PASSIVE| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
IS_BUS_OFF| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
TX_TRIGGER| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
RX_TRIGGER| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
TX_DATA_WBS| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
RX_DATA_NBS| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
DST_CTR| Element | From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|---|
| Bin | (2) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (2) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (1) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (1) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (0) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (0) | 1 | 0 | 0 | 1 | Exclude file |
BST_CTR| Element | From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|---|
| Bin | (2) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (2) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (1) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (1) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (0) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (0) | 1 | 0 | 0 | 1 | Exclude file |
STUFF_ERR| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
BIT_ERR| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
SYNC_EDGE| From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|
| Bin | 0 | 1 | 0 | 1 | Exclude file |
| Bin | 1 | 0 | 0 | 1 | Exclude file |
CRC_15| Element | From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|---|
| Bin | (14) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (14) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (13) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (13) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (12) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (12) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (11) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (11) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (10) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (10) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (9) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (9) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (8) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (8) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (7) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (7) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (6) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (6) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (5) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (5) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (4) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (4) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (3) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (3) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (2) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (2) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (1) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (1) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (0) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (0) | 1 | 0 | 0 | 1 | Exclude file |
CRC_17| Element | From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|---|
| Bin | (16) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (16) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (15) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (15) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (14) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (14) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (13) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (13) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (12) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (12) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (11) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (11) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (10) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (10) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (9) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (9) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (8) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (8) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (7) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (7) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (6) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (6) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (5) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (5) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (4) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (4) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (3) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (3) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (2) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (2) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (1) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (1) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (0) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (0) | 1 | 0 | 0 | 1 | Exclude file |
CRC_21| Element | From | To | Count | Threshold | Excluded due to | |
|---|---|---|---|---|---|---|
| Bin | (20) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (20) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (19) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (19) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (18) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (18) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (17) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (17) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (16) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (16) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (15) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (15) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (14) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (14) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (13) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (13) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (12) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (12) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (11) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (11) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (10) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (10) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (9) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (9) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (8) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (8) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (7) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (7) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (6) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (6) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (5) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (5) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (4) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (4) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (3) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (3) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (2) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (2) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (1) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (1) | 1 | 0 | 0 | 1 | Exclude file |
| Bin | (0) | 0 | 1 | 0 | 1 | Exclude file |
| Bin | (0) | 1 | 0 | 0 | 1 | Exclude file |
ALC_ALC_BIT| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (4) | 0 | 1 | 69 | 1 |
| Bin | (4) | 1 | 0 | 1668 | 1 |
| Bin | (3) | 0 | 1 | 90 | 1 |
| Bin | (3) | 1 | 0 | 1689 | 1 |
| Bin | (2) | 0 | 1 | 103 | 1 |
| Bin | (2) | 1 | 0 | 1702 | 1 |
| Bin | (1) | 0 | 1 | 173 | 1 |
| Bin | (1) | 1 | 0 | 1772 | 1 |
| Bin | (0) | 0 | 1 | 299 | 1 |
| Bin | (0) | 1 | 0 | 1898 | 1 |
ALC_ALC_ID_FIELD| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (2) | 0 | 1 | 33 | 1 |
| Bin | (2) | 1 | 0 | 1634 | 1 |
| Bin | (1) | 0 | 1 | 42 | 1 |
| Bin | (1) | 1 | 0 | 1641 | 1 |
| Bin | (0) | 0 | 1 | 95 | 1 |
| Bin | (0) | 1 | 0 | 1696 | 1 |
ERR_CAPT_ERR_TYPE| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (2) | 0 | 1 | 800 | 1 |
| Bin | (2) | 1 | 0 | 2399 | 1 |
| Bin | (1) | 0 | 1 | 1263 | 1 |
| Bin | (1) | 1 | 0 | 2861 | 1 |
| Bin | (0) | 0 | 1 | 333 | 1 |
| Bin | (0) | 1 | 0 | 1933 | 1 |
ERR_CAPT_ERR_POS| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (3) | 0 | 1 | 4188 | 1 |
| Bin | (3) | 1 | 0 | 2595 | 1 |
| Bin | (2) | 0 | 1 | 4427 | 1 |
| Bin | (2) | 1 | 0 | 2828 | 1 |
| Bin | (1) | 0 | 1 | 3627 | 1 |
| Bin | (1) | 1 | 0 | 2031 | 1 |
| Bin | (0) | 0 | 1 | 3049 | 1 |
| Bin | (0) | 1 | 0 | 1449 | 1 |
ERR_CAPT_ERR_ERP| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 295 | 1 |
| Bin | 1 | 0 | 1896 | 1 |
MR_STATUS_PEXS| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 75 | 1 |
| Bin | 1 | 0 | 1676 | 1 |
PC_DBG| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | IS_SOF | 0 | 1 | 25148 | 1 |
| Bin | IS_SOF | 1 | 0 | 26749 | 1 |
| Bin | IS_ARBITRATION | 0 | 1 | 55910 | 1 |
| Bin | IS_ARBITRATION | 1 | 0 | 57511 | 1 |
| Bin | IS_CONTROL | 0 | 1 | 51266 | 1 |
| Bin | IS_CONTROL | 1 | 0 | 52867 | 1 |
| Bin | IS_DATA | 0 | 1 | 36655 | 1 |
| Bin | IS_DATA | 1 | 0 | 38256 | 1 |
| Bin | IS_STUFF_COUNT | 0 | 1 | 13017 | 1 |
| Bin | IS_STUFF_COUNT | 1 | 0 | 14618 | 1 |
| Bin | IS_CRC | 0 | 1 | 31164 | 1 |
| Bin | IS_CRC | 1 | 0 | 32765 | 1 |
| Bin | IS_CRC_DELIM | 0 | 1 | 29702 | 1 |
| Bin | IS_CRC_DELIM | 1 | 0 | 31303 | 1 |
| Bin | IS_ACK | 0 | 1 | 29548 | 1 |
| Bin | IS_ACK | 1 | 0 | 31149 | 1 |
| Bin | IS_ACK_DELIM | 0 | 1 | 28120 | 1 |
| Bin | IS_ACK_DELIM | 1 | 0 | 29721 | 1 |
| Bin | IS_EOF | 0 | 1 | 27225 | 1 |
| Bin | IS_EOF | 1 | 0 | 28826 | 1 |
| Bin | IS_OVERLOAD | 0 | 1 | 529 | 1 |
| Bin | IS_OVERLOAD | 1 | 0 | 2130 | 1 |
| Bin | IS_ERR | 0 | 1 | 27358 | 1 |
| Bin | IS_ERR | 1 | 0 | 28953 | 1 |
| Bin | IS_INTERMISSION | 0 | 1 | 51904 | 1 |
| Bin | IS_INTERMISSION | 1 | 0 | 53504 | 1 |
| Bin | IS_SUSPEND | 0 | 1 | 2849 | 1 |
| Bin | IS_SUSPEND | 1 | 0 | 4450 | 1 |
TRAN_FRAME_TEST| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | FSTC | 0 | 1 | 270 | 1 |
| Bin | FSTC | 1 | 0 | 1871 | 1 |
| Bin | FCRC | 0 | 1 | 100 | 1 |
| Bin | FCRC | 1 | 0 | 1701 | 1 |
| Bin | SDLC | 0 | 1 | 270 | 1 |
| Bin | SDLC | 1 | 0 | 1871 | 1 |
| Bin | TPRM(4) | 0 | 1 | 58 | 1 |
| Bin | TPRM(4) | 1 | 0 | 3273 | 1 |
| Bin | TPRM(3) | 0 | 1 | 189 | 1 |
| Bin | TPRM(3) | 1 | 0 | 1838 | 1 |
| Bin | TPRM(2) | 0 | 1 | 209 | 1 |
| Bin | TPRM(2) | 1 | 0 | 1858 | 1 |
| Bin | TPRM(1) | 0 | 1 | 431 | 1 |
| Bin | TPRM(1) | 1 | 0 | 2080 | 1 |
| Bin | TPRM(0) | 0 | 1 | 653 | 1 |
| Bin | TPRM(0) | 1 | 0 | 2302 | 1 |
TXTB_HW_CMD| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | LOCK | 0 | 1 | 25501 | 1 |
| Bin | LOCK | 1 | 0 | 27102 | 1 |
| Bin | VALID | 0 | 1 | 11115 | 1 |
| Bin | VALID | 1 | 0 | 12716 | 1 |
| Bin | ERR | 0 | 1 | 4269 | 1 |
| Bin | ERR | 1 | 0 | 5870 | 1 |
| Bin | ARBL | 0 | 1 | 455 | 1 |
| Bin | ARBL | 1 | 0 | 2056 | 1 |
| Bin | FAILED | 0 | 1 | 9651 | 1 |
| Bin | FAILED | 1 | 0 | 11252 | 1 |
TXTB_CLK_EN| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 80871 | 1 |
| Bin | 1 | 0 | 82472 | 1 |
REC_IDENT| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (28) | 0 | 1 | 34977 | 1 |
| Bin | (28) | 1 | 0 | 30496 | 1 |
| Bin | (27) | 0 | 1 | 25797 | 1 |
| Bin | (27) | 1 | 0 | 19553 | 1 |
| Bin | (26) | 0 | 1 | 37882 | 1 |
| Bin | (26) | 1 | 0 | 32084 | 1 |
| Bin | (25) | 0 | 1 | 24607 | 1 |
| Bin | (25) | 1 | 0 | 19093 | 1 |
| Bin | (24) | 0 | 1 | 39861 | 1 |
| Bin | (24) | 1 | 0 | 33029 | 1 |
| Bin | (23) | 0 | 1 | 29050 | 1 |
| Bin | (23) | 1 | 0 | 21721 | 1 |
| Bin | (22) | 0 | 1 | 38673 | 1 |
| Bin | (22) | 1 | 0 | 32610 | 1 |
| Bin | (21) | 0 | 1 | 28017 | 1 |
| Bin | (21) | 1 | 0 | 21307 | 1 |
| Bin | (20) | 0 | 1 | 35404 | 1 |
| Bin | (20) | 1 | 0 | 30052 | 1 |
| Bin | (19) | 0 | 1 | 27909 | 1 |
| Bin | (19) | 1 | 0 | 21692 | 1 |
| Bin | (18) | 0 | 1 | 39548 | 1 |
| Bin | (18) | 1 | 0 | 33394 | 1 |
| Bin | (17) | 0 | 1 | 7607 | 1 |
| Bin | (17) | 1 | 0 | 74542 | 1 |
| Bin | (16) | 0 | 1 | 7853 | 1 |
| Bin | (16) | 1 | 0 | 75645 | 1 |
| Bin | (15) | 0 | 1 | 7230 | 1 |
| Bin | (15) | 1 | 0 | 73728 | 1 |
| Bin | (14) | 0 | 1 | 6467 | 1 |
| Bin | (14) | 1 | 0 | 72889 | 1 |
| Bin | (13) | 0 | 1 | 5983 | 1 |
| Bin | (13) | 1 | 0 | 71406 | 1 |
| Bin | (12) | 0 | 1 | 5952 | 1 |
| Bin | (12) | 1 | 0 | 71054 | 1 |
| Bin | (11) | 0 | 1 | 7821 | 1 |
| Bin | (11) | 1 | 0 | 75578 | 1 |
| Bin | (10) | 0 | 1 | 6986 | 1 |
| Bin | (10) | 1 | 0 | 73569 | 1 |
| Bin | (9) | 0 | 1 | 8103 | 1 |
| Bin | (9) | 1 | 0 | 76097 | 1 |
| Bin | (8) | 0 | 1 | 6851 | 1 |
| Bin | (8) | 1 | 0 | 73339 | 1 |
| Bin | (7) | 0 | 1 | 6667 | 1 |
| Bin | (7) | 1 | 0 | 72831 | 1 |
| Bin | (6) | 0 | 1 | 6776 | 1 |
| Bin | (6) | 1 | 0 | 73783 | 1 |
| Bin | (5) | 0 | 1 | 8585 | 1 |
| Bin | (5) | 1 | 0 | 77083 | 1 |
| Bin | (4) | 0 | 1 | 8155 | 1 |
| Bin | (4) | 1 | 0 | 76624 | 1 |
| Bin | (3) | 0 | 1 | 7407 | 1 |
| Bin | (3) | 1 | 0 | 74440 | 1 |
| Bin | (2) | 0 | 1 | 7143 | 1 |
| Bin | (2) | 1 | 0 | 74078 | 1 |
| Bin | (1) | 0 | 1 | 7990 | 1 |
| Bin | (1) | 1 | 0 | 75461 | 1 |
| Bin | (0) | 0 | 1 | 8801 | 1 |
| Bin | (0) | 1 | 0 | 77239 | 1 |
REC_DLC| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (3) | 0 | 1 | 20131 | 1 |
| Bin | (3) | 1 | 0 | 58391 | 1 |
| Bin | (2) | 0 | 1 | 21272 | 1 |
| Bin | (2) | 1 | 0 | 26763 | 1 |
| Bin | (1) | 0 | 1 | 21528 | 1 |
| Bin | (1) | 1 | 0 | 26802 | 1 |
| Bin | (0) | 0 | 1 | 26961 | 1 |
| Bin | (0) | 1 | 0 | 33166 | 1 |
REC_IS_RTR| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 23636 | 1 |
| Bin | 1 | 0 | 25235 | 1 |
REC_IDENT_TYPE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 18796 | 1 |
| Bin | 1 | 0 | 20395 | 1 |
REC_FRAME_TYPE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 28449 | 1 |
| Bin | 1 | 0 | 30044 | 1 |
REC_LBPF| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 180 | 1 |
| Bin | 1 | 0 | 1781 | 1 |
REC_BRS| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 20049 | 1 |
| Bin | 1 | 0 | 21644 | 1 |
REC_ESI| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 2581 | 1 |
| Bin | 1 | 0 | 4181 | 1 |
REC_IVLD| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 51180 | 1 |
| Bin | 1 | 0 | 52772 | 1 |
STORE_METADATA| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 28503 | 1 |
| Bin | 1 | 0 | 30104 | 1 |
REC_ABORT| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 31526 | 1 |
| Bin | 1 | 0 | 33127 | 1 |
STORE_DATA| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 88175 | 1 |
| Bin | 1 | 0 | 89776 | 1 |
STORE_DATA_WORD| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (31) | 0 | 1 | 241881 | 1 |
| Bin | (31) | 1 | 0 | 243480 | 1 |
| Bin | (30) | 0 | 1 | 249246 | 1 |
| Bin | (30) | 1 | 0 | 250844 | 1 |
| Bin | (29) | 0 | 1 | 260271 | 1 |
| Bin | (29) | 1 | 0 | 261865 | 1 |
| Bin | (28) | 0 | 1 | 268608 | 1 |
| Bin | (28) | 1 | 0 | 270208 | 1 |
| Bin | (27) | 0 | 1 | 278547 | 1 |
| Bin | (27) | 1 | 0 | 280145 | 1 |
| Bin | (26) | 0 | 1 | 285999 | 1 |
| Bin | (26) | 1 | 0 | 287597 | 1 |
| Bin | (25) | 0 | 1 | 294448 | 1 |
| Bin | (25) | 1 | 0 | 296044 | 1 |
| Bin | (24) | 0 | 1 | 303485 | 1 |
| Bin | (24) | 1 | 0 | 305082 | 1 |
| Bin | (23) | 0 | 1 | 293024 | 1 |
| Bin | (23) | 1 | 0 | 294621 | 1 |
| Bin | (22) | 0 | 1 | 301366 | 1 |
| Bin | (22) | 1 | 0 | 302962 | 1 |
| Bin | (21) | 0 | 1 | 308903 | 1 |
| Bin | (21) | 1 | 0 | 310500 | 1 |
| Bin | (20) | 0 | 1 | 316916 | 1 |
| Bin | (20) | 1 | 0 | 318513 | 1 |
| Bin | (19) | 0 | 1 | 330277 | 1 |
| Bin | (19) | 1 | 0 | 331873 | 1 |
| Bin | (18) | 0 | 1 | 337604 | 1 |
| Bin | (18) | 1 | 0 | 339201 | 1 |
| Bin | (17) | 0 | 1 | 343625 | 1 |
| Bin | (17) | 1 | 0 | 345223 | 1 |
| Bin | (16) | 0 | 1 | 351617 | 1 |
| Bin | (16) | 1 | 0 | 353214 | 1 |
| Bin | (15) | 0 | 1 | 393220 | 1 |
| Bin | (15) | 1 | 0 | 394817 | 1 |
| Bin | (14) | 0 | 1 | 406974 | 1 |
| Bin | (14) | 1 | 0 | 408571 | 1 |
| Bin | (13) | 0 | 1 | 417088 | 1 |
| Bin | (13) | 1 | 0 | 418686 | 1 |
| Bin | (12) | 0 | 1 | 427426 | 1 |
| Bin | (12) | 1 | 0 | 429024 | 1 |
| Bin | (11) | 0 | 1 | 439739 | 1 |
| Bin | (11) | 1 | 0 | 441334 | 1 |
| Bin | (10) | 0 | 1 | 452521 | 1 |
| Bin | (10) | 1 | 0 | 454115 | 1 |
| Bin | (9) | 0 | 1 | 462227 | 1 |
| Bin | (9) | 1 | 0 | 463824 | 1 |
| Bin | (8) | 0 | 1 | 474822 | 1 |
| Bin | (8) | 1 | 0 | 476418 | 1 |
| Bin | (7) | 0 | 1 | 520277 | 1 |
| Bin | (7) | 1 | 0 | 521874 | 1 |
| Bin | (6) | 0 | 1 | 533435 | 1 |
| Bin | (6) | 1 | 0 | 535030 | 1 |
| Bin | (5) | 0 | 1 | 542598 | 1 |
| Bin | (5) | 1 | 0 | 544193 | 1 |
| Bin | (4) | 0 | 1 | 554073 | 1 |
| Bin | (4) | 1 | 0 | 555666 | 1 |
| Bin | (3) | 0 | 1 | 565790 | 1 |
| Bin | (3) | 1 | 0 | 567385 | 1 |
| Bin | (2) | 0 | 1 | 577333 | 1 |
| Bin | (2) | 1 | 0 | 578928 | 1 |
| Bin | (1) | 0 | 1 | 586688 | 1 |
| Bin | (1) | 1 | 0 | 588280 | 1 |
| Bin | (0) | 0 | 1 | 595853 | 1 |
| Bin | (0) | 1 | 0 | 597445 | 1 |
SOF_PULSE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 81099 | 1 |
| Bin | 1 | 0 | 82700 | 1 |
ARBITRATION_LOST| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 1175 | 1 |
| Bin | 1 | 0 | 2776 | 1 |
SET_TRANSMITTER| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 40515 | 1 |
| Bin | 1 | 0 | 42116 | 1 |
SET_RECEIVER| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 30450 | 1 |
| Bin | 1 | 0 | 32051 | 1 |
SET_IDLE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 96971 | 1 |
| Bin | 1 | 0 | 98572 | 1 |
ERR_DETECTED| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 126203 | 1 |
| Bin | 1 | 0 | 127804 | 1 |
PRIMARY_ERR| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 22749 | 1 |
| Bin | 1 | 0 | 24350 | 1 |
ACT_ERR_OVR_FLAG| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 19765 | 1 |
| Bin | 1 | 0 | 21364 | 1 |
ERR_DELIM_LATE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 390 | 1 |
| Bin | 1 | 0 | 1991 | 1 |
SET_ERR_ACTIVE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 6637 | 1 |
| Bin | 1 | 0 | 8238 | 1 |
ERR_CTRS_UNCHANGED| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 800 | 1 |
| Bin | 1 | 0 | 2401 | 1 |
TX_DATA_NBS| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 648446 | 1 |
| Bin | 1 | 0 | 646847 | 1 |
STUFF_ENABLE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 25501 | 1 |
| Bin | 1 | 0 | 27102 | 1 |
DESTUFF_ENABLE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 55951 | 1 |
| Bin | 1 | 0 | 57552 | 1 |
FIXED_STUFF| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 13027 | 1 |
| Bin | 1 | 0 | 14628 | 1 |
TX_FRAME_NO_SOF| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 353 | 1 |
| Bin | 1 | 0 | 1954 | 1 |
BTMC_RESET| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 28132 | 1 |
| Bin | 1 | 0 | 29733 | 1 |
DBT_MEASURE_START| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 2151 | 1 |
| Bin | 1 | 0 | 3752 | 1 |
GEN_FIRST_SSP| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 2151 | 1 |
| Bin | 1 | 0 | 3752 | 1 |
BIT_ERR_ENABLE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 67584 | 1 |
| Bin | 1 | 0 | 65993 | 1 |
CRC_ENABLE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 55951 | 1 |
| Bin | 1 | 0 | 57552 | 1 |
CRC_SPEC_ENABLE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 113871 | 1 |
| Bin | 1 | 0 | 115467 | 1 |
CRC_CALC_FROM_RX| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 85112 | 1 |
| Bin | 1 | 0 | 86702 | 1 |
LOAD_INIT_VECT| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 113844 | 1 |
| Bin | 1 | 0 | 115445 | 1 |
SP_CONTROL| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (1) | 0 | 1 | 3751 | 1 |
| Bin | (1) | 1 | 0 | 5352 | 1 |
| Bin | (0) | 0 | 1 | 24995 | 1 |
| Bin | (0) | 1 | 0 | 26596 | 1 |
SP_CONTROL_Q| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (1) | 0 | 1 | 2174 | 1 |
| Bin | (1) | 1 | 0 | 3775 | 1 |
| Bin | (0) | 0 | 1 | 17875 | 1 |
| Bin | (0) | 1 | 0 | 19476 | 1 |
NBT_CTRS_EN| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 6483 | 1 |
| Bin | 1 | 0 | 8072 | 1 |
DBT_CTRS_EN| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 67683 | 1 |
| Bin | 1 | 0 | 69284 | 1 |
SYNC_CONTROL| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (1) | 0 | 1 | 100135 | 1 |
| Bin | (1) | 1 | 0 | 100129 | 1 |
| Bin | (0) | 0 | 1 | 92433 | 1 |
| Bin | (0) | 1 | 0 | 92439 | 1 |
SSP_RESET| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 32708 | 1 |
| Bin | 1 | 0 | 34309 | 1 |
TRAN_DELAY_MEAS| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 37635 | 1 |
| Bin | 1 | 0 | 39236 | 1 |
TRAN_VALID| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 11115 | 1 |
| Bin | 1 | 0 | 12716 | 1 |
REC_VALID| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 15149 | 1 |
| Bin | 1 | 0 | 16750 | 1 |
DECREMENT_REC| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 14952 | 1 |
| Bin | 1 | 0 | 16553 | 1 |
BIT_ERR_AFTER_ACK_ERR| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 8 | 1 |
| Bin | 1 | 0 | 1609 | 1 |
BR_SHIFTED| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 46598 | 1 |
| Bin | 1 | 0 | 48199 | 1 |
FORM_ERR| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 89135 | 1 |
| Bin | 1 | 0 | 90736 | 1 |
ACK_ERR| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 8278 | 1 |
| Bin | 1 | 0 | 9879 | 1 |
CRC_ERR| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 1618 | 1 |
| Bin | 1 | 0 | 3219 | 1 |
RETR_CTR| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (3) | 0 | 1 | 55 | 1 |
| Bin | (3) | 1 | 0 | 1656 | 1 |
| Bin | (2) | 0 | 1 | 134 | 1 |
| Bin | (2) | 1 | 0 | 1735 | 1 |
| Bin | (1) | 0 | 1 | 265 | 1 |
| Bin | (1) | 1 | 0 | 1866 | 1 |
| Bin | (0) | 0 | 1 | 646 | 1 |
| Bin | (0) | 1 | 0 | 2247 | 1 |
ERR_FRM_REQ| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 31526 | 1 |
| Bin | 1 | 0 | 33127 | 1 |
TX_LOAD_BASE_ID| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 51071 | 1 |
| Bin | 1 | 0 | 52672 | 1 |
TX_LOAD_EXT_ID| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 42334 | 1 |
| Bin | 1 | 0 | 43935 | 1 |
TX_LOAD_DLC| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 122262 | 1 |
| Bin | 1 | 0 | 123863 | 1 |
TX_LOAD_DATA_WORD| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 157121 | 1 |
| Bin | 1 | 0 | 158722 | 1 |
TX_LOAD_STUFF_COUNT| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 39904 | 1 |
| Bin | 1 | 0 | 41505 | 1 |
TX_LOAD_CRC| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 57143 | 1 |
| Bin | 1 | 0 | 58744 | 1 |
TX_SHIFT_ENA| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 57392 | 1 |
| Bin | 1 | 0 | 58993 | 1 |
TX_DOMINANT| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 104032 | 1 |
| Bin | 1 | 0 | 105631 | 1 |
RX_CLEAR| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 70965 | 1 |
| Bin | 1 | 0 | 72566 | 1 |
RX_STORE_BASE_ID| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 54030 | 1 |
| Bin | 1 | 0 | 55631 | 1 |
RX_STORE_EXT_ID| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 17041 | 1 |
| Bin | 1 | 0 | 18642 | 1 |
RX_STORE_IDE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 106168 | 1 |
| Bin | 1 | 0 | 107769 | 1 |
RX_STORE_RTR| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 140455 | 1 |
| Bin | 1 | 0 | 142056 | 1 |
RX_STORE_EDL| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 102196 | 1 |
| Bin | 1 | 0 | 103797 | 1 |
RX_STORE_DLC| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 49952 | 1 |
| Bin | 1 | 0 | 51553 | 1 |
RX_STORE_ESI| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 56168 | 1 |
| Bin | 1 | 0 | 57769 | 1 |
RX_STORE_BRS| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 56264 | 1 |
| Bin | 1 | 0 | 57865 | 1 |
RX_STORE_STUFF_COUNT| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 25802 | 1 |
| Bin | 1 | 0 | 27403 | 1 |
RX_SHIFT_ENA| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (3) | 0 | 1 | 274378 | 1 |
| Bin | (3) | 1 | 0 | 563754 | 1 |
| Bin | (2) | 0 | 1 | 280026 | 1 |
| Bin | (2) | 1 | 0 | 558106 | 1 |
| Bin | (1) | 0 | 1 | 286685 | 1 |
| Bin | (1) | 1 | 0 | 551447 | 1 |
| Bin | (0) | 0 | 1 | 300382 | 1 |
| Bin | (0) | 1 | 0 | 537750 | 1 |
RX_SHIFT_IN_SEL| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 36655 | 1 |
| Bin | 1 | 0 | 38256 | 1 |
REC_IS_RTR_I| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 23636 | 1 |
| Bin | 1 | 0 | 25235 | 1 |
REC_DLC_D| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (3) | 0 | 1 | 577333 | 1 |
| Bin | (3) | 1 | 0 | 578928 | 1 |
| Bin | (2) | 0 | 1 | 586688 | 1 |
| Bin | (2) | 1 | 0 | 588280 | 1 |
| Bin | (1) | 0 | 1 | 595853 | 1 |
| Bin | (1) | 1 | 0 | 597445 | 1 |
| Bin | (0) | 0 | 1 | 1399537 | 1 |
| Bin | (0) | 1 | 0 | 1397936 | 1 |
REC_DLC_Q| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (3) | 0 | 1 | 20131 | 1 |
| Bin | (3) | 1 | 0 | 21731 | 1 |
| Bin | (2) | 0 | 1 | 21272 | 1 |
| Bin | (2) | 1 | 0 | 22869 | 1 |
| Bin | (1) | 0 | 1 | 21528 | 1 |
| Bin | (1) | 1 | 0 | 23128 | 1 |
| Bin | (0) | 0 | 1 | 26961 | 1 |
| Bin | (0) | 1 | 0 | 28558 | 1 |
REC_FRAME_TYPE_I| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 28449 | 1 |
| Bin | 1 | 0 | 30044 | 1 |
CTRL_CTR_PLOAD| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 842688 | 1 |
| Bin | 1 | 0 | 844288 | 1 |
CTRL_CTR_PLOAD_VAL| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (8) | 0 | 1 | 16548 | 1 |
| Bin | (8) | 1 | 0 | 18149 | 1 |
| Bin | (7) | 0 | 1 | 18558 | 1 |
| Bin | (7) | 1 | 0 | 20159 | 1 |
| Bin | (6) | 0 | 1 | 19198 | 1 |
| Bin | (6) | 1 | 0 | 20799 | 1 |
| Bin | (5) | 0 | 1 | 29466 | 1 |
| Bin | (5) | 1 | 0 | 31067 | 1 |
| Bin | (4) | 0 | 1 | 82250 | 1 |
| Bin | (4) | 1 | 0 | 83851 | 1 |
| Bin | (3) | 0 | 1 | 153556 | 1 |
| Bin | (3) | 1 | 0 | 155156 | 1 |
| Bin | (2) | 0 | 1 | 270242 | 1 |
| Bin | (2) | 1 | 0 | 271842 | 1 |
| Bin | (1) | 0 | 1 | 403944 | 1 |
| Bin | (1) | 1 | 0 | 405542 | 1 |
| Bin | (0) | 0 | 1 | 288737 | 1 |
| Bin | (0) | 1 | 0 | 290336 | 1 |
CTRL_CTR_ENA| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 217520 | 1 |
| Bin | 1 | 0 | 219114 | 1 |
CTRL_CTR_ZERO| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 356910 | 1 |
| Bin | 1 | 0 | 356918 | 1 |
CTRL_CTR_ONE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 352815 | 1 |
| Bin | 1 | 0 | 354416 | 1 |
CTRL_COUNTED_BYTE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 551752 | 1 |
| Bin | 1 | 0 | 553353 | 1 |
CTRL_COUNTED_BYTE_INDEX| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (1) | 0 | 1 | 136713 | 1 |
| Bin | (1) | 1 | 0 | 138314 | 1 |
| Bin | (0) | 0 | 1 | 274438 | 1 |
| Bin | (0) | 1 | 0 | 276039 | 1 |
CTRL_CTR_MEM_INDEX| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (4) | 0 | 1 | 4730 | 1 |
| Bin | (4) | 1 | 0 | 6331 | 1 |
| Bin | (3) | 0 | 1 | 12725 | 1 |
| Bin | (3) | 1 | 0 | 14326 | 1 |
| Bin | (2) | 0 | 1 | 19056 | 1 |
| Bin | (2) | 1 | 0 | 19056 | 1 |
| Bin | (1) | 0 | 1 | 40877 | 1 |
| Bin | (1) | 1 | 0 | 42478 | 1 |
| Bin | (0) | 0 | 1 | 68095 | 1 |
| Bin | (0) | 1 | 0 | 68095 | 1 |
COMPL_CTR_ENA| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 4505707 | 1 |
| Bin | 1 | 0 | 4507308 | 1 |
REINTEG_CTR_CLR| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 170 | 1 |
| Bin | 1 | 0 | 1771 | 1 |
REINTEG_CTR_ENABLE| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 21938 | 1 |
| Bin | 1 | 0 | 23539 | 1 |
REINTEG_CTR_EXPIRED| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 170 | 1 |
| Bin | 1 | 0 | 1771 | 1 |
RETR_CTR_CLEAR| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 20778 | 1 |
| Bin | 1 | 0 | 22379 | 1 |
RETR_CTR_ADD| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 10773 | 1 |
| Bin | 1 | 0 | 12374 | 1 |
RETR_LIMIT_REACHED| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 1858 | 1 |
| Bin | 1 | 0 | 1858 | 1 |
FORM_ERR_I| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 89135 | 1 |
| Bin | 1 | 0 | 90736 | 1 |
ACK_ERR_I| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 8278 | 1 |
| Bin | 1 | 0 | 9879 | 1 |
CRC_CHECK| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 59403 | 1 |
| Bin | 1 | 0 | 61004 | 1 |
BIT_ERR_ARB| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 1547 | 1 |
| Bin | 1 | 0 | 3148 | 1 |
CRC_MATCH| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 27802 | 1 |
| Bin | 1 | 0 | 29403 | 1 |
CRC_ERR_I| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 1618 | 1 |
| Bin | 1 | 0 | 3219 | 1 |
CRC_CLEAR_MATCH_FLAG| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 57506 | 1 |
| Bin | 1 | 0 | 59107 | 1 |
CRC_SRC| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (1) | 0 | 1 | 24822 | 1 |
| Bin | (1) | 1 | 0 | 26423 | 1 |
| Bin | (0) | 0 | 1 | 28318 | 1 |
| Bin | (0) | 1 | 0 | 29914 | 1 |
ERR_POS| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (3) | 0 | 1 | 84904 | 1 |
| Bin | (3) | 1 | 0 | 83309 | 1 |
| Bin | (2) | 0 | 1 | 58081 | 1 |
| Bin | (2) | 1 | 0 | 56480 | 1 |
| Bin | (1) | 0 | 1 | 89533 | 1 |
| Bin | (1) | 1 | 0 | 87932 | 1 |
| Bin | (0) | 0 | 1 | 123845 | 1 |
| Bin | (0) | 1 | 0 | 122244 | 1 |
RX_CRC| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (20) | 0 | 1 | 699526 | 1 |
| Bin | (20) | 1 | 0 | 1359213 | 1 |
| Bin | (19) | 0 | 1 | 617778 | 1 |
| Bin | (19) | 1 | 0 | 1284218 | 1 |
| Bin | (18) | 0 | 1 | 660944 | 1 |
| Bin | (18) | 1 | 0 | 1168579 | 1 |
| Bin | (17) | 0 | 1 | 637431 | 1 |
| Bin | (17) | 1 | 0 | 1178337 | 1 |
| Bin | (16) | 0 | 1 | 1293251 | 1 |
| Bin | (16) | 1 | 0 | 2091731 | 1 |
| Bin | (15) | 0 | 1 | 747550 | 1 |
| Bin | (15) | 1 | 0 | 1193442 | 1 |
| Bin | (14) | 0 | 1 | 586755 | 1 |
| Bin | (14) | 1 | 0 | 565537 | 1 |
| Bin | (13) | 0 | 1 | 571844 | 1 |
| Bin | (13) | 1 | 0 | 593317 | 1 |
| Bin | (12) | 0 | 1 | 599632 | 1 |
| Bin | (12) | 1 | 0 | 590150 | 1 |
| Bin | (11) | 0 | 1 | 590753 | 1 |
| Bin | (11) | 1 | 0 | 613917 | 1 |
| Bin | (10) | 0 | 1 | 629642 | 1 |
| Bin | (10) | 1 | 0 | 607476 | 1 |
| Bin | (9) | 0 | 1 | 616003 | 1 |
| Bin | (9) | 1 | 0 | 637426 | 1 |
| Bin | (8) | 0 | 1 | 653680 | 1 |
| Bin | (8) | 1 | 0 | 626283 | 1 |
| Bin | (7) | 0 | 1 | 520321 | 1 |
| Bin | (7) | 1 | 0 | 521910 | 1 |
| Bin | (6) | 0 | 1 | 533480 | 1 |
| Bin | (6) | 1 | 0 | 535071 | 1 |
| Bin | (5) | 0 | 1 | 542661 | 1 |
| Bin | (5) | 1 | 0 | 544251 | 1 |
| Bin | (4) | 0 | 1 | 554106 | 1 |
| Bin | (4) | 1 | 0 | 555728 | 1 |
| Bin | (3) | 0 | 1 | 565862 | 1 |
| Bin | (3) | 1 | 0 | 567426 | 1 |
| Bin | (2) | 0 | 1 | 577400 | 1 |
| Bin | (2) | 1 | 0 | 578996 | 1 |
| Bin | (1) | 0 | 1 | 586753 | 1 |
| Bin | (1) | 1 | 0 | 588358 | 1 |
| Bin | (0) | 0 | 1 | 595903 | 1 |
| Bin | (0) | 1 | 0 | 597501 | 1 |
RX_STUFF_COUNT| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (3) | 0 | 1 | 3504 | 1 |
| Bin | (3) | 1 | 0 | 5104 | 1 |
| Bin | (2) | 0 | 1 | 6776 | 1 |
| Bin | (2) | 1 | 0 | 8375 | 1 |
| Bin | (1) | 0 | 1 | 7761 | 1 |
| Bin | (1) | 1 | 0 | 9359 | 1 |
| Bin | (0) | 0 | 1 | 6073 | 1 |
| Bin | (0) | 1 | 0 | 7672 | 1 |
FIXED_STUFF_I| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 13027 | 1 |
| Bin | 1 | 0 | 14628 | 1 |
ARBITRATION_LOST_I| From | To | Count | Threshold | |
|---|---|---|---|---|
| Bin | 0 | 1 | 1175 | 1 |
| Bin | 1 | 0 | 2776 | 1 |
ARBITRATION_PART| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | (2) | 0 | 1 | 18710 | 1 |
| Bin | (2) | 1 | 0 | 20311 | 1 |
| Bin | (1) | 0 | 1 | 53305 | 1 |
| Bin | (1) | 1 | 0 | 54906 | 1 |
| Bin | (0) | 0 | 1 | 126054 | 1 |
| Bin | (0) | 1 | 0 | 127655 | 1 |
PC_DBG_I| Element | From | To | Count | Threshold | |
|---|---|---|---|---|---|
| Bin | IS_SOF | 0 | 1 | 25148 | 1 |
| Bin | IS_SOF | 1 | 0 | 26749 | 1 |
| Bin | IS_ARBITRATION | 0 | 1 | 55910 | 1 |
| Bin | IS_ARBITRATION | 1 | 0 | 57511 | 1 |
| Bin | IS_CONTROL | 0 | 1 | 51266 | 1 |
| Bin | IS_CONTROL | 1 | 0 | 52867 | 1 |
| Bin | IS_DATA | 0 | 1 | 36655 | 1 |
| Bin | IS_DATA | 1 | 0 | 38256 | 1 |
| Bin | IS_STUFF_COUNT | 0 | 1 | 13017 | 1 |
| Bin | IS_STUFF_COUNT | 1 | 0 | 14618 | 1 |
| Bin | IS_CRC | 0 | 1 | 31164 | 1 |
| Bin | IS_CRC | 1 | 0 | 32765 | 1 |
| Bin | IS_CRC_DELIM | 0 | 1 | 29702 | 1 |
| Bin | IS_CRC_DELIM | 1 | 0 | 31303 | 1 |
| Bin | IS_ACK | 0 | 1 | 29548 | 1 |
| Bin | IS_ACK | 1 | 0 | 31149 | 1 |
| Bin | IS_ACK_DELIM | 0 | 1 | 28120 | 1 |
| Bin | IS_ACK_DELIM | 1 | 0 | 29721 | 1 |
| Bin | IS_EOF | 0 | 1 | 27225 | 1 |
| Bin | IS_EOF | 1 | 0 | 28826 | 1 |
| Bin | IS_OVERLOAD | 0 | 1 | 529 | 1 |
| Bin | IS_OVERLOAD | 1 | 0 | 2130 | 1 |
| Bin | IS_ERR | 0 | 1 | 27358 | 1 |
| Bin | IS_ERR | 1 | 0 | 28953 | 1 |
| Bin | IS_INTERMISSION | 0 | 1 | 51904 | 1 |
| Bin | IS_INTERMISSION | 1 | 0 | 53504 | 1 |
| Bin | IS_SUSPEND | 0 | 1 | 2849 | 1 |
| Bin | IS_SUSPEND | 1 | 0 | 4450 | 1 |