File: /__w/CTU-CAN-FD/CTU-CAN-FD/src/medium_access_control/mac_top.vhd
0: --------------------------------------------------------------------------------
1: --
2: -- CTU CAN FD IP Core
3: -- Copyright (C) 2021-2023 Ondrej Ille
4: -- Copyright (C) 2023- Logic Design Services Ltd.s
5: --
6: -- Permission is hereby granted, free of charge, to any person obtaining a copy
7: -- of this VHDL component and associated documentation files (the "Component"),
8: -- to use, copy, modify, merge, publish, distribute the Component for
9: -- non-commercial purposes. Using the Component for commercial purposes is
10: -- forbidden unless previously agreed with Copyright holder.
11: --
12: -- The above copyright notice and this permission notice shall be included in
13: -- all copies or substantial portions of the Component.
14: --
15: -- THE COMPONENT IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16: -- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17: -- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18: -- AUTHORS OR COPYRIGHTHOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19: -- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20: -- FROM, OUT OF OR IN CONNECTION WITH THE COMPONENT OR THE USE OR OTHER DEALINGS
21: -- IN THE COMPONENT.
22: --
23: -- The CAN protocol is developed by Robert Bosch GmbH and protected by patents.
24: -- Anybody who wants to implement this IP core on silicon has to obtain a CAN
25: -- protocol license from Bosch.
26: --
27: -- -------------------------------------------------------------------------------
28: --
29: -- CTU CAN FD IP Core
30: -- Copyright (C) 2015-2020 MIT License
31: --
32: -- Authors:
33: -- Ondrej Ille <ondrej.ille@gmail.com>
34: -- Martin Jerabek <martin.jerabek01@gmail.com>
35: --
36: -- Project advisors:
37: -- Jiri Novak <jnovak@fel.cvut.cz>
38: -- Pavel Pisa <pisa@cmp.felk.cvut.cz>
39: --
40: -- Department of Measurement (http://meas.fel.cvut.cz/)
41: -- Faculty of Electrical Engineering (http://www.fel.cvut.cz)
42: -- Czech Technical University (http://www.cvut.cz/)
43: --
44: -- Permission is hereby granted, free of charge, to any person obtaining a copy
45: -- of this VHDL component and associated documentation files (the "Component"),
46: -- to deal in the Component without restriction, including without limitation
47: -- the rights to use, copy, modify, merge, publish, distribute, sublicense,
48: -- and/or sell copies of the Component, and to permit persons to whom the
49: -- Component is furnished to do so, subject to the following conditions:
50: --
51: -- The above copyright notice and this permission notice shall be included in
52: -- all copies or substantial portions of the Component.
53: --
54: -- THE COMPONENT IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
55: -- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
56: -- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
57: -- AUTHORS OR COPYRIGHTHOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
58: -- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
59: -- FROM, OUT OF OR IN CONNECTION WITH THE COMPONENT OR THE USE OR OTHER DEALINGS
60: -- IN THE COMPONENT.
61: --
62: -- The CAN protocol is developed by Robert Bosch GmbH and protected by patents.
63: -- Anybody who wants to implement this IP core on silicon has to obtain a CAN
64: -- protocol license from Bosch.
65: --
66: --------------------------------------------------------------------------------
67:
68: --------------------------------------------------------------------------------
69: -- Module:
70: -- CAN Core
71: --
72: -- Sub-modules:
73: -- 1. Protocol control
74: -- 2. Bit stuffing
75: -- 3. Bit destuffing
76: -- 4. Fault confinement
77: -- 5. CAN CRC
78: -- 6. Operation control
79: --
80: -- Note:
81: -- Status bus assignments are implemented in this module.
82: --------------------------------------------------------------------------------
83:
84: Library ieee;
85: use ieee.std_logic_1164.all;
86: use ieee.numeric_std.ALL;
87:
88: Library ctu_can_fd_rtl;
89: use ctu_can_fd_rtl.can_constants_pkg.all;
90: use ctu_can_fd_rtl.can_types_pkg.all;
91:
92: use ctu_can_fd_rtl.CAN_FD_register_map.all;
93: use ctu_can_fd_rtl.CAN_FD_frame_format.all;
94:
95: entity mac_top is
96: generic (
97: -- Number of signals in Sample trigger
98: G_SAMPLE_TRIGGER_COUNT : natural range 2 to 8;
99:
100: -- Control counter width
101: G_CTRL_CTR_WIDTH : natural;
102:
103: -- Retransmitt limit counter width
104: G_RETR_LIM_CTR_WIDTH : natural;
105:
106: -- CRC 15 polynomial
107: G_CRC15_POL : std_logic_vector(15 downto 0);
108:
109: -- CRC 17 polynomial
110: G_CRC17_POL : std_logic_vector(19 downto 0);
111:
112: -- CRC 15 polynomial
113: G_CRC21_POL : std_logic_vector(23 downto 0);
114:
115: -- Support traffic counters
116: G_TRAFFIC_CTRS_EN : boolean
117: );
118: port (
119: -------------------------------------------------------------------------------------------
120: -- Clock and Asynchronous reset
121: -------------------------------------------------------------------------------------------
122: clk_sys : in std_logic;
123: rst_n : in std_logic;
124:
125: -------------------------------------------------------------------------------------------
126: -- DFT support
127: -------------------------------------------------------------------------------------------
128: scan_mode : in std_logic;
129:
130: -------------------------------------------------------------------------------------------
131: -- Memory registers interface
132: -------------------------------------------------------------------------------------------
133: mr_mode_acf : in std_logic;
134: mr_mode_stm : in std_logic;
135: mr_mode_bmm : in std_logic;
136: mr_mode_fde : in std_logic;
137: mr_mode_rom : in std_logic;
138: mr_mode_tstm : in std_logic;
139: mr_mode_sam : in std_logic;
140:
141: mr_settings_ena : in std_logic;
142: mr_settings_nisofd : in std_logic;
143: mr_settings_rtrth : in std_logic_vector(3 downto 0);
144: mr_settings_rtrle : in std_logic;
145: mr_settings_ilbp : in std_logic;
146: mr_settings_pex : in std_logic;
147:
148: mr_command_ercrst : in std_logic;
149: mr_command_rxfcrst : in std_logic;
150: mr_command_txfcrst : in std_logic;
151: mr_command_cpexs : in std_logic;
152:
153: mr_ssp_cfg_ssp_src : in std_logic_vector(1 downto 0);
154:
155: mr_ewl_ew_limit : in std_logic_vector(7 downto 0);
156: mr_erp_erp_limit : in std_logic_vector(7 downto 0);
157:
158: mr_ctr_pres_ctpv : in std_logic_vector(8 downto 0);
159: mr_ctr_pres_ptx : in std_logic;
160: mr_ctr_pres_prx : in std_logic;
161: mr_ctr_pres_enorm : in std_logic;
162: mr_ctr_pres_efd : in std_logic;
163:
164: -------------------------------------------------------------------------------------------
165: -- Status signals
166: -------------------------------------------------------------------------------------------
167: cc_stat : out t_can_core_stat;
168: pc_dbg : out t_protocol_control_dbg;
169:
170: -------------------------------------------------------------------------------------------
171: -- Tx Arbitrator and TXT Buffers interface
172: -------------------------------------------------------------------------------------------
173: -- TX Data word
174: tran_word : in std_logic_vector(31 downto 0);
175:
176: -- TX Data length code
177: tran_dlc : in std_logic_vector(3 downto 0);
178:
179: -- TX Remote transmission request flag
180: tran_is_rtr : in std_logic;
181:
182: -- TX Identifier type (0-Basic, 1-Extended)
183: tran_ident_type : in std_logic;
184:
185: -- TX Frame type (0-CAN 2.0, 1-CAN FD)
186: tran_frame_type : in std_logic;
187:
188: -- TX Bit Rate Shift
189: tran_brs : in std_logic;
190:
191: -- TX Identifier
192: tran_identifier : in std_logic_vector(28 downto 0);
193:
194: -- TX frame test word
195: tran_frame_test : in t_frame_test_w;
196:
197: -- Frame in TXT Buffer is valid any can be transmitted.
198: tran_frame_valid : in std_logic;
199:
200: -- Parity Error occurred in TXT Buffer RAMs during transmission of data words
201: tran_frame_parity_error : in std_logic;
202:
203: -- HW Commands for TX Arbitrator and TXT Buffers
204: txtb_hw_cmd : out t_txtb_hw_cmd;
205:
206: -- Selected TXT Buffer index changed
207: txtb_changed : in std_logic;
208:
209: -- Pointer to TXT buffer memory
210: txtb_ptr : out natural range 0 to 20;
211:
212: -- Clock enable for TXT Buffer memory
213: txtb_clk_en : out std_logic;
214:
215: -------------------------------------------------------------------------------------------
216: -- Recieve Buffer and Message Filter Interface
217: -------------------------------------------------------------------------------------------
218: -- RX CAN Identifier
219: rec_ident : out std_logic_vector(28 downto 0);
220:
221: -- RX Data length code
222: rec_dlc : out std_logic_vector(3 downto 0);
223:
224: -- RX Recieved identifier type (0-BASE Format, 1-Extended Format);
225: rec_ident_type : out std_logic;
226:
227: -- RX frame type (0-CAN 2.0, 1- CAN FD)
228: rec_frame_type : out std_logic;
229:
230: -- Received Loopback frame
231: rec_lbpf : out std_logic;
232:
233: -- RX Remote transmission request Flag
234: rec_is_rtr : out std_logic;
235:
236: -- RX Bit Rate Shift bit
237: rec_brs : out std_logic;
238:
239: -- RX Error state indicator
240: rec_esi : out std_logic;
241:
242: -- RX Identifier is valid
243: rec_ivld : out std_logic;
244:
245: -- RX Frame received succesfully, can be commited to RX Buffer.
246: rec_valid : out std_logic;
247:
248: -- Metadata are received OK, and can be stored in RX Buffer.
249: store_metadata : out std_logic;
250:
251: -- Store data word to RX Buffer.
252: store_data : out std_logic;
253:
254: -- Data words to be stored to RX Buffer.
255: store_data_word : out std_logic_vector(31 downto 0);
256:
257: -- Abort storing of frame in RX Buffer. Revert to last frame.
258: rec_abort : out std_logic;
259:
260: -- Pulse in Start of Frame
261: sof_pulse : out std_logic;
262:
263: -------------------------------------------------------------------------------------------
264: -- Interrupt Manager Interface
265: -------------------------------------------------------------------------------------------
266: -- Arbitration was lost
267: arbitration_lost : out std_logic;
268:
269: -- Frame stored in CAN Core was sucessfully transmitted
270: tran_valid : out std_logic;
271:
272: -- Bit Rate Was Shifted
273: br_shifted : out std_logic;
274:
275: -- Error is detected (Error frame will be transmitted)
276: err_detected : out std_logic;
277:
278: -- Fault confinement state changed
279: fcs_changed : out std_logic;
280:
281: -- Error warning limit reached
282: err_warning_limit_pulse : out std_logic;
283:
284: -------------------------------------------------------------------------------------------
285: -- Prescaler interface
286: -------------------------------------------------------------------------------------------
287: -- RX Triggers (in Sample Point)
288: rx_triggers : in std_logic_vector(G_SAMPLE_TRIGGER_COUNT - 1 downto 0);
289:
290: -- TX Trigger
291: tx_trigger : in std_logic;
292:
293: -- Synchronisation control (No synchronisation, Hard Synchronisation,
294: -- Resynchronisation
295: sync_control : out std_logic_vector(1 downto 0);
296:
297: -- No positive resynchronisation
298: no_pos_resync : out std_logic;
299:
300: -- Sample control (Nominal, Data, Secondary)
301: sp_control : out std_logic_vector(1 downto 0);
302:
303: -- Enable Nominal Bit time counters.
304: nbt_ctrs_en : out std_logic;
305:
306: -- Enable Data Bit time counters.
307: dbt_ctrs_en : out std_logic;
308:
309: -------------------------------------------------------------------------------------------
310: -- CAN Bus serial data stream
311: -------------------------------------------------------------------------------------------
312: -- RX Data from CAN Bus
313: rx_data_wbs : in std_logic;
314:
315: -- TX Data to CAN Bus
316: tx_data_wbs : out std_logic;
317:
318: -------------------------------------------------------------------------------------------
319: -- Others
320: -------------------------------------------------------------------------------------------
321: -- Secondary sample point reset
322: ssp_reset : out std_logic;
323:
324: -- Enable measurement of Transmitter delay
325: tran_delay_meas : out std_logic;
326:
327: -- Bit Error detected
328: bit_err : in std_logic;
329:
330: -- Reset Bit time measurement counter
331: btmc_reset : out std_logic;
332:
333: -- Start Measurement of data bit time (in TX Trigger)
334: dbt_measure_start : out std_logic;
335:
336: -- First SSP generated (in ESI bit)
337: gen_first_ssp : out std_logic;
338:
339: -- Synchronization edge
340: sync_edge : in std_logic;
341:
342: -- Bit error enable
343: bit_err_enable : out std_logic;
344:
345: -- RX Trigger of Protocol control FSM (sample point)
346: pc_rx_trigger : out std_logic
347: );
348: end entity;
349:
350: architecture rtl of mac_top is
351:
352: -----------------------------------------------------------------------------------------------
353: -----------------------------------------------------------------------------------------------
354: -- Internal signals
355: -----------------------------------------------------------------------------------------------
356: -----------------------------------------------------------------------------------------------
357:
358: -- Arbitration lost capture
359: signal alc_alc_bit : std_logic_vector(4 downto 0);
360: signal alc_alc_id_field : std_logic_vector(2 downto 0);
361:
362: -- Error code capture
363: signal err_capt_err_type : std_logic_vector(2 downto 0);
364: signal err_capt_err_pos : std_logic_vector(3 downto 0);
365: signal err_capt_err_erp : std_logic;
366:
367: -- Operation control interface
368: signal is_transmitter : std_logic;
369: signal is_receiver : std_logic;
370: signal is_idle : std_logic;
371: signal arbitration_lost_i : std_logic;
372: signal set_transmitter : std_logic;
373: signal set_receiver : std_logic;
374: signal set_idle : std_logic;
375:
376: -- Fault confinement Interface
377: signal is_err_active : std_logic;
378: signal is_err_passive : std_logic;
379: signal is_bus_off_i : std_logic;
380: signal err_detected_i : std_logic;
381: signal primary_err : std_logic;
382: signal act_err_ovr_flag : std_logic;
383: signal err_delim_late : std_logic;
384: signal set_err_active : std_logic;
385: signal err_ctrs_unchanged : std_logic;
386:
387: -- Bit Stuffing Interface
388: signal stuff_enable : std_logic;
389: signal destuff_enable : std_logic;
390: signal fixed_stuff : std_logic;
391: signal tx_frame_no_sof : std_logic;
392: signal dst_ctr : std_logic_vector(2 downto 0);
393: signal bst_ctr : std_logic_vector(2 downto 0);
394: signal stuff_err : std_logic;
395:
396: -- CRC Interface
397: signal crc_enable : std_logic;
398: signal crc_spec_enable : std_logic;
399: signal crc_calc_from_rx : std_logic;
400: signal crc_15 : std_logic_vector(14 downto 0);
401: signal crc_17 : std_logic_vector(16 downto 0);
402: signal crc_21 : std_logic_vector(20 downto 0);
403:
404: -- Protocol control - control outputs
405: signal sp_control_i : std_logic_vector(1 downto 0);
406: signal sp_control_q : std_logic_vector(1 downto 0);
407: signal tran_valid_i : std_logic;
408: signal rec_valid_i : std_logic;
409:
410: -- Fault confinement status signals
411: signal tx_err_ctr : std_logic_vector(8 downto 0);
412: signal rx_err_ctr : std_logic_vector(8 downto 0);
413: signal norm_err_ctr : std_logic_vector(15 downto 0);
414: signal data_err_ctr : std_logic_vector(15 downto 0);
415:
416: -- Protocol control triggers
417: signal pc_tx_trigger : std_logic;
418: signal pc_rx_trigger_i : std_logic;
419:
420: -- Protocol control data inputs/outputs
421: signal pc_tx_data_nbs : std_logic;
422: signal pc_rx_data_nbs : std_logic;
423:
424: -- CRC Data inputs
425: signal crc_data_tx_wbs : std_logic;
426: signal crc_data_tx_nbs : std_logic;
427: signal crc_data_rx_wbs : std_logic;
428: signal crc_data_rx_nbs : std_logic;
429:
430: -- CRC Trigger inputs
431: signal crc_trig_tx_wbs : std_logic;
432: signal crc_trig_tx_nbs : std_logic;
433: signal crc_trig_rx_wbs : std_logic;
434: signal crc_trig_rx_nbs : std_logic;
435:
436: -- Bit stuffing signals
437: signal bst_data_in : std_logic;
438: signal bst_data_out : std_logic;
439: signal bst_trigger : std_logic;
440: signal data_halt : std_logic;
441:
442: -- Bit destuffing signals
443: signal bds_data_in : std_logic;
444: signal bds_data_out : std_logic;
445: signal bds_trigger : std_logic;
446: signal destuffed : std_logic;
447:
448: -- Bus traffic counters
449: signal tx_frame_ctr : std_logic_vector(31 downto 0);
450: signal rx_frame_ctr : std_logic_vector(31 downto 0);
451:
452: signal tx_data_wbs_i : std_logic;
453:
454: -- Looped back data for bus monitoring mode
455: signal lpb_dominant : std_logic;
456:
457: -- Error indication
458: signal form_err : std_logic;
459: signal ack_err : std_logic;
460: signal crc_err : std_logic;
461:
462: signal load_init_vect : std_logic;
463: signal retr_ctr : std_logic_vector(G_RETR_LIM_CTR_WIDTH - 1 downto 0);
464:
465: -- Decrement Receive Error counter
466: signal decrement_rec : std_logic;
467:
468: -- Bit Error in passive error flag following ACK error!
469: signal bit_err_after_ack_err : std_logic;
470:
471: -- Protocol exception status
472: signal mr_status_pexs : std_logic;
473:
474: -- Error warning limit status
475: signal mr_status_ewl : std_logic;
476:
477: begin
478:
479: -----------------------------------------------------------------------------------------------
480: -- Protocol control
481: -----------------------------------------------------------------------------------------------
482: i_mac_pc_top : entity ctu_can_fd_rtl.mac_pc_top
483: generic map (
484: G_CTRL_CTR_WIDTH => G_CTRL_CTR_WIDTH,
485: G_RETR_LIM_CTR_WIDTH => G_RETR_LIM_CTR_WIDTH
486: )
487: port map (
488: clk_sys => clk_sys, -- IN
489: rst_n => rst_n, -- IN
490:
491: -- DFT support
492: scan_mode => scan_mode, -- IN
493:
494: -- Memory registers interface
495: mr_mode_acf => mr_mode_acf, -- IN
496: mr_mode_stm => mr_mode_stm, -- IN
497: mr_mode_bmm => mr_mode_bmm, -- IN
498: mr_mode_fde => mr_mode_fde, -- IN
499: mr_mode_rom => mr_mode_rom, -- IN
500: mr_mode_tstm => mr_mode_tstm, -- IN
501: mr_mode_sam => mr_mode_sam, -- IN
502: mr_settings_ena => mr_settings_ena, -- IN
503: mr_settings_nisofd => mr_settings_nisofd, -- IN
504: mr_settings_rtrth => mr_settings_rtrth, -- IN
505: mr_settings_rtrle => mr_settings_rtrle, -- IN
506: mr_settings_ilbp => mr_settings_ilbp, -- IN
507: mr_settings_pex => mr_settings_pex, -- IN
508: mr_command_ercrst => mr_command_ercrst, -- IN
509: mr_command_cpexs => mr_command_cpexs, -- IN
510: mr_ssp_cfg_ssp_src => mr_ssp_cfg_ssp_src, -- IN
511:
512: alc_alc_bit => alc_alc_bit, -- OUT
513: alc_alc_id_field => alc_alc_id_field, -- OUT
514:
515: err_capt_err_type => err_capt_err_type, -- OUT
516: err_capt_err_pos => err_capt_err_pos, -- OUT
517: err_capt_err_erp => err_capt_err_erp, -- OUT
518:
519: pc_dbg => pc_dbg, -- OUT
520: mr_status_pexs => mr_status_pexs, -- OUT
521:
522: -- TXT Buffers interface
523: tran_word => tran_word, -- IN
524: tran_dlc => tran_dlc, -- IN
525: tran_is_rtr => tran_is_rtr, -- IN
526: tran_ident_type => tran_ident_type, -- IN
527: tran_frame_type => tran_frame_type, -- IN
528: tran_brs => tran_brs, -- IN
529: tran_identifier => tran_identifier, -- IN
530: tran_frame_test => tran_frame_test, -- IN
531: tran_frame_valid => tran_frame_valid, -- IN
532: tran_frame_parity_error => tran_frame_parity_error, -- IN
533: txtb_hw_cmd => txtb_hw_cmd, -- IN
534: txtb_ptr => txtb_ptr, -- OUT
535: txtb_clk_en => txtb_clk_en, -- OUT
536: txtb_changed => txtb_changed, -- IN
537:
538: -- RX Buffer interface
539: rec_ident => rec_ident, -- OUT
540: rec_dlc => rec_dlc, -- OUT
541: rec_is_rtr => rec_is_rtr, -- OUT
542: rec_ident_type => rec_ident_type, -- OUT
543: rec_frame_type => rec_frame_type, -- OUT
544: rec_lbpf => rec_lbpf, -- OUT
545: rec_brs => rec_brs, -- OUT
546: rec_esi => rec_esi, -- OUT
547: rec_ivld => rec_ivld, -- OUT
548: store_metadata => store_metadata, -- OUT
549: rec_abort => rec_abort, -- OUT
550: store_data => store_data, -- OUT
551: store_data_word => store_data_word, -- OUT
552: sof_pulse => sof_pulse, -- OUT
553:
554: -- Operation control FSM Interface
555: is_transmitter => is_transmitter, -- IN
556: is_receiver => is_receiver, -- IN
557: arbitration_lost => arbitration_lost_i, -- OUT
558: set_transmitter => set_transmitter, -- OUT
559: set_receiver => set_receiver, -- OUT
560: set_idle => set_idle, -- OUT
561:
562: -- Fault confinement Interface
563: is_err_active => is_err_active, -- IN
564: is_err_passive => is_err_passive, -- IN
565: is_bus_off => is_bus_off_i, -- IN
566: err_detected => err_detected_i, -- OUT
567: primary_err => primary_err, -- OUT
568: act_err_ovr_flag => act_err_ovr_flag, -- OUT
569: err_delim_late => err_delim_late, -- OUT
570: set_err_active => set_err_active, -- OUT
571: err_ctrs_unchanged => err_ctrs_unchanged, -- OUT
572:
573: -- TX and RX Trigger signals to Sample and Transmitt Data
574: tx_trigger => pc_tx_trigger, -- IN
575: rx_trigger => pc_rx_trigger_i, -- IN
576:
577: -- CAN Bus serial data stream
578: tx_data_nbs => pc_tx_data_nbs, -- OUT
579: tx_data_wbs => tx_data_wbs_i, -- IN
580: rx_data_nbs => pc_rx_data_nbs, -- IN
581:
582: -- Bit Stuffing Interface
583: stuff_enable => stuff_enable, -- OUT
584: destuff_enable => destuff_enable, -- OUT
585: fixed_stuff => fixed_stuff, -- OUT
586: tx_frame_no_sof => tx_frame_no_sof, -- OUT
587: dst_ctr => dst_ctr, -- IN
588: bst_ctr => bst_ctr, -- IN
589: stuff_err => stuff_err, -- IN
590:
591: -- Bus Sampling Interface
592: bit_err => bit_err, -- IN
593: btmc_reset => btmc_reset, -- OUT
594: dbt_measure_start => dbt_measure_start, -- OUT
595: gen_first_ssp => gen_first_ssp, -- OUT
596: sync_edge => sync_edge, -- IN
597: bit_err_enable => bit_err_enable, -- OUT
598:
599: -- CRC Interface
600: crc_enable => crc_enable, -- OUT
601: crc_spec_enable => crc_spec_enable, -- OUT
602: crc_calc_from_rx => crc_calc_from_rx, -- OUT
603: load_init_vect => load_init_vect, -- OUT
604: crc_15 => crc_15, -- IN
605: crc_17 => crc_17, -- IN
606: crc_21 => crc_21, -- IN
607:
608: -- Control signals
609: sp_control => sp_control_i, -- OUT
610: sp_control_q => sp_control_q, -- OUT
611: nbt_ctrs_en => nbt_ctrs_en, -- OUT
612: dbt_ctrs_en => dbt_ctrs_en, -- OUT
613: sync_control => sync_control, -- OUT
614: ssp_reset => ssp_reset, -- OUT
615: tran_delay_meas => tran_delay_meas, -- OUT
616: tran_valid => tran_valid_i, -- OUT
617: rec_valid => rec_valid_i, -- OUT
618: decrement_rec => decrement_rec, -- OUT
619: bit_err_after_ack_err => bit_err_after_ack_err, -- OUT
620:
621: -- Status signals
622: br_shifted => br_shifted, -- OUT
623: form_err => form_err, -- OUT
624: ack_err => ack_err, -- OUT
625: crc_err => crc_err, -- OUT
626: retr_ctr => retr_ctr -- OUT
627: );
628:
629:
630: -----------------------------------------------------------------------------------------------
631: -- Operation control FSM
632: -----------------------------------------------------------------------------------------------
633: i_mac_operation_control : entity ctu_can_fd_rtl.mac_operation_control
634: port map (
635: clk_sys => clk_sys, -- IN
636: rst_n => rst_n, -- IN
637:
638: -- Prescaler Interface
639: rx_trigger => pc_rx_trigger_i, -- IN
640:
641: -- Fault confinement Interface
642: is_bus_off => is_bus_off_i, -- IN
643:
644: -- Protocol Control Interface
645: arbitration_lost => arbitration_lost_i, -- IN
646: set_transmitter => set_transmitter, -- IN
647: set_receiver => set_receiver, -- IN
648: set_idle => set_idle, -- IN
649: is_transmitter => is_transmitter, -- OUT
650: is_receiver => is_receiver, -- OUT
651: is_idle => is_idle -- OUT
652: );
653:
654:
655: -----------------------------------------------------------------------------------------------
656: -- Fault confinement
657: -----------------------------------------------------------------------------------------------
658: i_mac_fc_top : entity ctu_can_fd_rtl.mac_fc_top
659: port map (
660: clk_sys => clk_sys, -- IN
661: rst_n => rst_n, -- IN
662:
663: -- DFT support
664: scan_mode => scan_mode, -- IN
665:
666: mr_mode_rom => mr_mode_rom, -- IN
667: mr_ewl_ew_limit => mr_ewl_ew_limit, -- IN
668: mr_erp_erp_limit => mr_erp_erp_limit, -- IN
669: mr_ctr_pres_ctpv => mr_ctr_pres_ctpv, -- IN
670: mr_ctr_pres_ptx => mr_ctr_pres_ptx, -- IN
671: mr_ctr_pres_prx => mr_ctr_pres_prx, -- IN
672: mr_ctr_pres_enorm => mr_ctr_pres_enorm, -- IN
673: mr_ctr_pres_efd => mr_ctr_pres_efd, -- IN
674: mr_status_ewl => mr_status_ewl, -- OUT
675:
676: -- Error signalling for interrupts
677: fcs_changed => fcs_changed, -- OUT
678: err_warning_limit_pulse => err_warning_limit_pulse, -- OUT
679:
680: -- Operation control Interface
681: is_transmitter => is_transmitter, -- IN
682: is_receiver => is_receiver, -- IN
683:
684: -- Protocol control Interface
685: sp_control => sp_control_i, -- IN
686: set_err_active => set_err_active, -- IN
687: err_detected => err_detected_i, -- IN
688: err_ctrs_unchanged => err_ctrs_unchanged, -- IN
689: primary_err => primary_err, -- IN
690: act_err_ovr_flag => act_err_ovr_flag, -- IN
691: err_delim_late => err_delim_late, -- IN
692: tran_valid => tran_valid_i, -- IN
693: decrement_rec => decrement_rec, -- IN
694: bit_err_after_ack_err => bit_err_after_ack_err, -- IN
695:
696: -- Fault confinement State indication
697: is_err_active => is_err_active, -- OUT
698: is_err_passive => is_err_passive, -- OUT
699: is_bus_off => is_bus_off_i, -- OUT
700:
701: -- Error counters
702: tx_err_ctr => tx_err_ctr, -- OUT
703: rx_err_ctr => rx_err_ctr, -- OUT
704: norm_err_ctr => norm_err_ctr, -- OUT
705: data_err_ctr => data_err_ctr -- OUT
706: );
707:
708:
709: -----------------------------------------------------------------------------------------------
710: -- CAN CRC
711: -----------------------------------------------------------------------------------------------
712: i_mac_crc_top : entity ctu_can_fd_rtl.mac_crc_top
713: generic map (
714: G_CRC15_POL => G_CRC15_POL,
715: G_CRC17_POL => G_CRC17_POL,
716: G_CRC21_POL => G_CRC21_POL
717: )
718: port map (
719: clk_sys => clk_sys, -- IN
720: rst_n => rst_n, -- IN
721:
722: -- Memory registers interface
723: mr_settings_nisofd => mr_settings_nisofd, -- IN
724:
725: -- Data inputs for CRC calculation
726: data_tx_wbs => crc_data_tx_wbs, -- IN
727: data_tx_nbs => crc_data_tx_nbs, -- IN
728: data_rx_wbs => crc_data_rx_wbs, -- IN
729: data_rx_nbs => crc_data_rx_nbs, -- IN
730:
731: -- Trigger signals to process the data on each CRC input.
732: trig_tx_wbs => crc_trig_tx_wbs, -- IN
733: trig_tx_nbs => crc_trig_tx_nbs, -- IN
734: trig_rx_wbs => crc_trig_rx_wbs, -- IN
735: trig_rx_nbs => crc_trig_rx_nbs, -- IN
736:
737: -- Control signals
738: crc_enable => crc_enable, -- IN
739: crc_spec_enable => crc_spec_enable, -- IN
740: crc_calc_from_rx => crc_calc_from_rx, -- IN
741: load_init_vect => load_init_vect, -- IN
742:
743: -- CRC Outputs
744: crc_15 => crc_15, -- OUT
745: crc_17 => crc_17, -- OUT
746: crc_21 => crc_21 -- OUT
747: );
748:
749:
750: -----------------------------------------------------------------------------------------------
751: -- Bit Stuffing
752: -----------------------------------------------------------------------------------------------
753: i_mac_bit_stuffing : entity ctu_can_fd_rtl.mac_bit_stuffing
754: port map (
755: clk_sys => clk_sys, -- IN
756: rst_n => rst_n, -- IN
757:
758: -- Data-path
759: data_in => bst_data_in, -- IN
760: data_out => bst_data_out, -- OUT
761:
762: -- Control signals
763: bst_trigger => bst_trigger, -- IN
764: stuff_enable => stuff_enable, -- IN
765: fixed_stuff => fixed_stuff, -- IN
766: tx_frame_no_sof => tx_frame_no_sof, -- IN
767:
768: -- Status signals
769: bst_ctr => bst_ctr, -- OUT
770: data_halt => data_halt -- OUT
771: );
772:
773:
774: -----------------------------------------------------------------------------------------------
775: -- Bit Destuffing
776: -----------------------------------------------------------------------------------------------
777: i_mac_bit_destuffing : entity ctu_can_fd_rtl.mac_bit_destuffing
778: port map (
779: clk_sys => clk_sys, -- IN
780: rst_n => rst_n, -- IN
781:
782: -- Data-path
783: data_in => bds_data_in, -- IN
784: data_out => bds_data_out, -- OUT
785:
786: -- Control signals
787: bds_trigger => bds_trigger, -- IN
788: destuff_enable => destuff_enable, -- IN
789: fixed_stuff => fixed_stuff, -- IN
790:
791: -- Status Outpus
792: stuff_err => stuff_err, -- OUT
793: destuffed => destuffed, -- OUT
794: dst_ctr => dst_ctr -- OUT
795: );
796:
797:
798: -----------------------------------------------------------------------------------------------
799: -- Bus traffic counters
800: -----------------------------------------------------------------------------------------------
801: g_bus_traffic_ctrs : if (G_TRAFFIC_CTRS_EN = true) generate
802:
803: i_mac_bus_traffic_counters : entity ctu_can_fd_rtl.mac_bus_traffic_counters
804: port map (
805: clk_sys => clk_sys, -- IN
806: rst_n => rst_n, -- IN
807: scan_mode => scan_mode, -- IN
808:
809: -- Memory registers interface
810: mr_command_rxfcrst => mr_command_rxfcrst, -- IN
811: mr_command_txfcrst => mr_command_txfcrst, -- IN
812:
813: tran_valid => tran_valid_i, -- IN
814: rec_valid => rec_valid_i, -- IN
815:
816: -- Counter outputs
817: tx_frame_ctr => tx_frame_ctr, -- OUT
818: rx_frame_ctr => rx_frame_ctr -- OUT
819: );
820:
821: end generate g_bus_traffic_ctrs;
822:
823: g_no_bus_traffic_ctrs : if (G_TRAFFIC_CTRS_EN = false) generate
824: tx_frame_ctr <= (others => '0');
825: rx_frame_ctr <= (others => '0');
826: end generate;
827:
828: -----------------------------------------------------------------------------------------------
829: -- Trigger multiplexor
830: -----------------------------------------------------------------------------------------------
831: i_mac_trigger_mux : entity ctu_can_fd_rtl.mac_trigger_mux
832: generic map (
833: G_SAMPLE_TRIGGER_COUNT => G_SAMPLE_TRIGGER_COUNT
834: )
835: port map (
836: -- Clock and Asynchronous reset
837: clk_sys => clk_sys, -- IN
838: rst_n => rst_n, -- IN
839:
840: -- Input triggers
841: rx_triggers => rx_triggers, -- IN
842: tx_trigger => tx_trigger, -- IN
843:
844: -- Control signals
845: data_halt => data_halt, -- IN
846: destuffed => destuffed, -- IN
847: fixed_stuff => fixed_stuff, -- IN
848: bds_data_in => bds_data_in, -- IN
849:
850: -- Output triggers
851: pc_tx_trigger => pc_tx_trigger, -- OUT
852: pc_rx_trigger => pc_rx_trigger_i, -- OUT
853: bst_trigger => bst_trigger, -- OUT
854: bds_trigger => bds_trigger, -- OUT
855: crc_trig_rx_nbs => crc_trig_rx_nbs, -- OUT
856: crc_trig_tx_nbs => crc_trig_tx_nbs, -- OUT
857: crc_trig_rx_wbs => crc_trig_rx_wbs, -- OUT
858: crc_trig_tx_wbs => crc_trig_tx_wbs, -- OUT
859:
860: -- Status signals
861: crc_data_rx_wbs => crc_data_rx_wbs -- OUT
862: );
863:
864:
865: -----------------------------------------------------------------------------------------------
866: -----------------------------------------------------------------------------------------------
867: -- Datapath connection
868: -----------------------------------------------------------------------------------------------
869: -----------------------------------------------------------------------------------------------
870:
871: -----------------------------------------------------------------------------------------------
872: -- Protocol control datapath connection:
873: -- 1. RX Data - Output of bit destuffing.
874: -- 2. TX Data - Input to bit stuffing.
875: -----------------------------------------------------------------------------------------------
876: pc_rx_data_nbs <= bds_data_out;
877: bst_data_in <= pc_tx_data_nbs;
878:
879: -----------------------------------------------------------------------------------------------
880: -- CRC 15 (No bit stuffing) data inputs:
881: -- 1. TX Data from Protocol control.
882: -- 2. RX Data after bit destuffing.
883: -----------------------------------------------------------------------------------------------
884: crc_data_tx_nbs <= pc_tx_data_nbs;
885: crc_data_rx_nbs <= bds_data_out;
886:
887: -----------------------------------------------------------------------------------------------
888: -- CRC 17,21 (With bit stuffing) data inputs:
889: -- 1. TX Data after Bit stuffing.
890: -- 2. RX Data before Bit destuffing.
891: -----------------------------------------------------------------------------------------------
892: crc_data_tx_wbs <= bst_data_out;
893:
894: lpb_dominant <= rx_data_wbs and bst_data_out;
895:
896: -----------------------------------------------------------------------------------------------
897: -- Bit Stuffing data input:
898: -- 1. Bit Destuffing output for secondary sampling. This-way core will automatically receive
899: -- what it transmitts without loop over Transceiver. Bit Error is detected by Bus sampling
900: -- properly.
901: -- 2. Looped back dominant Bit for Bus monitoring Mode.
902: -- 3. Regular RX Data
903: -----------------------------------------------------------------------------------------------
904: bds_data_in <= bst_data_out when (sp_control_q = SECONDARY_SAMPLE) else
905: lpb_dominant when (mr_mode_bmm = '1') else
906: rx_data_wbs;
907:
908: -----------------------------------------------------------------------------------------------
909: -- In Bus monitoring mode or when core is disabled, transmitted data to the bus are only
910: -- recessive. Otherwise transmitted data are stuffed data!
911: -----------------------------------------------------------------------------------------------
912: tx_data_wbs_i <= RECESSIVE when (mr_settings_ena = CTU_CAN_DISABLED) else
913: RECESSIVE when (mr_mode_bmm = '1') else
914: bst_data_out;
915:
916: -----------------------------------------------------------------------------------------------
917: -- Node transmitting dominant bit does shall not re-synchronize as a result of dominant
918: -- transmitted bit.
919: -----------------------------------------------------------------------------------------------
920: no_pos_resync <= '1' when (tx_data_wbs_i = DOMINANT) else
921: '0';
922:
923: -----------------------------------------------------------------------------------------------
924: -- CAN Core status record connections
925: -----------------------------------------------------------------------------------------------
926: cc_stat.is_err_active <= is_err_active;
927: cc_stat.is_err_passive <= is_err_passive;
928: cc_stat.is_bus_off <= is_bus_off_i;
929: cc_stat.is_transmitter <= is_transmitter;
930: cc_stat.is_receiver <= is_receiver;
931: cc_stat.is_idle <= is_idle;
932: cc_stat.tx_err_ctr <= tx_err_ctr;
933: cc_stat.rx_err_ctr <= rx_err_ctr;
934: cc_stat.status_pexs <= mr_status_pexs;
935: cc_stat.norm_err_ctr <= norm_err_ctr;
936: cc_stat.data_err_ctr <= data_err_ctr;
937: cc_stat.err_type <= err_capt_err_type;
938: cc_stat.err_erp <= err_capt_err_erp;
939: cc_stat.err_pos <= err_capt_err_pos;
940: cc_stat.retr_ctr <= retr_ctr;
941: cc_stat.alc_bit <= alc_alc_bit;
942: cc_stat.alc_id_field <= alc_alc_id_field;
943: cc_stat.rx_frame_ctr <= rx_frame_ctr;
944: cc_stat.tx_frame_ctr <= tx_frame_ctr;
945: cc_stat.bst_ctr <= bst_ctr;
946: cc_stat.dst_ctr <= dst_ctr;
947: cc_stat.status_ewl <= mr_status_ewl;
948:
949: -----------------------------------------------------------------------------------------------
950: -- Internal signals to output propagation
951: -----------------------------------------------------------------------------------------------
952: rec_valid <= rec_valid_i;
953: arbitration_lost <= arbitration_lost_i;
954: tran_valid <= tran_valid_i;
955: err_detected <= err_detected_i;
956: tx_data_wbs <= tx_data_wbs_i;
957: sp_control <= sp_control_i;
958:
959: -- Test signals observation
960: pc_rx_trigger <= pc_rx_trigger_i;
961:
962: -----------------------------------------------------------------------------------------------
963: -----------------------------------------------------------------------------------------------
964: -- Assertions
965: -----------------------------------------------------------------------------------------------
966: -----------------------------------------------------------------------------------------------
967:
968: -- psl default clock is rising_edge(clk_sys);
969:
970: -- psl no_stuff_bit_in_error_frame_1_asrt : assert never
971: -- (data_halt = '1' and pc_dbg.is_err = '1')
972: -- report "Stuff bits not allowed in Error frame!";
973:
974: -- Note: In following assertion, we can't check at the same clock cycle
975: -- because Data halt will be cleared one clock cycle later than
976: -- Error frame transmission starts!
977:
978: -- psl no_stuff_bit_in_error_frame_2_asrt : assert never
979: -- ({pc_dbg.is_err = '1'; pc_dbg.is_err = '1' and destuffed = '1'})
980: -- report "Stuff bits not allowed in Error frame!";
981:
982: -- psl no_stuff_bit_in_overload_frame_asrt : assert never
983: -- ((destuffed = '1' or data_halt = '1') and pc_dbg.is_overload = '1')
984: -- report "Stuff bits not allowed in Overload frame!";
985:
986: -- psl no_stuff_bit_in_eof_asrt : assert never
987: -- ((destuffed = '1' or data_halt = '1') and pc_dbg.is_eof = '1')
988: -- report "Stuff bits not allowed in End of frame!";
989:
990: -- psl no_stuff_bit_in_intermission_asrt : assert never
991: -- ((destuffed = '1' or data_halt = '1') and pc_dbg.is_intermission = '1')
992: -- report "Stuff bits not allowed in Intermission!";
993:
994: -- psl no_stuff_bit_in_idle_asrt : assert never
995: -- ((destuffed = '1' or data_halt = '1') and is_idle = '1' and mr_mode_rom = '0')
996: -- report "Stuff bits not allowed in Bus idle!";
997:
998: -- psl no_tran_frame_valid_in_rom_or_bmm_asrt : assert never
999: -- (tran_frame_valid = '1' and (mr_mode_bmm = '1' or mr_mode_rom = '1'))
1000: -- report "TX frame shall not be ready in MODE[ROM] or MODE[BMM]!";
1001:
1002: end architecture;