| Current Instance | Statement | Branch | Toggle | Expression | FSM state | Functional | Average |
|---|---|---|---|---|---|---|---|
| CTU_CAN_FD_TB.TB_TOP_CTU_CAN_FD.I_DUT.I_MR_TOP.I_CONTROL_REGISTERS_REG_MAP.I_INT_ENA_CLR_INT_ENA_CLR_SLICE_1_REG.G_BIT(2) | 100.0 % (3/3) | 100.0 % (2/2) | N.A. | 100.0 % (2/2) | N.A. | N.A. | 100.0 % (7/7) |
| Statement | Branch | Toggle | Expression | FSM state | Functional |
|---|
147: reg_value_r(i) <= data_in(i) when (wr_en = '1')
148: else
149: reset_value_i(i); 147: reg_value_r(i) <= data_in(i) when (wr_en = '1') 149: reset_value_i(i); 147: reg_value_r(i) <= data_in(i) when (wr_en = '1') | Evaluated to | Count | Threshold | |
|---|---|---|---|
| Bin | True | 1084 | 1 |
| Bin | False | 2198965 | 1 |
wr_en = '1' | Evaluated to | Count | Threshold | |
|---|---|---|---|
| Bin | False | 2198965 | 1 |
| Bin | True | 1084 | 1 |