Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. Copyright 2022-2025 Advanced Micro Devices, Inc. All Rights Reserved.
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| Tool Version : Vivado v.2025.2 (lin64) Build 6299465 Fri Nov 14 12:34:56 MST 2025
| Date         : Fri Apr 10 21:31:36 2026
| Host         : fedora running 64-bit unknown
| Command      : report_utilization -hierarchical -hierarchical_percentages
| Design       : can_top_level
| Device       : xc7k70tfbv676-1
| Speed File   : -1
| Design State : Optimized
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Utilization Design Information

Table of Contents
-----------------
1. Utilization by Hierarchy

1. Utilization by Hierarchy
---------------------------

+-------------------------------------------------------------+----------------------------------------+--------------+--------------+----------+----------+-------------+----------+----------+------------+
|                           Instance                          |                 Module                 |  Total LUTs  |  Logic LUTs  |  LUTRAMs |   SRLs   |     FFs     |  RAMB36  |  RAMB18  | DSP Blocks |
+-------------------------------------------------------------+----------------------------------------+--------------+--------------+----------+----------+-------------+----------+----------+------------+
| can_top_level                                               |                                  (top) | 4871(11.88%) | 4871(11.88%) | 0(0.00%) | 0(0.00%) | 2616(3.19%) | 1(0.74%) | 8(2.96%) |   0(0.00%) |
|   (can_top_level)                                           |                                  (top) |     0(0.00%) |     0(0.00%) | 0(0.00%) | 0(0.00%) |    0(0.00%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|   bus_sampling_inst                                         |                           bus_sampling |    97(0.24%) |    97(0.24%) | 0(0.00%) | 0(0.00%) |   84(0.10%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|     ssp_generator_inst                                      |                          ssp_generator |    61(0.15%) |    61(0.15%) | 0(0.00%) | 0(0.00%) |   33(0.04%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|   can_core_inst                                             |                               can_core |   916(2.23%) |   916(2.23%) | 0(0.00%) | 0(0.00%) |  396(0.48%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|     (bus_traffic_ctrs_gen.bus_traffic_counters_inst)        |                   bus_traffic_counters |   129(0.31%) |   129(0.31%) | 0(0.00%) | 0(0.00%) |   66(0.08%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|     can_crc_inst                                            |                                can_crc |    56(0.14%) |    56(0.14%) | 0(0.00%) | 0(0.00%) |   53(0.06%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|     fault_confinement_inst                                  |                      fault_confinement |   125(0.30%) |   125(0.30%) | 0(0.00%) | 0(0.00%) |   58(0.07%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|       (err_counters_inst)                                   |                           err_counters |   109(0.27%) |   109(0.27%) | 0(0.00%) | 0(0.00%) |   54(0.07%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|     protocol_control_inst                                   |                       protocol_control |   529(1.29%) |   529(1.29%) | 0(0.00%) | 0(0.00%) |  191(0.23%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|       protocol_control_fsm_inst                             |                   protocol_control_fsm |   427(1.04%) |   427(1.04%) | 0(0.00%) | 0(0.00%) |   36(0.04%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|       rx_shift_reg_inst                                     |                           rx_shift_reg |    39(0.10%) |    39(0.10%) | 0(0.00%) | 0(0.00%) |   75(0.09%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|   int_manager_inst                                          |                            int_manager |    58(0.14%) |    58(0.14%) | 0(0.00%) | 0(0.00%) |   37(0.05%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|   memory_registers_inst                                     |                       memory_registers |  1156(2.82%) |  1156(2.82%) | 0(0.00%) | 0(0.00%) |  524(0.64%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|     test_registers_gen_true.test_registers_reg_map_comp     |                 test_registers_reg_map |   601(1.47%) |   601(1.47%) | 0(0.00%) | 0(0.00%) |   85(0.10%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|       tst_wdata_tst_wdata_slice_4_reg_comp                  | memory_reg_rw_lock__parameterized27_20 |    72(0.18%) |    72(0.18%) | 0(0.00%) | 0(0.00%) |    8(0.01%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|       tst_dest_tst_addr_slice_1_reg_comp                    |    memory_reg_rw_lock__parameterized27 |    78(0.19%) |    78(0.19%) | 0(0.00%) | 0(0.00%) |    8(0.01%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|       tst_dest_tst_mtgt_reg_comp                            |    memory_reg_rw_lock__parameterized33 |   211(0.51%) |   211(0.51%) | 0(0.00%) | 0(0.00%) |    4(0.01%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|       tst_wdata_tst_wdata_slice_1_reg_comp                  | memory_reg_rw_lock__parameterized27_17 |    79(0.19%) |    79(0.19%) | 0(0.00%) | 0(0.00%) |    8(0.01%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|       tst_wdata_tst_wdata_slice_2_reg_comp                  | memory_reg_rw_lock__parameterized27_18 |    79(0.19%) |    79(0.19%) | 0(0.00%) | 0(0.00%) |    8(0.01%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|       tst_wdata_tst_wdata_slice_3_reg_comp                  | memory_reg_rw_lock__parameterized27_19 |    72(0.18%) |    72(0.18%) | 0(0.00%) | 0(0.00%) |    8(0.01%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|     control_registers_reg_map_comp                          |              control_registers_reg_map |   518(1.26%) |   518(1.26%) | 0(0.00%) | 0(0.00%) |  433(0.53%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|   prescaler_inst                                            |                              prescaler |   151(0.37%) |   151(0.37%) | 0(0.00%) | 0(0.00%) |   74(0.09%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|     bit_time_fsm_inst                                       |                           bit_time_fsm |    60(0.15%) |    60(0.15%) | 0(0.00%) | 0(0.00%) |    3(0.01%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|   rx_buffer_inst                                            |                              rx_buffer |  1670(4.07%) |  1670(4.07%) | 0(0.00%) | 0(0.00%) | 1183(1.44%) | 1(0.74%) | 0(0.00%) |   0(0.00%) |
|     (rx_buffer_inst)                                        |                              rx_buffer |    17(0.04%) |    17(0.04%) | 0(0.00%) | 0(0.00%) |   83(0.10%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|     rx_buffer_fsm_inst                                      |                          rx_buffer_fsm |   122(0.30%) |   122(0.30%) | 0(0.00%) | 0(0.00%) |   12(0.01%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|     rx_buffer_pointers_inst                                 |                     rx_buffer_pointers |  1218(2.97%) |  1218(2.97%) | 0(0.00%) | 0(0.00%) |   62(0.08%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|     rx_buffer_ram_inst                                      |                          rx_buffer_ram |   312(0.76%) |   312(0.76%) | 0(0.00%) | 0(0.00%) | 1025(1.25%) | 1(0.74%) | 0(0.00%) |   0(0.00%) |
|       (rx_buffer_ram_inst)                                  |                          rx_buffer_ram |   273(0.67%) |   273(0.67%) | 0(0.00%) | 0(0.00%) | 1025(1.25%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|   tx_arbitrator_inst                                        |                          tx_arbitrator |   239(0.58%) |   239(0.58%) | 0(0.00%) | 0(0.00%) |  111(0.14%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|     (tx_arbitrator_inst)                                    |                          tx_arbitrator |    60(0.15%) |    60(0.15%) | 0(0.00%) | 0(0.00%) |  107(0.13%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|     tx_arbitrator_fsm_inst                                  |                      tx_arbitrator_fsm |   179(0.44%) |   179(0.44%) | 0(0.00%) | 0(0.00%) |    4(0.01%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|   txt_buf_comp_gen[0].txt_buf_even_gen.txt_buffer_even_inst |                        txt_buffer_even |   100(0.24%) |   100(0.24%) | 0(0.00%) | 0(0.00%) |   28(0.03%) | 0(0.00%) | 1(0.37%) |   0(0.00%) |
|     txt_buffer_fsm_inst                                     |                      txt_buffer_fsm_12 |    83(0.20%) |    83(0.20%) | 0(0.00%) | 0(0.00%) |    3(0.01%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|   txt_buf_comp_gen[1].txt_buf_odd_gen.txt_buffer_odd_inst   |                         txt_buffer_odd |    52(0.13%) |    52(0.13%) | 0(0.00%) | 0(0.00%) |   25(0.03%) | 0(0.00%) | 1(0.37%) |   0(0.00%) |
|   txt_buf_comp_gen[2].txt_buf_even_gen.txt_buffer_even_inst |        txt_buffer_even__parameterized0 |    89(0.22%) |    89(0.22%) | 0(0.00%) | 0(0.00%) |   25(0.03%) | 0(0.00%) | 1(0.37%) |   0(0.00%) |
|     txt_buffer_fsm_inst                                     |                       txt_buffer_fsm_8 |    75(0.18%) |    75(0.18%) | 0(0.00%) | 0(0.00%) |    3(0.01%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|   txt_buf_comp_gen[3].txt_buf_odd_gen.txt_buffer_odd_inst   |         txt_buffer_odd__parameterized0 |    54(0.13%) |    54(0.13%) | 0(0.00%) | 0(0.00%) |   25(0.03%) | 0(0.00%) | 1(0.37%) |   0(0.00%) |
|   txt_buf_comp_gen[4].txt_buf_even_gen.txt_buffer_even_inst |        txt_buffer_even__parameterized1 |    90(0.22%) |    90(0.22%) | 0(0.00%) | 0(0.00%) |   25(0.03%) | 0(0.00%) | 1(0.37%) |   0(0.00%) |
|     txt_buffer_fsm_inst                                     |                       txt_buffer_fsm_4 |    77(0.19%) |    77(0.19%) | 0(0.00%) | 0(0.00%) |    3(0.01%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|   txt_buf_comp_gen[5].txt_buf_odd_gen.txt_buffer_odd_inst   |         txt_buffer_odd__parameterized1 |    53(0.13%) |    53(0.13%) | 0(0.00%) | 0(0.00%) |   25(0.03%) | 0(0.00%) | 1(0.37%) |   0(0.00%) |
|   txt_buf_comp_gen[6].txt_buf_even_gen.txt_buffer_even_inst |        txt_buffer_even__parameterized2 |    88(0.21%) |    88(0.21%) | 0(0.00%) | 0(0.00%) |   25(0.03%) | 0(0.00%) | 1(0.37%) |   0(0.00%) |
|     txt_buffer_fsm_inst                                     |                       txt_buffer_fsm_0 |    75(0.18%) |    75(0.18%) | 0(0.00%) | 0(0.00%) |    3(0.01%) | 0(0.00%) | 0(0.00%) |   0(0.00%) |
|   txt_buf_comp_gen[7].txt_buf_odd_gen.txt_buffer_odd_inst   |         txt_buffer_odd__parameterized2 |    64(0.16%) |    64(0.16%) | 0(0.00%) | 0(0.00%) |   25(0.03%) | 0(0.00%) | 1(0.37%) |   0(0.00%) |
+-------------------------------------------------------------+----------------------------------------+--------------+--------------+----------+----------+-------------+----------+----------+------------+


