File: /__w/ctu-can-regression/ctu-can-regression/test/main_tb/agents/functional_coverage_agent/func_cov_tx_arbitrator.vhd
0: --------------------------------------------------------------------------------
1: --
2: -- CTU CAN FD IP Core
3: -- Copyright (C) 2021-2023 Ondrej Ille
4: -- Copyright (C) 2023- Logic Design Services Ltd.s
5: --
6: -- Permission is hereby granted, free of charge, to any person obtaining a copy
7: -- of this VHDL component and associated documentation files (the "Component"),
8: -- to use, copy, modify, merge, publish, distribute the Component for
9: -- non-commercial purposes. Using the Component for commercial purposes is
10: -- forbidden unless previously agreed with Copyright holder.
11: --
12: -- The above copyright notice and this permission notice shall be included in
13: -- all copies or substantial portions of the Component.
14: --
15: -- THE COMPONENT IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16: -- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17: -- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18: -- AUTHORS OR COPYRIGHTHOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19: -- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20: -- FROM, OUT OF OR IN CONNECTION WITH THE COMPONENT OR THE USE OR OTHER DEALINGS
21: -- IN THE COMPONENT.
22: --
23: -- The CAN protocol is developed by Robert Bosch GmbH and protected by patents.
24: -- Anybody who wants to implement this IP core on silicon has to obtain a CAN
25: -- protocol license from Bosch.
26: --
27: -- -------------------------------------------------------------------------------
28: --
29: -- CTU CAN FD IP Core
30: -- Copyright (C) 2015-2020 MIT License
31: --
32: -- Authors:
33: -- Ondrej Ille <ondrej.ille@gmail.com>
34: -- Martin Jerabek <martin.jerabek01@gmail.com>
35: --
36: -- Project advisors:
37: -- Jiri Novak <jnovak@fel.cvut.cz>
38: -- Pavel Pisa <pisa@cmp.felk.cvut.cz>
39: --
40: -- Department of Measurement (http://meas.fel.cvut.cz/)
41: -- Faculty of Electrical Engineering (http://www.fel.cvut.cz)
42: -- Czech Technical University (http://www.cvut.cz/)
43: --
44: -- Permission is hereby granted, free of charge, to any person obtaining a copy
45: -- of this VHDL component and associated documentation files (the "Component"),
46: -- to deal in the Component without restriction, including without limitation
47: -- the rights to use, copy, modify, merge, publish, distribute, sublicense,
48: -- and/or sell copies of the Component, and to permit persons to whom the
49: -- Component is furnished to do so, subject to the following conditions:
50: --
51: -- The above copyright notice and this permission notice shall be included in
52: -- all copies or substantial portions of the Component.
53: --
54: -- THE COMPONENT IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
55: -- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
56: -- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
57: -- AUTHORS OR COPYRIGHTHOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
58: -- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
59: -- FROM, OUT OF OR IN CONNECTION WITH THE COMPONENT OR THE USE OR OTHER DEALINGS
60: -- IN THE COMPONENT.
61: --
62: -- The CAN protocol is developed by Robert Bosch GmbH and protected by patents.
63: -- Anybody who wants to implement this IP core on silicon has to obtain a CAN
64: -- protocol license from Bosch.
65: --
66: --------------------------------------------------------------------------------
67:
68: --------------------------------------------------------------------------------
69: -- @Purpose:
70: -- Functional coverage for TX Arbitrator
71: --
72: --------------------------------------------------------------------------------
73: -- Revision History:
74: -- 1.6.2025 Created file
75: --------------------------------------------------------------------------------
76:
77: Library ctu_can_fd_tb;
78: context ctu_can_fd_tb.ieee_context;
79: context ctu_can_fd_tb.tb_common_context;
80: context ctu_can_fd_tb.rtl_context;
81:
82: use ctu_can_fd_tb.clk_gen_agent_pkg.all;
83: use ctu_can_fd_tb.tb_shared_vars_pkg.all;
84:
85: entity func_cov_tx_arbitrator is
86: generic (
87: G_TXT_BUFFER_COUNT : natural
88: );
89: port (
90: -- DUT clock
91: clk : in std_logic
92: );
93: end entity;
94:
95: architecture tb of func_cov_tx_arbitrator is
96:
97: -----------------------------------------------------------------------------------------------
98: -- Aliases to "tx_arbitrator" top
99: -----------------------------------------------------------------------------------------------
100:
101: alias txtb_hw_cmd is
102: << signal .tb_top_ctu_can_fd.dut.tx_arbitrator_inst.txtb_hw_cmd : t_txtb_hw_cmd >>;
103:
104: alias tran_frame_valid is
105: << signal .tb_top_ctu_can_fd.dut.tx_arbitrator_inst.tran_frame_valid : std_logic >>;
106:
107: alias mr_mode_txbbm is
108: << signal .tb_top_ctu_can_fd.dut.tx_arbitrator_inst.mr_mode_txbbm : std_logic >>;
109:
110: alias mr_mode_tttm is
111: << signal .tb_top_ctu_can_fd.dut.tx_arbitrator_inst.mr_mode_tttm : std_logic >>;
112:
113: alias select_buf_avail is
114: << signal .tb_top_ctu_can_fd.dut.tx_arbitrator_inst.select_buf_avail : std_logic >>;
115:
116: alias select_buf_index is
117: << signal .tb_top_ctu_can_fd.dut.tx_arbitrator_inst.select_buf_index : natural range 0 to G_TXT_BUFFER_COUNT - 1 >>;
118:
119: alias txtb_available is
120: << signal .tb_top_ctu_can_fd.dut.tx_arbitrator_inst.txtb_available : std_logic_vector(G_TXT_BUFFER_COUNT - 1 downto 0) >>;
121:
122: alias txtb_changed is
123: << signal .tb_top_ctu_can_fd.dut.tx_arbitrator_inst.txtb_changed : std_logic >>;
124:
125: alias select_index_changed is
126: << signal .tb_top_ctu_can_fd.dut.tx_arbitrator_inst.select_index_changed : std_logic >>;
127:
128: -----------------------------------------------------------------------------------------------
129: -- Aliases to "tx_arbitrator_fsm" top
130: -----------------------------------------------------------------------------------------------
131:
132: alias curr_state is
133: << signal .tb_top_ctu_can_fd.dut.tx_arbitrator_inst.tx_arbitrator_fsm_inst.curr_state : t_tx_arb_state >>;
134:
135: alias txtb_hw_cmd_lock is
136: << signal .tb_top_ctu_can_fd.dut.tx_arbitrator_inst.tx_arbitrator_fsm_inst.txtb_hw_cmd_lock : std_logic >>;
137:
138: alias parity_error_vld is
139: << signal .tb_top_ctu_can_fd.dut.tx_arbitrator_inst.tx_arbitrator_fsm_inst.parity_error_vld : std_logic >>;
140:
141: alias fsm_wait_state_q is
142: << signal .tb_top_ctu_can_fd.dut.tx_arbitrator_inst.tx_arbitrator_fsm_inst.fsm_wait_state_q : std_logic >>;
143:
144: alias timestamp_valid is
145: << signal .tb_top_ctu_can_fd.dut.tx_arbitrator_inst.tx_arbitrator_fsm_inst.timestamp_valid : std_logic >>;
146:
147: begin
148:
149: -- psl default clock is rising_edge(clk);
150:
151: -----------------------------------------------------------------------------------------------
152: -- Lock and unlock commands
153: -----------------------------------------------------------------------------------------------
154:
155: g_each_buf : for i in 0 to G_TXT_BUFFER_COUNT - 1 generate
156: begin
157: func_cov_tx_arbitrator_per_buf_inst : entity ctu_can_fd_tb.func_cov_tx_arbitrator_per_buf
158: generic map (
159: G_TXT_BUFFER_COUNT => G_TXT_BUFFER_COUNT,
160: G_TXT_BUF_INDEX => i
161: )
162: port map (
163: clk => clk
164: );
165: end generate g_each_buf;
166:
167: -----------------------------------------------------------------------------------------------
168: -- Modes
169: -----------------------------------------------------------------------------------------------
170:
171: -- Note: We use gating by tran_frame_valid to avoid falsly covered scenarios,
172: -- where reset value has the mode disabled!
173: --
174: -- psl txtb_ttm_ena_cov : cover
175: -- {mr_mode_tttm = '1' and tran_frame_valid = '1'};
176: -- psl txtb_ttm_dis_cov : cover
177: -- {mr_mode_tttm = '0' and tran_frame_valid = '1'};
178:
179: -- psl txtb_txbbm_ena_cov : cover
180: -- {mr_mode_txbbm = '1' and tran_frame_valid = '1'};
181: -- psl txtb_txbbm_dis_cov : cover
182: -- {mr_mode_txbbm = '0' and tran_frame_valid = '1'};
183:
184: -----------------------------------------------------------------------------------------------
185: -- Selected TXT Buffer change corner-cases
186: -----------------------------------------------------------------------------------------------
187:
188: -- psl txt_buf_change_cov : cover
189: -- {txtb_changed = '1' and txtb_hw_cmd.lock = '1'}
190: -- report "TX Buffer changed between two frames";
191: --
192: -- psl txt_buf_sim_chng_and_lock_cov : cover
193: -- {select_index_changed = '1' and txtb_hw_cmd.lock = '1'};
194:
195: -----------------------------------------------------------------------------------------------
196: -- Lock commands in various parts of TXT Buffer validation
197: -----------------------------------------------------------------------------------------------
198:
199: -- psl txtb_lock_arb_sel_low_cov : cover
200: -- {curr_state = s_arb_sel_low_ts and txtb_hw_cmd_lock = '1'};
201: --
202: -- psl txtb_lock_arb_sel_hi_cov : cover
203: -- {curr_state = s_arb_sel_upp_ts and txtb_hw_cmd_lock = '1'};
204: --
205: -- psl txtb_lock_arb_sel_ftw_cov : cover
206: -- {curr_state = s_arb_sel_ftw and txtb_hw_cmd_lock = '1'};
207: --
208: -- psl txtb_lock_arb_sel_ffw_cov : cover
209: -- {curr_state = s_arb_sel_ffw and txtb_hw_cmd_lock = '1'};
210: --
211: -- psl txtb_lock_arb_sel_idw_cov : cover
212: -- {curr_state = s_arb_sel_idw and txtb_hw_cmd_lock = '1'};
213: --
214: -- psl txtb_lock_arb_sel_validated_cov : cover
215: -- {curr_state = s_arb_validated and txtb_hw_cmd_lock = '1'};
216:
217: -----------------------------------------------------------------------------------------------
218: -- TXT Buffer becoming suddenly unavailable during TXT Buffer validation
219: -----------------------------------------------------------------------------------------------
220:
221: -- psl txtb_not_available_arb_sel_low_cov : cover
222: -- {curr_state = s_arb_sel_low_ts and select_buf_avail = '0'};
223: --
224: -- psl txtb_not_available_arb_sel_upp_cov : cover
225: -- {curr_state = s_arb_sel_upp_ts and select_buf_avail = '0'};
226: --
227: -- psl txtb_not_available_arb_sel_ffw_cov : cover
228: -- {curr_state = s_arb_sel_ffw and select_buf_avail = '0'};
229: --
230: -- psl txtb_not_available_arb_sel_ftw_cov : cover
231: -- {curr_state = s_arb_sel_ftw and select_buf_avail = '0'};
232: --
233: -- psl txtb_not_available_arb_sel_idw_cov : cover
234: -- {curr_state = s_arb_sel_idw and select_buf_avail = '0'};
235: --
236: -- psl txtb_not_available_arb_validated_cov : cover
237: -- {curr_state = s_arb_validated and select_buf_avail = '0'};
238:
239: -----------------------------------------------------------------------------------------------
240: -- Parity errors
241: -----------------------------------------------------------------------------------------------
242:
243: -- psl txtb_ffw_parity_error_cov : cover
244: -- {curr_state = s_arb_sel_ffw and parity_error_vld = '1'};
245:
246: -- psl txtb_idw_parity_error_cov : cover
247: -- {curr_state = s_arb_sel_idw and parity_error_vld = '1'};
248:
249: -- psl txtb_lts_parity_error_cov : cover
250: -- {curr_state = s_arb_sel_low_ts and parity_error_vld = '1'};
251:
252: -- psl txtb_uts_parity_error_cov : cover
253: -- {curr_state = s_arb_sel_upp_ts and parity_error_vld = '1'};
254:
255: -----------------------------------------------------------------------------------------------
256: -- Waiting till timestamp will be ready (transmission at given time)
257: -----------------------------------------------------------------------------------------------
258:
259: -- psl txt_buf_wait_till_timestamp_cov : cover
260: -- {curr_state = s_arb_sel_upp_ts and fsm_wait_state_q = '0' and
261: -- timestamp_valid = '0'};
262:
263: end architecture;