File: /__w/ctu-can-regression/ctu-can-regression/src/can_core/protocol_control.vhd
0: --------------------------------------------------------------------------------
1: --
2: -- CTU CAN FD IP Core
3: -- Copyright (C) 2021-2023 Ondrej Ille
4: -- Copyright (C) 2023- Logic Design Services Ltd.s
5: --
6: -- Permission is hereby granted, free of charge, to any person obtaining a copy
7: -- of this VHDL component and associated documentation files (the "Component"),
8: -- to use, copy, modify, merge, publish, distribute the Component for
9: -- non-commercial purposes. Using the Component for commercial purposes is
10: -- forbidden unless previously agreed with Copyright holder.
11: --
12: -- The above copyright notice and this permission notice shall be included in
13: -- all copies or substantial portions of the Component.
14: --
15: -- THE COMPONENT IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16: -- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17: -- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18: -- AUTHORS OR COPYRIGHTHOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19: -- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20: -- FROM, OUT OF OR IN CONNECTION WITH THE COMPONENT OR THE USE OR OTHER DEALINGS
21: -- IN THE COMPONENT.
22: --
23: -- The CAN protocol is developed by Robert Bosch GmbH and protected by patents.
24: -- Anybody who wants to implement this IP core on silicon has to obtain a CAN
25: -- protocol license from Bosch.
26: --
27: -- -------------------------------------------------------------------------------
28: --
29: -- CTU CAN FD IP Core
30: -- Copyright (C) 2015-2020 MIT License
31: --
32: -- Authors:
33: -- Ondrej Ille <ondrej.ille@gmail.com>
34: -- Martin Jerabek <martin.jerabek01@gmail.com>
35: --
36: -- Project advisors:
37: -- Jiri Novak <jnovak@fel.cvut.cz>
38: -- Pavel Pisa <pisa@cmp.felk.cvut.cz>
39: --
40: -- Department of Measurement (http://meas.fel.cvut.cz/)
41: -- Faculty of Electrical Engineering (http://www.fel.cvut.cz)
42: -- Czech Technical University (http://www.cvut.cz/)
43: --
44: -- Permission is hereby granted, free of charge, to any person obtaining a copy
45: -- of this VHDL component and associated documentation files (the "Component"),
46: -- to deal in the Component without restriction, including without limitation
47: -- the rights to use, copy, modify, merge, publish, distribute, sublicense,
48: -- and/or sell copies of the Component, and to permit persons to whom the
49: -- Component is furnished to do so, subject to the following conditions:
50: --
51: -- The above copyright notice and this permission notice shall be included in
52: -- all copies or substantial portions of the Component.
53: --
54: -- THE COMPONENT IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
55: -- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
56: -- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
57: -- AUTHORS OR COPYRIGHTHOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
58: -- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
59: -- FROM, OUT OF OR IN CONNECTION WITH THE COMPONENT OR THE USE OR OTHER DEALINGS
60: -- IN THE COMPONENT.
61: --
62: -- The CAN protocol is developed by Robert Bosch GmbH and protected by patents.
63: -- Anybody who wants to implement this IP core on silicon has to obtain a CAN
64: -- protocol license from Bosch.
65: --
66: --------------------------------------------------------------------------------
67:
68: --------------------------------------------------------------------------------
69: -- Module:
70: -- Protocol control module.
71: --
72: -- Sub-modules:
73: -- 1. Protocol control FSM.
74: -- 2. TX Shift register.
75: -- 3. RX Shift register.
76: -- 4. Error detector.
77: -- 5. Control counter
78: -- 6. Re-integration counter.
79: -- 7. Retransmitt counter.
80: --------------------------------------------------------------------------------
81:
82: Library ieee;
83: use ieee.std_logic_1164.all;
84: use ieee.numeric_std.ALL;
85:
86: Library ctu_can_fd_rtl;
87: use ctu_can_fd_rtl.can_constants_pkg.all;
88: use ctu_can_fd_rtl.can_types_pkg.all;
89:
90: use ctu_can_fd_rtl.CAN_FD_register_map.all;
91: use ctu_can_fd_rtl.CAN_FD_frame_format.all;
92:
93: entity protocol_control is
94: generic (
95: -- Control counter width
96: G_CTRL_CTR_WIDTH : natural;
97:
98: -- Retransmitt limit counter width
99: G_RETR_LIM_CTR_WIDTH : natural;
100:
101: -- Insert pipeline on "error_valid"
102: G_ERR_VALID_PIPELINE : boolean
103: );
104: port (
105: -------------------------------------------------------------------------------------------
106: -- Clock and Asynchronous Reset
107: -------------------------------------------------------------------------------------------
108: clk_sys : in std_logic;
109: res_n : in std_logic;
110:
111: -------------------------------------------------------------------------------------------
112: -- DFT support
113: -------------------------------------------------------------------------------------------
114: scan_enable : in std_logic;
115:
116: -------------------------------------------------------------------------------------------
117: -- Memory registers interface
118: -------------------------------------------------------------------------------------------
119: mr_mode_acf : in std_logic;
120: mr_mode_stm : in std_logic;
121: mr_mode_bmm : in std_logic;
122: mr_mode_fde : in std_logic;
123: mr_mode_rom : in std_logic;
124: mr_mode_tstm : in std_logic;
125: mr_mode_sam : in std_logic;
126:
127: mr_settings_ena : in std_logic;
128: mr_settings_nisofd : in std_logic;
129: mr_settings_rtrth : in std_logic_vector(G_RETR_LIM_CTR_WIDTH - 1 downto 0);
130: mr_settings_rtrle : in std_logic;
131: mr_settings_ilbp : in std_logic;
132: mr_settings_pex : in std_logic;
133:
134: mr_command_ercrst : in std_logic;
135: mr_command_cpexs : in std_logic;
136:
137: mr_ssp_cfg_ssp_src : in std_logic_vector(1 downto 0);
138:
139: -- ALC register
140: alc_alc_bit : out std_logic_vector(4 downto 0);
141: alc_alc_id_field : out std_logic_vector(2 downto 0);
142:
143: -- ERR_CAPT register
144: err_capt_err_type : out std_logic_vector(2 downto 0);
145: err_capt_err_pos : out std_logic_vector(3 downto 0);
146: err_capt_err_erp : out std_logic;
147:
148: -- Protocol exception status
149: mr_status_pexs : out std_logic;
150:
151: -- Protocol control debug information
152: pc_dbg : out t_protocol_control_dbg;
153:
154: -------------------------------------------------------------------------------------------
155: -- TXT Buffers interface
156: -------------------------------------------------------------------------------------------
157: -- TX Data word
158: tran_word : in std_logic_vector(31 downto 0);
159:
160: -- TX Data length code
161: tran_dlc : in std_logic_vector(3 downto 0);
162:
163: -- TX Remote transmission request flag
164: tran_is_rtr : in std_logic;
165:
166: -- TX Identifier type (0-Basic, 1-Extended)
167: tran_ident_type : in std_logic;
168:
169: -- TX Frame type (0-CAN 2.0, 1-CAN FD)
170: tran_frame_type : in std_logic;
171:
172: -- TX Bit rate shift
173: tran_brs : in std_logic;
174:
175: -- TX Identifier
176: tran_identifier : in std_logic_vector(28 downto 0);
177:
178: -- TX frame test word
179: tran_frame_test : in t_frame_test_w;
180:
181: -- Frame in TXT Buffer is valid any can be transmitted.
182: tran_frame_valid : in std_logic;
183:
184: -- Transmission frame
185: tran_frame_parity_error : in std_logic;
186:
187: -- HW Commands for TX Arbitrator and TXT Buffers
188: txtb_hw_cmd : out t_txtb_hw_cmd;
189:
190: -- Pointer to TXT buffer memory
191: txtb_ptr : out natural range 0 to 20;
192:
193: -- Clock enable for TXT Buffer memory
194: txtb_clk_en : out std_logic;
195:
196: -- Selected TXT Buffer index changed
197: txtb_changed : in std_logic;
198:
199: -------------------------------------------------------------------------------------------
200: -- RX Buffer interface
201: -------------------------------------------------------------------------------------------
202: -- RX CAN Identifier
203: rec_ident : out std_logic_vector(28 downto 0);
204:
205: -- RX Data length code
206: rec_dlc : out std_logic_vector(3 downto 0);
207:
208: -- RX Remote transmission request flag
209: rec_is_rtr : out std_logic;
210:
211: -- RX Recieved identifier type (0-BASE Format, 1-Extended Format);
212: rec_ident_type : out std_logic;
213:
214: -- RX frame type (0-CAN 2.0, 1- CAN FD)
215: rec_frame_type : out std_logic;
216:
217: -- Received Loopback frame
218: rec_lbpf : out std_logic;
219:
220: -- RX Bit rate shift Flag
221: rec_brs : out std_logic;
222:
223: -- RX Error state indicator
224: rec_esi : out std_logic;
225:
226: -- RX Identifier is valid
227: rec_ivld : out std_logic;
228:
229: -- Store Metadata in RX Buffer
230: store_metadata : out std_logic;
231:
232: -- Abort storing of frame in RX Buffer. Revert to last frame.
233: rec_abort : out std_logic;
234:
235: -- Store data word to RX Buffer.
236: store_data : out std_logic;
237:
238: -- Data words to be stored to RX Buffer.
239: store_data_word : out std_logic_vector(31 downto 0);
240:
241: -- Pulse in Start of Frame
242: sof_pulse : out std_logic;
243:
244: -------------------------------------------------------------------------------------------
245: -- Operation control FSM Interface
246: -------------------------------------------------------------------------------------------
247: -- Unit is transmitter
248: is_transmitter : in std_logic;
249:
250: -- Unit is receiver
251: is_receiver : in std_logic;
252:
253: -- Loss of arbitration -> Turn receiver!
254: arbitration_lost : out std_logic;
255:
256: -- Set unit to be transmitter (in SOF)
257: set_transmitter : out std_logic;
258:
259: -- Set unit to be receiver
260: set_receiver : out std_logic;
261:
262: -- Set unit to be idle
263: set_idle : out std_logic;
264:
265: -------------------------------------------------------------------------------------------
266: -- Fault confinement Interface
267: -------------------------------------------------------------------------------------------
268: -- Unit is error active
269: is_err_active : in std_logic;
270:
271: -- Unit is error passive
272: is_err_passive : in std_logic;
273:
274: -- Unit is Bus-off
275: is_bus_off : in std_logic;
276:
277: -- Error detected
278: err_detected : out std_logic;
279:
280: -- Primary Error
281: primary_err : out std_logic;
282:
283: -- Active Error or Overload flag is being tranmsmitted
284: act_err_ovr_flag : out std_logic;
285:
286: -- Error delimiter too late
287: err_delim_late : out std_logic;
288:
289: -- Set unit to be error active
290: set_err_active : out std_logic;
291:
292: -- Error counters should remain unchanged
293: err_ctrs_unchanged : out std_logic;
294:
295: -------------------------------------------------------------------------------------------
296: -- TX and RX Trigger signals to Sample and Transmitt Data
297: -------------------------------------------------------------------------------------------
298: -- TX Trigger (in SYNC segment)
299: tx_trigger : in std_logic;
300:
301: -- RX Trigger (one clock cycle delayed after Sample point)
302: rx_trigger : in std_logic;
303:
304: -------------------------------------------------------------------------------------------
305: -- CAN Bus serial data stream
306: -------------------------------------------------------------------------------------------
307: -- TX Data
308: tx_data_nbs : out std_logic;
309:
310: -- TX Data (post bit stuffing)
311: tx_data_wbs : in std_logic;
312:
313: -- RX Data
314: rx_data_nbs : in std_logic;
315:
316: -------------------------------------------------------------------------------------------
317: -- Bit Stuffing Interface
318: -------------------------------------------------------------------------------------------
319: -- Bit Stuffing enabled
320: stuff_enable : out std_logic;
321:
322: -- Bit De-stuffing enabled
323: destuff_enable : out std_logic;
324:
325: -- Bit Stuffing type (0-Normal, 1-Fixed)
326: fixed_stuff : out std_logic;
327:
328: -- Frame transmission without SOF started
329: tx_frame_no_sof : out std_logic;
330:
331: -- Number of de-stuffed bits modulo 8
332: dst_ctr : in std_logic_vector(2 downto 0);
333:
334: -- Number of stuffed bits modulo 8
335: bst_ctr : in std_logic_vector(2 downto 0);
336:
337: -- Stuff Error
338: stuff_err : in std_logic;
339:
340: -------------------------------------------------------------------------------------------
341: -- Bus Sampling Interface
342: -------------------------------------------------------------------------------------------
343: -- Bit Error detected
344: bit_err : in std_logic;
345:
346: -- Reset Bit time measurement counter
347: btmc_reset : out std_logic;
348:
349: -- Start Measurement of data bit time (in TX Trigger)
350: dbt_measure_start : out std_logic;
351:
352: -- First SSP generated (in ESI bit)
353: gen_first_ssp : out std_logic;
354:
355: -- Synchronization edge
356: sync_edge : in std_logic;
357:
358: -- Bit error detection enabled
359: bit_err_enable : out std_logic;
360:
361: -------------------------------------------------------------------------------------------
362: -- CRC Interface
363: -------------------------------------------------------------------------------------------
364: -- Enable CRC calculation
365: crc_enable : out std_logic;
366:
367: -- CRC calculation - speculative enable
368: crc_spec_enable : out std_logic;
369:
370: -- Use RX Data for CRC calculation
371: crc_calc_from_rx : out std_logic;
372:
373: -- Load CRC Initialization vector
374: load_init_vect : out std_logic;
375:
376: -- Calculated CRC 15
377: crc_15 : in std_logic_vector(14 downto 0);
378:
379: -- Calculated CRC 17
380: crc_17 : in std_logic_vector(16 downto 0);
381:
382: -- Calculated CRC 21
383: crc_21 : in std_logic_vector(20 downto 0);
384:
385: -------------------------------------------------------------------------------------------
386: -- Control signals
387: -------------------------------------------------------------------------------------------
388: -- Sample control (Nominal, Data, Secondary)
389: sp_control : out std_logic_vector(1 downto 0);
390:
391: -- Sample control (Registered)
392: sp_control_q : out std_logic_vector(1 downto 0);
393:
394: -- Enable Nominal Bit time counters.
395: nbt_ctrs_en : out std_logic;
396:
397: -- Enable Data Bit time counters.
398: dbt_ctrs_en : out std_logic;
399:
400: -- Synchronisation control (No synchronisation, Hard Synchronisation, Resynchronisation
401: sync_control : out std_logic_vector(1 downto 0);
402:
403: -- Clear the Shift register for secondary sampling point.
404: ssp_reset : out std_logic;
405:
406: -- Enable measurement of Transmitter delay
407: tran_delay_meas : out std_logic;
408:
409: -- Transmitted frame is valid
410: tran_valid : out std_logic;
411:
412: -- Received frame is valid
413: rec_valid : out std_logic;
414:
415: -- Decrement Receive Error counter
416: decrement_rec : out std_logic;
417:
418: -- Bit Error in passive error flag after ACK Error
419: bit_err_after_ack_err : out std_logic;
420:
421: -------------------------------------------------------------------------------------------
422: -- Status signals
423: -------------------------------------------------------------------------------------------
424: -- Bit rate shifted
425: br_shifted : out std_logic;
426:
427: -- Form Error has occurred
428: form_err : out std_logic;
429:
430: -- ACK Error has occurred
431: ack_err : out std_logic;
432:
433: -- CRC Error has occurred
434: crc_err : out std_logic;
435:
436: -- Status of retransmit counter (for observation purpose)
437: retr_ctr : out std_logic_vector(G_RETR_LIM_CTR_WIDTH - 1 downto 0)
438: );
439: end entity;
440:
441: architecture rtl of protocol_control is
442:
443: -- TXT Buffer word (endianity swapped)
444: signal tran_word_swapped : std_logic_vector(31 downto 0);
445:
446: -- Error frame request
447: signal err_frm_req : std_logic;
448:
449: -- Load commands for TX Shift register
450: signal tx_load_base_id : std_logic;
451: signal tx_load_ext_id : std_logic;
452: signal tx_load_dlc : std_logic;
453: signal tx_load_data_word : std_logic;
454: signal tx_load_stuff_count : std_logic;
455: signal tx_load_crc : std_logic;
456:
457: -- TX Shift register enabled
458: signal tx_shift_ena : std_logic;
459:
460: -- Transmit dominant bit
461: signal tx_dominant : std_logic;
462:
463: -- Clear all registers in RX Shift register
464: signal rx_clear : std_logic;
465:
466: -- Store commands for RX Shift register
467: signal rx_store_base_id : std_logic;
468: signal rx_store_ext_id : std_logic;
469: signal rx_store_ide : std_logic;
470: signal rx_store_rtr : std_logic;
471: signal rx_store_edl : std_logic;
472: signal rx_store_dlc : std_logic;
473: signal rx_store_esi : std_logic;
474: signal rx_store_brs : std_logic;
475: signal rx_store_stuff_count : std_logic;
476:
477: -- Clock Enable RX Shift register for each byte.
478: signal rx_shift_ena : std_logic_vector(3 downto 0);
479:
480: -- Selector for inputs of each byte of shift register (0-Previous byte output, 1-RX Data input)
481: signal rx_shift_in_sel : std_logic;
482:
483: -- RX value of Remote transmission request
484: signal rec_is_rtr_i : std_logic;
485:
486: -- RX value of DLC (combinational), valid only in last bit of DLC
487: signal rec_dlc_d : std_logic_vector(3 downto 0);
488:
489: -- RX value of DLC (captured)
490: signal rec_dlc_q : std_logic_vector(3 downto 0);
491:
492: -- RX frame type (0-CAN 2.0, 1- CAN FD)
493: signal rec_frame_type_i : std_logic;
494:
495: -- Preload control counter
496: signal ctrl_ctr_pload : std_logic;
497:
498: -- Control counter preload value
499: signal ctrl_ctr_pload_val : std_logic_vector(8 downto 0);
500:
501: -- Control counter is enabled
502: signal ctrl_ctr_ena : std_logic;
503:
504: -- Control counter is zero
505: signal ctrl_ctr_zero : std_logic;
506:
507: -- Control counter is equal to 1
508: signal ctrl_ctr_one : std_logic;
509:
510: -- Control counter counted multiple of 8 bits
511: signal ctrl_counted_byte : std_logic;
512:
513: -- Control counter byte index within a memory word
514: signal ctrl_counted_byte_index : std_logic_vector(1 downto 0);
515:
516: -- Control counter - TXT Buffer memory index
517: signal ctrl_ctr_mem_index : std_logic_vector(4 downto 0);
518:
519: -- Complementary counter enable
520: signal compl_ctr_ena : std_logic;
521:
522: -- Reintegration counter Clear (synchronous)
523: signal reinteg_ctr_clr : std_logic;
524:
525: -- Enable counting (with RX Trigger)
526: signal reinteg_ctr_enable : std_logic;
527:
528: -- Reintegration counter expired (reached 128)
529: signal reinteg_ctr_expired : std_logic;
530:
531: -- Clear Retransmitt counter
532: signal retr_ctr_clear : std_logic;
533:
534: -- Increment Retransmitt counter by 1
535: signal retr_ctr_add : std_logic;
536:
537: -- Retransmitt limit was reached
538: signal retr_limit_reached : std_logic;
539:
540: -- Form Error has occurred
541: signal form_err_i : std_logic;
542:
543: -- ACK Error has occurred
544: signal ack_err_i : std_logic;
545:
546: -- Perform CRC check
547: signal crc_check : std_logic;
548:
549: -- Bit Error in arbitration field
550: signal bit_err_arb : std_logic;
551:
552: -- Calculated CRC and Stuff count are matching received ones
553: signal crc_match : std_logic;
554:
555: -- CRC error signalling
556: signal crc_err_i : std_logic;
557:
558: -- Clear CRC Match flag
559: signal crc_clear_match_flag : std_logic;
560:
561: -- CRC Source (CRC15, CRC17, CRC21)
562: signal crc_src : std_logic_vector(1 downto 0);
563:
564: -- Error position field (for Error capture)
565: signal err_pos : std_logic_vector(3 downto 0);
566:
567: -- Received CRC (driven from RX Shift register)
568: signal rx_crc : std_logic_vector(20 downto 0);
569:
570: -- RX Stuff count (grey coded) + RX parity
571: signal rx_stuff_count : std_logic_vector(3 downto 0);
572:
573: -- Fixed Stuff (internal)
574: signal fixed_stuff_i : std_logic;
575:
576: -- Arbitration lost (internal)
577: signal arbitration_lost_i : std_logic;
578:
579: -- Part of arbitration currently transmitted
580: signal arbitration_part : std_logic_vector(2 downto 0);
581:
582: -- Debug status of protocol controller
583: signal pc_dbg_i : t_protocol_control_dbg;
584:
585: begin
586:
587: -----------------------------------------------------------------------------------------------
588: -- TX Data word endian swapper
589: -----------------------------------------------------------------------------------------------
590: endian_swapper_tx_inst : entity ctu_can_fd_rtl.endian_swapper
591: generic map(
592: G_SWAP_GEN => true,
593: G_WORD_SIZE => 4, -- Number of Groups
594: G_GROUP_SIZE => 8 -- Group size (bits)
595: )
596: port map(
597: input => tran_word, -- IN
598: output => tran_word_swapped -- OUT
599: );
600:
601: -----------------------------------------------------------------------------------------------
602: -- Protocol control FSM
603: -----------------------------------------------------------------------------------------------
604: protocol_control_fsm_inst : entity ctu_can_fd_rtl.protocol_control_fsm
605: port map(
606: clk_sys => clk_sys, -- IN
607: res_n => res_n, -- IN
608:
609: -- Signals which cause state change
610: rx_trigger => rx_trigger, -- IN
611: err_frm_req => err_frm_req, -- IN
612:
613: -- Memory registers interface
614: mr_settings_ena => mr_settings_ena, -- IN
615: mr_settings_nisofd => mr_settings_nisofd, -- IN
616: mr_command_ercrst => mr_command_ercrst, -- IN
617: mr_mode_acf => mr_mode_acf, -- IN
618: mr_mode_stm => mr_mode_stm, -- IN
619: mr_mode_bmm => mr_mode_bmm, -- IN
620: mr_settings_rtrle => mr_settings_rtrle, -- IN
621: mr_settings_ilbp => mr_settings_ilbp, -- IN
622: mr_mode_fde => mr_mode_fde, -- IN
623: mr_ssp_cfg_ssp_src => mr_ssp_cfg_ssp_src, -- IN
624: mr_settings_pex => mr_settings_pex, -- IN
625: mr_command_cpexs => mr_command_cpexs, -- IN
626: mr_mode_rom => mr_mode_rom, -- IN
627: mr_mode_sam => mr_mode_sam, -- IN
628:
629: mr_status_pexs => mr_status_pexs, -- OUT
630:
631: pc_dbg => pc_dbg_i, -- OUT
632:
633: -- Data-path interface
634: tx_data_wbs => tx_data_wbs, -- IN
635: rx_data_nbs => rx_data_nbs, -- IN
636:
637: -- RX Buffer interface
638: store_metadata => store_metadata, -- OUT
639: store_data => store_data, -- OUT
640: rec_valid => rec_valid, -- OUT
641: rec_abort => rec_abort, -- OUT
642: sof_pulse => sof_pulse, -- OUT
643:
644: -- TXT Buffer, TX Arbitrator interface
645: tran_frame_valid => tran_frame_valid, -- IN
646: txtb_hw_cmd => txtb_hw_cmd, -- OUT
647: txtb_ptr => txtb_ptr, -- OUT
648: txtb_clk_en => txtb_clk_en, -- OUT
649: tran_dlc => tran_dlc, -- IN
650: tran_is_rtr => tran_is_rtr, -- IN
651: tran_frame_type => tran_frame_type, -- IN
652: tran_ident_type => tran_ident_type, -- IN
653: tran_brs => tran_brs, -- IN
654:
655: -- TX Shift register interface
656: tx_load_base_id => tx_load_base_id, -- OUT
657: tx_load_ext_id => tx_load_ext_id, -- OUT
658: tx_load_dlc => tx_load_dlc, -- OUT
659: tx_load_data_word => tx_load_data_word, -- OUT
660: tx_load_stuff_count => tx_load_stuff_count, -- OUT
661: tx_load_crc => tx_load_crc, -- OUT
662: tx_shift_ena => tx_shift_ena, -- OUT
663: tx_dominant => tx_dominant, -- OUT
664:
665: -- RX Shift register interface
666: rx_clear => rx_clear, -- OUT
667: rx_store_base_id => rx_store_base_id, -- OUT
668: rx_store_ext_id => rx_store_ext_id, -- OUT
669: rx_store_ide => rx_store_ide, -- OUT
670: rx_store_rtr => rx_store_rtr, -- OUT
671: rx_store_edl => rx_store_edl, -- OUT
672: rx_store_dlc => rx_store_dlc, -- OUT
673: rx_store_esi => rx_store_esi, -- OUT
674: rx_store_brs => rx_store_brs, -- OUT
675: rx_store_stuff_count => rx_store_stuff_count, -- OUT
676: rx_shift_ena => rx_shift_ena, -- OUT
677: rx_shift_in_sel => rx_shift_in_sel, -- OUT
678: rec_is_rtr => rec_is_rtr_i, -- IN
679: rec_dlc_d => rec_dlc_d, -- IN
680: rec_dlc_q => rec_dlc_q, -- IN
681: rec_frame_type => rec_frame_type_i, -- IN
682: rec_lbpf => rec_lbpf, -- OUT
683: rec_ivld => rec_ivld, -- OUT
684:
685: -- Control counter interface
686: ctrl_ctr_pload => ctrl_ctr_pload, -- OUT
687: ctrl_ctr_pload_val => ctrl_ctr_pload_val, -- OUT
688: ctrl_ctr_ena => ctrl_ctr_ena, -- OUT
689: ctrl_ctr_zero => ctrl_ctr_zero, -- IN
690: ctrl_ctr_one => ctrl_ctr_one, -- IN
691: ctrl_counted_byte => ctrl_counted_byte, -- IN
692: ctrl_counted_byte_index => ctrl_counted_byte_index, -- IN
693: ctrl_ctr_mem_index => ctrl_ctr_mem_index, -- IN
694: compl_ctr_ena => compl_ctr_ena, -- OUT
695: arbitration_part => arbitration_part, -- OUT
696:
697: -- Reintegration counter interface
698: reinteg_ctr_clr => reinteg_ctr_clr, -- OUT
699: reinteg_ctr_enable => reinteg_ctr_enable, -- OUT
700: reinteg_ctr_expired => reinteg_ctr_expired, -- IN
701:
702: -- Retransmitt counter interface
703: retr_ctr_clear => retr_ctr_clear, -- OUT
704: retr_ctr_add => retr_ctr_add, -- OUT
705: retr_limit_reached => retr_limit_reached, -- IN
706:
707: -- Error detector interface
708: form_err => form_err_i, -- OUT
709: ack_err => ack_err_i, -- OUT
710: crc_check => crc_check, -- OUT
711: bit_err_arb => bit_err_arb, -- OUT
712: bit_err_after_ack_err => bit_err_after_ack_err, -- OUT
713: crc_match => crc_match, -- IN
714: crc_err => crc_err_i, -- OUT
715: crc_clear_match_flag => crc_clear_match_flag, -- OUT
716: crc_src => crc_src, -- OUT
717: err_pos => err_pos, -- OUT
718:
719: -- Bit Stuffing/Destuffing control signals
720: stuff_enable => stuff_enable, -- OUT
721: destuff_enable => destuff_enable, -- OUT
722: fixed_stuff => fixed_stuff_i, -- OUT
723: tx_frame_no_sof => tx_frame_no_sof, -- OUT
724:
725: -- Operation control interface
726: is_transmitter => is_transmitter, -- IN
727: is_receiver => is_receiver, -- IN
728: arbitration_lost => arbitration_lost_i, -- OUT
729: set_transmitter => set_transmitter, -- OUT
730: set_receiver => set_receiver, -- OUT
731: set_idle => set_idle, -- OUT
732:
733: -- Fault confinement interface
734: primary_err => primary_err, -- OUT
735: act_err_ovr_flag => act_err_ovr_flag, -- OUT
736: set_err_active => set_err_active, -- OUT
737: err_delim_late => err_delim_late, -- OUT
738: is_err_active => is_err_active, -- IN
739: is_err_passive => is_err_passive, -- IN
740: is_bus_off => is_bus_off, -- IN
741: decrement_rec => decrement_rec, -- OUT
742:
743: -- Other control signals
744: sp_control => sp_control, -- OUT
745: sp_control_q => sp_control_q, -- OUT
746: nbt_ctrs_en => nbt_ctrs_en, -- OUT
747: dbt_ctrs_en => dbt_ctrs_en, -- OUT
748: sync_control => sync_control, -- OUT
749: ssp_reset => ssp_reset, -- OUT
750: tran_delay_meas => tran_delay_meas, -- OUT
751: tran_valid => tran_valid, -- OUT
752: crc_enable => crc_enable, -- OUT
753: crc_spec_enable => crc_spec_enable, -- OUT
754: crc_calc_from_rx => crc_calc_from_rx, -- OUT
755: load_init_vect => load_init_vect, -- OUT
756: bit_err_enable => bit_err_enable, -- OUT
757: br_shifted => br_shifted, -- OUT
758: btmc_reset => btmc_reset, -- OUT
759: dbt_measure_start => dbt_measure_start, -- OUT
760: gen_first_ssp => gen_first_ssp, -- OUT
761: sync_edge => sync_edge -- IN
762: );
763:
764: -----------------------------------------------------------------------------------------------
765: -- Control counter
766: -----------------------------------------------------------------------------------------------
767: control_counter_inst : entity ctu_can_fd_rtl.control_counter
768: generic map(
769: G_CTRL_CTR_WIDTH => G_CTRL_CTR_WIDTH
770: )
771: port map(
772: clk_sys => clk_sys, -- IN
773: res_n => res_n, -- IN
774:
775: -- Control signals
776: rx_trigger => rx_trigger, -- IN
777: ctrl_ctr_ena => ctrl_ctr_ena, -- IN
778: ctrl_ctr_pload => ctrl_ctr_pload, -- IN
779: ctrl_ctr_pload_val => ctrl_ctr_pload_val, -- IN
780: compl_ctr_ena => compl_ctr_ena, -- IN
781: arbitration_lost => arbitration_lost_i, -- IN
782: arbitration_part => arbitration_part, -- IN
783:
784: -- Status signals
785: ctrl_ctr_zero => ctrl_ctr_zero, -- OUT
786: ctrl_ctr_one => ctrl_ctr_one, -- OUT
787: ctrl_counted_byte => ctrl_counted_byte, -- OUT
788: ctrl_counted_byte_index => ctrl_counted_byte_index, -- OUT
789: ctrl_ctr_mem_index => ctrl_ctr_mem_index, -- OUT
790:
791: -- Memory registers interface
792: alc_alc_bit => alc_alc_bit, -- OUT
793: alc_alc_id_field => alc_alc_id_field -- OUT
794: );
795:
796: -----------------------------------------------------------------------------------------------
797: -- Reintegration counter
798: -----------------------------------------------------------------------------------------------
799: reintegration_counter_inst : entity ctu_can_fd_rtl.reintegration_counter
800: port map(
801: clk_sys => clk_sys, -- IN
802: res_n => res_n, -- IN
803:
804: -- Control signals
805: reinteg_ctr_clr => reinteg_ctr_clr, -- IN
806: reinteg_ctr_enable => reinteg_ctr_enable, -- IN
807: rx_trigger => rx_trigger, -- IN
808:
809: -- Status signals
810: reinteg_ctr_expired => reinteg_ctr_expired -- OUT
811: );
812:
813: -----------------------------------------------------------------------------------------------
814: -- Retransmitt counter
815: -----------------------------------------------------------------------------------------------
816: retransmitt_counter_inst : entity ctu_can_fd_rtl.retransmitt_counter
817: generic map(
818: G_RETR_LIM_CTR_WIDTH => G_RETR_LIM_CTR_WIDTH
819: )
820: port map(
821: clk_sys => clk_sys, -- IN
822: res_n => res_n, -- IN
823:
824: -- Control signals
825: txtb_changed => txtb_changed, -- IN
826: retr_ctr_clear => retr_ctr_clear, -- IN
827: retr_ctr_add => retr_ctr_add, -- IN
828:
829: -- Memory registers interface
830: mr_settings_rtrth => mr_settings_rtrth, -- IN
831:
832: -- Status signals
833: retr_limit_reached => retr_limit_reached, -- OUT
834: retr_ctr => retr_ctr -- OUT
835: );
836:
837: -----------------------------------------------------------------------------------------------
838: -- Error detector
839: -----------------------------------------------------------------------------------------------
840: err_detector_inst : entity ctu_can_fd_rtl.err_detector
841: generic map(
842: G_ERR_VALID_PIPELINE => G_ERR_VALID_PIPELINE
843: )
844: port map(
845: clk_sys => clk_sys, -- IN
846: res_n => res_n, -- IN
847:
848: -- Data-path interface
849: tx_data => tx_data_wbs, -- IN
850: rx_data => rx_data_nbs, -- IN
851:
852: -- Error sources
853: bit_err => bit_err, -- IN
854: bit_err_arb => bit_err_arb, -- IN
855: stuff_err => stuff_err, -- IN
856: form_err => form_err_i, -- IN
857: ack_err => ack_err_i, -- IN
858: crc_err => crc_err_i, -- IN
859: tran_frame_parity_error => tran_frame_parity_error, -- IN
860:
861: -- Memory registers interface
862: mr_settings_nisofd => mr_settings_nisofd, -- IN
863: err_capt_err_type => err_capt_err_type, -- OUT
864: err_capt_err_pos => err_capt_err_pos, -- OUT
865: err_capt_err_erp => err_capt_err_erp, -- OUT
866:
867: -- CRC comparison data
868: rx_crc => rx_crc, -- IN
869: crc_15 => crc_15, -- IN
870: crc_17 => crc_17, -- IN
871: crc_21 => crc_21, -- IN
872: rx_stuff_count => rx_stuff_count, -- IN
873: dst_ctr => dst_ctr, -- IN
874:
875: -- Control signals
876: fixed_stuff => fixed_stuff_i, -- IN
877: err_pos => err_pos, -- IN
878: crc_check => crc_check, -- IN
879: crc_clear_match_flag => crc_clear_match_flag, -- IN
880: crc_src => crc_src, -- IN
881: is_arbitration => pc_dbg_i.is_arbitration, -- IN
882: is_transmitter => is_transmitter, -- IN
883: is_err_passive => is_err_passive, -- IN
884:
885: -- Status output
886: err_frm_req => err_frm_req, -- OUT
887: err_detected => err_detected, -- OUT
888: crc_match => crc_match, -- OUT
889: err_ctrs_unchanged => err_ctrs_unchanged -- OUT
890: );
891:
892: -----------------------------------------------------------------------------------------------
893: -- TX Shift register
894: -----------------------------------------------------------------------------------------------
895: tx_shift_reg_inst : entity ctu_can_fd_rtl.tx_shift_reg
896: port map(
897: clk_sys => clk_sys, -- IN
898: res_n => res_n, -- IN
899:
900: mr_mode_tstm => mr_mode_tstm, -- IN
901:
902: tx_trigger => tx_trigger, -- IN
903: tx_data_nbs => tx_data_nbs, -- OUT
904:
905: -- Protocol control FSM interface
906: tx_load_base_id => tx_load_base_id, -- IN
907: tx_load_ext_id => tx_load_ext_id, -- IN
908: tx_load_dlc => tx_load_dlc, -- IN
909: tx_load_data_word => tx_load_data_word, -- IN
910: tx_load_stuff_count => tx_load_stuff_count, -- IN
911: tx_load_crc => tx_load_crc, -- IN
912: tx_shift_ena => tx_shift_ena, -- IN
913: tx_dominant => tx_dominant, -- IN
914: crc_src => crc_src, -- IN
915:
916: -- CAN CRC Interface
917: crc_15 => crc_15, -- IN
918: crc_17 => crc_17, -- IN
919: crc_21 => crc_21, -- IN
920:
921: err_frm_req => err_frm_req, -- IN
922: is_err_active => is_err_active, -- IN
923: bst_ctr => bst_ctr, -- IN
924: tran_identifier => tran_identifier, -- IN
925: tran_frame_test => tran_frame_test, -- IN
926: tran_word_swapped => tran_word_swapped, -- IN
927: tran_dlc => tran_dlc -- IN
928: );
929:
930: -----------------------------------------------------------------------------------------------
931: -- RX Shift register
932: -----------------------------------------------------------------------------------------------
933: rx_shift_reg_inst : entity ctu_can_fd_rtl.rx_shift_reg
934: port map(
935: clk_sys => clk_sys, -- IN
936: res_n => res_n, -- IN
937:
938: -- DFT support
939: scan_enable => scan_enable, -- IN
940:
941: rx_trigger => rx_trigger, -- IN
942:
943: -- Data-path interface
944: rx_data_nbs => rx_data_nbs, -- IN
945:
946: -- Protocol control FSM interface
947: rx_clear => rx_clear, -- IN
948: rx_shift_ena => rx_shift_ena, -- IN
949: rx_shift_in_sel => rx_shift_in_sel, -- IN
950: rx_store_base_id => rx_store_base_id, -- IN
951: rx_store_ext_id => rx_store_ext_id, -- IN
952: rx_store_ide => rx_store_ide, -- IN
953: rx_store_rtr => rx_store_rtr, -- IN
954: rx_store_edl => rx_store_edl, -- IN
955: rx_store_dlc => rx_store_dlc, -- IN
956: rx_store_esi => rx_store_esi, -- IN
957: rx_store_brs => rx_store_brs, -- IN
958: rx_store_stuff_count => rx_store_stuff_count, -- IN
959:
960: -- RX Buffer interface
961: rec_ident => rec_ident, -- OUT
962: rec_dlc_d => rec_dlc_d, -- OUT
963: rec_dlc => rec_dlc_q, -- OUT
964: rec_is_rtr => rec_is_rtr_i, -- OUT
965: rec_ident_type => rec_ident_type, -- OUT
966: rec_frame_type => rec_frame_type_i, -- OUT
967: rec_brs => rec_brs, -- OUT
968: rec_esi => rec_esi, -- OUT
969: store_data_word => store_data_word, -- OUT
970:
971: -- CRC information for CRC comparison
972: rx_crc => rx_crc, -- OUT
973: rx_stuff_count => rx_stuff_count -- OUT
974: );
975:
976: -----------------------------------------------------------------------------------------------
977: -- Internal signals propagation to output
978: -----------------------------------------------------------------------------------------------
979: rec_frame_type <= rec_frame_type_i;
980: rec_is_rtr <= rec_is_rtr_i;
981: rec_dlc <= rec_dlc_q;
982: form_err <= form_err_i;
983: ack_err <= ack_err_i;
984: crc_err <= crc_err_i;
985: fixed_stuff <= fixed_stuff_i;
986: arbitration_lost <= arbitration_lost_i;
987: pc_dbg <= pc_dbg_i;
988:
989:
990: -- <RELEASE_OFF>
991: -----------------------------------------------------------------------------------------------
992: -- Assertions
993: -----------------------------------------------------------------------------------------------
994: -- psl default clock is rising_edge(clk_sys);
995:
996: -- psl no_invalid_ack_err_asrt : assert never
997: -- ((ack_err = '1' or crc_err = '1' or stuff_err = '1') and (pc_dbg_i.is_err = '1'))
998: -- report "ACK, Stuff, CRC Errors can't occur during Error or overload flag";
999:
1000: -- psl sample_sec_proper_asrt : assert never
1001: -- (sp_control = SECONDARY_SAMPLE and is_transmitter = '0')
1002: -- report "Secondary sampling is allowed only for transmitter!";
1003:
1004: -- psl no_simul_tx_rx_trigger_asrt : assert never
1005: -- (tx_trigger = '1' and rx_trigger = '1')
1006: -- report "RX Trigger and TX Trigger can't be active at once!";
1007:
1008: -- psl no_simul_transmitter_receiver_asrt : assert never
1009: -- (is_transmitter = '1' and is_receiver = '1')
1010: -- report "Unit can't be transmitter and receiver simultaneously!";
1011:
1012: -- psl no_h_sync_in_data_bit_rate_asrt : assert always
1013: -- (sync_control = HARD_SYNC) -> (sp_control = NOMINAL_SAMPLE)
1014: -- report "Hard synchronisation shall be used in Nominal bit rate only!";
1015:
1016: -- psl no_simul_err_req_asrt : assert never
1017: -- (tran_valid = '1' and err_frm_req = '1')
1018: -- report "Tranmission OK and Error frame request can't occur at once!";
1019:
1020: -- <RELEASE_ON>
1021:
1022: end architecture;