File: /__w/ctu-can-regression/ctu-can-regression/src/can_core/err_detector.vhd
0: --------------------------------------------------------------------------------
1: --
2: -- CTU CAN FD IP Core
3: -- Copyright (C) 2021-2023 Ondrej Ille
4: -- Copyright (C) 2023- Logic Design Services Ltd.s
5: --
6: -- Permission is hereby granted, free of charge, to any person obtaining a copy
7: -- of this VHDL component and associated documentation files (the "Component"),
8: -- to use, copy, modify, merge, publish, distribute the Component for
9: -- non-commercial purposes. Using the Component for commercial purposes is
10: -- forbidden unless previously agreed with Copyright holder.
11: --
12: -- The above copyright notice and this permission notice shall be included in
13: -- all copies or substantial portions of the Component.
14: --
15: -- THE COMPONENT IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16: -- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17: -- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18: -- AUTHORS OR COPYRIGHTHOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19: -- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20: -- FROM, OUT OF OR IN CONNECTION WITH THE COMPONENT OR THE USE OR OTHER DEALINGS
21: -- IN THE COMPONENT.
22: --
23: -- The CAN protocol is developed by Robert Bosch GmbH and protected by patents.
24: -- Anybody who wants to implement this IP core on silicon has to obtain a CAN
25: -- protocol license from Bosch.
26: --
27: -- -------------------------------------------------------------------------------
28: --
29: -- CTU CAN FD IP Core
30: -- Copyright (C) 2015-2020 MIT License
31: --
32: -- Authors:
33: -- Ondrej Ille <ondrej.ille@gmail.com>
34: -- Martin Jerabek <martin.jerabek01@gmail.com>
35: --
36: -- Project advisors:
37: -- Jiri Novak <jnovak@fel.cvut.cz>
38: -- Pavel Pisa <pisa@cmp.felk.cvut.cz>
39: --
40: -- Department of Measurement (http://meas.fel.cvut.cz/)
41: -- Faculty of Electrical Engineering (http://www.fel.cvut.cz)
42: -- Czech Technical University (http://www.cvut.cz/)
43: --
44: -- Permission is hereby granted, free of charge, to any person obtaining a copy
45: -- of this VHDL component and associated documentation files (the "Component"),
46: -- to deal in the Component without restriction, including without limitation
47: -- the rights to use, copy, modify, merge, publish, distribute, sublicense,
48: -- and/or sell copies of the Component, and to permit persons to whom the
49: -- Component is furnished to do so, subject to the following conditions:
50: --
51: -- The above copyright notice and this permission notice shall be included in
52: -- all copies or substantial portions of the Component.
53: --
54: -- THE COMPONENT IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
55: -- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
56: -- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
57: -- AUTHORS OR COPYRIGHTHOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
58: -- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
59: -- FROM, OUT OF OR IN CONNECTION WITH THE COMPONENT OR THE USE OR OTHER DEALINGS
60: -- IN THE COMPONENT.
61: --
62: -- The CAN protocol is developed by Robert Bosch GmbH and protected by patents.
63: -- Anybody who wants to implement this IP core on silicon has to obtain a CAN
64: -- protocol license from Bosch.
65: --
66: --------------------------------------------------------------------------------
67:
68: --------------------------------------------------------------------------------
69: -- Module:
70: -- Error detector.
71: --
72: -- Purpose:
73: -- Detects and error condition in Process pipeline stage and provides error
74: -- frame request to Protocol control FSM with one clock cycle delay. Performs
75: -- CRC check when commanded by Protocol control. Determines special error
76: -- conditions during which Fault confinement counters shall not be changed
77: -- (e.g. stuff error during arbitration). Maintains Error code capture register
78: -- which stores type of last error and its position within CAN frame.
79: --------------------------------------------------------------------------------
80:
81: Library ieee;
82: use ieee.std_logic_1164.all;
83: use ieee.numeric_std.ALL;
84:
85: Library ctu_can_fd_rtl;
86: use ctu_can_fd_rtl.can_constants_pkg.all;
87: use ctu_can_fd_rtl.can_types_pkg.all;
88:
89: use ctu_can_fd_rtl.CAN_FD_register_map.all;
90: use ctu_can_fd_rtl.CAN_FD_frame_format.all;
91:
92: entity err_detector is
93: generic (
94: -- Pipeline should be inserted on Error signalling
95: G_ERR_VALID_PIPELINE : boolean
96: );
97: port (
98: -------------------------------------------------------------------------------------------
99: -- Clock and Asynchronous Reset
100: -------------------------------------------------------------------------------------------
101: clk_sys : in std_logic;
102: res_n : in std_logic;
103:
104: -------------------------------------------------------------------------------------------
105: -- Data-path interface
106: -------------------------------------------------------------------------------------------
107: -- Actual TX Data
108: tx_data : in std_logic;
109:
110: -- Actual RX Data
111: rx_data : in std_logic;
112:
113: -------------------------------------------------------------------------------------------
114: -- Error sources
115: -------------------------------------------------------------------------------------------
116: -- Bit error (from Bus sampling)
117: bit_err : in std_logic;
118:
119: -- Bit error in Arbitration field
120: bit_err_arb : in std_logic;
121:
122: -- Stuff error
123: stuff_err : in std_logic;
124:
125: -- Form Error
126: form_err : in std_logic;
127:
128: -- ACK Error
129: ack_err : in std_logic;
130:
131: -- CRC Error
132: crc_err : in std_logic;
133:
134: -------------------------------------------------------------------------------------------
135: -- CRC comparison data
136: -------------------------------------------------------------------------------------------
137: -- Received CRC
138: rx_crc : in std_logic_vector(20 downto 0);
139:
140: -- Calculated CRC 15
141: crc_15 : in std_logic_vector(14 downto 0);
142:
143: -- Calculated CRC 17
144: crc_17 : in std_logic_vector(16 downto 0);
145:
146: -- Calculated CRC 21
147: crc_21 : in std_logic_vector(20 downto 0);
148:
149: -- Received Stuff count (Gray coded) + Parity
150: rx_stuff_count : in std_logic_vector(3 downto 0);
151:
152: -- Destuff counter mod 8
153: dst_ctr : in std_logic_vector(2 downto 0);
154:
155: -------------------------------------------------------------------------------------------
156: -- Control signals
157: -------------------------------------------------------------------------------------------
158: -- Fixed Bit stuffing method
159: fixed_stuff : in std_logic;
160:
161: -- Error position field (from Protocol control)
162: err_pos : in std_logic_vector(3 downto 0);
163:
164: -- Perform CRC Check
165: crc_check : in std_logic;
166:
167: -- Clear CRC match flag
168: crc_clear_match_flag : in std_logic;
169:
170: -- CRC Source (CRC15, CRC17, CRC21)
171: crc_src : in std_logic_vector(1 downto 0);
172:
173: -- Arbitration field is being transmitted / received
174: is_arbitration : in std_logic;
175:
176: -- Unit is transmitter of frame
177: is_transmitter : in std_logic;
178:
179: -- Unit is error passive
180: is_err_passive : in std_logic;
181:
182: -- Parity Error in TXT Buffer RAM data words
183: tran_frame_parity_error : in std_logic;
184:
185: -------------------------------------------------------------------------------------------
186: -- Memory registers interface
187: -------------------------------------------------------------------------------------------
188: mr_settings_nisofd : in std_logic;
189:
190: err_capt_err_type : out std_logic_vector(2 downto 0);
191: err_capt_err_pos : out std_logic_vector(3 downto 0);
192: err_capt_err_erp : out std_logic;
193:
194: -------------------------------------------------------------------------------------------
195: -- Status output
196: -------------------------------------------------------------------------------------------
197: -- Error frame request
198: err_frm_req : out std_logic;
199:
200: -- Error detected (for Fault confinement)
201: err_detected : out std_logic;
202:
203: -- CRC match
204: crc_match : out std_logic;
205:
206: -- Error counters should remain unchanged
207: err_ctrs_unchanged : out std_logic
208: );
209: end entity;
210:
211: architecture rtl of err_detector is
212:
213: -- Internal Error valid
214: signal err_frm_req_i : std_logic;
215:
216: -- Error capture register
217: signal err_capt_err_type_d : std_logic_vector(2 downto 0);
218: signal err_capt_err_type_q : std_logic_vector(2 downto 0);
219: signal err_capt_err_pos_q : std_logic_vector(3 downto 0);
220:
221: -- Internal form error
222: signal form_err_i : std_logic;
223:
224: -- CRC Match detection
225: signal crc_match_c : std_logic;
226: signal crc_match_d : std_logic;
227: signal crc_match_q : std_logic;
228:
229: -- De-Stuff counter grey coded
230: signal dst_ctr_grey : std_logic_vector(2 downto 0);
231: signal dst_parity : std_logic;
232:
233: -- Stuff counter should be checked
234: signal stuff_count_check : std_logic;
235:
236: -- CRC Check results
237: signal crc_15_ok : std_logic;
238: signal crc_17_ok : std_logic;
239: signal crc_21_ok : std_logic;
240: signal stuff_count_ok : std_logic;
241:
242: -- Aliases for received CRC (for easier debugging)
243: signal rx_crc_15 : std_logic_vector(14 downto 0);
244: signal rx_crc_17 : std_logic_vector(16 downto 0);
245: signal rx_crc_21 : std_logic_vector(20 downto 0);
246:
247: begin
248:
249: -----------------------------------------------------------------------------------------------
250: -- Error frame request. Invoked by each Error type which should cause Error frame in the
251: -- following bit!
252: -----------------------------------------------------------------------------------------------
253:
254: -- Error frame request for any type of error which causes transition to Error frame in the
255: -- next bit.
256: err_frm_req_i <= '1' when (bit_err = '1') else
257: '1' when (stuff_err = '1') else
258: '1' when (form_err = '1' or ack_err = '1') else
259: '1' when (crc_err = '1') else
260: '1' when (bit_err_arb = '1') else
261: '1' when (tran_frame_parity_error = '1') else
262: '0';
263:
264: -- Fixed stuff error shall be reported as Form Error!
265: form_err_i <= '1' when (form_err = '1') else
266: '1' when (stuff_err = '1' and fixed_stuff = '1') else
267: '0';
268:
269: err_pipeline_true_gen : if (G_ERR_VALID_PIPELINE) generate
270: begin
271: err_valid_reg_proc : process(res_n, clk_sys)
272: begin
273: if (res_n = '0') then
274: err_frm_req <= '0';
275: elsif (rising_edge(clk_sys)) then
276: err_frm_req <= err_frm_req_i;
277: end if;
278: end process;
279: end generate err_pipeline_true_gen;
280:
281: err_pipeline_false_gen : if (not G_ERR_VALID_PIPELINE) generate
282: begin
283: err_frm_req <= err_frm_req_i;
284: end generate err_pipeline_false_gen;
285:
286:
287: -----------------------------------------------------------------------------------------------
288: -- De-Stuff counter grey-coding + parity
289: -----------------------------------------------------------------------------------------------
290: with dst_ctr select dst_ctr_grey <=
291: "001" when "001",
292: "011" when "010",
293: "010" when "011",
294: "110" when "100",
295: "111" when "101",
296: "101" when "110",
297: "100" when "111",
298: "000" when others;
299:
300: dst_parity <= dst_ctr_grey(0) xor dst_ctr_grey(1) xor dst_ctr_grey(2);
301:
302: -----------------------------------------------------------------------------------------------
303: -- CRC Check
304: -----------------------------------------------------------------------------------------------
305: -- Check stuff counters for ISO FD and FD Frames only!
306: stuff_count_check <= '1' when (mr_settings_nisofd = ISO_FD) and
307: (crc_src = C_CRC17_SRC or crc_src = C_CRC21_SRC)
308: else
309: '0';
310:
311: -- CRC aliases from RX Shift register
312: rx_crc_15 <= rx_crc(14 downto 0);
313: rx_crc_17 <= rx_crc(16 downto 0);
314: rx_crc_21 <= rx_crc(20 downto 0);
315:
316: -- CRC 15 bits check
317: crc_15_ok <= '1' when (rx_crc_15 = crc_15)
318: else
319: '0';
320:
321: -- CRC 17 check
322: crc_17_ok <= '1' when (rx_crc_17 = crc_17)
323: else
324: '0';
325:
326: -- CRC 21 check
327: crc_21_ok <= '1' when (rx_crc_21 = crc_21)
328: else
329: '0';
330:
331: -- Stuff counter OK, including parity!
332: stuff_count_ok <= '1' when (rx_stuff_count = dst_ctr_grey & dst_parity)
333: else
334: '0';
335:
336: -- CRC Match
337: crc_match_c <= '0' when (crc_15_ok = '0' and crc_src = C_CRC15_SRC) or
338: (crc_17_ok = '0' and crc_src = C_CRC17_SRC) or
339: (crc_21_ok = '0' and crc_src = C_CRC21_SRC) or
340: (stuff_count_ok = '0' and stuff_count_check = '1')
341: else
342: '1';
343:
344: crc_match_d <= '0' when (crc_clear_match_flag = '1') else
345: crc_match_c when (crc_check = '1') else
346: crc_match_q;
347:
348: crc_err_reg_proc : process(clk_sys, res_n)
349: begin
350: if (res_n = '0') then
351: crc_match_q <= '0';
352: elsif (rising_edge(clk_sys)) then
353: crc_match_q <= crc_match_d;
354: end if;
355: end process;
356:
357: -----------------------------------------------------------------------------------------------
358: -- Error counters should remain unchanged according to 12.1.4.2 in ISO11898-1:2015 in following
359: -- cases:
360: -- 1. Error passive transmitter detects ACK error.
361: -- 2. Transmitter detects stuff error in Arbitration when recessive was sent, but dominant
362: -- was received. Note that we don't need to add "tx_data = RECESSIVE" to the second
363: -- condition since when stuff_err is detected, and rx_data is dominant, it is impossible
364: -- for tx_data to be dominant. If this was the case, the core would need to transmit
365: -- intentional stuff error, and there is no such capability.
366: -----------------------------------------------------------------------------------------------
367: err_ctrs_unchanged <= '1' when (ack_err = '1' and is_err_passive = '1')
368: else
369: '1' when (stuff_err = '1' and is_arbitration = '1' and
370: is_transmitter = '1' and rx_data = DOMINANT)
371: else
372: '0';
373:
374:
375: -- Error is detected when error frame is requested
376: err_detected <= err_frm_req_i;
377:
378: -----------------------------------------------------------------------------------------------
379: -- Error code, next value
380: -----------------------------------------------------------------------------------------------
381: err_capt_err_type_d <= ERC_FRM_ERR when (form_err_i = '1') else
382: ERC_BIT_ERR when (bit_err = '1') else
383: ERC_BIT_ERR when (bit_err_arb = '1') else
384: ERC_CRC_ERR when (crc_err = '1') else
385: ERC_ACK_ERR when (ack_err = '1') else
386: ERC_STUF_ERR when (stuff_err = '1') else
387: ERC_PRT_ERR when (tran_frame_parity_error = '1') else
388: err_capt_err_type_q;
389:
390: -----------------------------------------------------------------------------------------------
391: -- Error type register
392: -----------------------------------------------------------------------------------------------
393: err_type_reg_proc : process(clk_sys, res_n)
394: begin
395: if (res_n = '0') then
396: err_capt_err_type_q <= ERR_TYPE_RSTVAL;
397: err_capt_err_pos_q <= ERR_POS_RSTVAL;
398: err_capt_err_erp <= ERR_ERP_RSTVAL;
399: elsif (rising_edge(clk_sys)) then
400: if (err_frm_req_i = '1') then
401: err_capt_err_type_q <= err_capt_err_type_d;
402: err_capt_err_pos_q <= err_pos;
403: err_capt_err_erp <= is_err_passive;
404: end if;
405: end if;
406: end process;
407:
408: -- Internal signal to output propagation
409: err_capt_err_type <= err_capt_err_type_q;
410: err_capt_err_pos <= err_capt_err_pos_q;
411: crc_match <= crc_match_q;
412:
413: -- <RELEASE_OFF>
414: -----------------------------------------------------------------------------------------------
415: -- Assertions and functional coverage
416: -----------------------------------------------------------------------------------------------
417: -- psl default clock is rising_edge(clk_sys);
418:
419: -- psl err_detect_bit_err_cov : cover
420: -- {bit_err = '1'};
421:
422: -- psl err_detect_bit_err_arb_cov : cover
423: -- {bit_err_arb = '1'};
424:
425: -- psl err_detect_stuff_err_cov : cover
426: -- {stuff_err = '1'};
427:
428: -- psl err_detect_form_err_cov : cover
429: -- {form_err = '1'};
430:
431: -- psl err_detect_ack_err_cov : cover
432: -- {ack_err = '1'};
433:
434: -- psl err_detect_crc_err_cov : cover
435: -- {crc_err = '1'};
436:
437: -- psl err_detect_parity_err_cov : cover
438: -- {tran_frame_parity_error = '1'};
439:
440: -- psl err_capt_q_form_err_cov : cover
441: -- {err_capt_err_type_q = ERC_FRM_ERR};
442:
443: -- psl err_capt_q_bit_err_cov : cover
444: -- {err_capt_err_type_q = ERC_BIT_ERR};
445:
446: -- psl err_capt_q_crc_err_cov : cover
447: -- {err_capt_err_type_q = ERC_CRC_ERR};
448:
449: -- psl err_capt_q_ack_err_cov : cover
450: -- {err_capt_err_type_q = ERC_ACK_ERR};
451:
452: -- psl err_capt_q_stuff_err_cov : cover
453: -- {err_capt_err_type_q = ERC_STUF_ERR};
454:
455: -- psl err_capt_q_prt_err_cov : cover
456: -- {err_capt_err_type_q = ERC_PRT_ERR};
457:
458: -- <RELEASE_ON>
459:
460: end architecture;